Threshold Voltage Model Research Articles

Analytical modeling of threshold voltage and on-resistance in multi-barrier E-mode MISHEMT with gate-recess and field-plates

This work presents an analytical model for threshold voltage and On-resistance of multi barrier Metal–Insulator–Semiconductor High-Electron-Mobility-Transistor (MISHEMT) with gate-recess and field-plates. The device featuring a high two-dimensional electron-gas (2DEG) density in the channel region. The primary objectives of this device are to achieve a high threshold voltage (Vth) and enhance electron mobility with specific low ON-resistance (Ron_sp) by mitigating the degradation effects arising from scattering and interface-charges. Also, a physics based analytical model for Vth and 2DEG charge density at upper and lower channels is presented. This model is validated by comparing with TCAD numerical simulations and are well matched. The proposed MISHEMT demonstrates improved electron mobility in the lower channel of 1260 cm2/V.s, Vth of ∼2.6 V and Ron_sp is minimized by 33 % in contrast with a conventional MISHEMT. Additionally, the proposed MISHEMT becomes a promising device for achieving both high threshold voltage and mobility which are required for power semiconductor devices.

Threshold voltage model development of N+ pocket vertical junctionless TFET (V-JL-TFET) as a label free biosensor

This work investigates into the potential application of an improved N+ pocket Vertical Junctionless TFET (V-JL-TFET) as a label free biosensor. To calculate the sensitivity of the biosensor, an analytical model based on device physics was developed that accounts for the impact of both charged and uncharged biomolecules on the threshold voltage (Vth). As a result, the developed model offers a solution that is applicable for both uncharged and charged biomolecules. This model demonstrates a strong agreement with the experimentally determined threshold voltage (Vth) obtained from simulation results. Furthermore, sensitivity is obtained by assessing the shift in threshold voltage (Vth) resulting from changes in the dielectric constant. It's observed that Vth increases with decrease in dielectric value. The Vth value with empty nanogaps has been used as a reference point. Finally, the sensitivity of gate threshold voltage was calculated, and the obtained values are high enough to detect both charged and uncharged biomolecules. A detailed analysis of Selectivity, Linearity, stability and reliability of the proposed Biosensor is also presented.

Investigation of long channel bulk MOSFETs threshold voltage model down to 10 mK and key analog parameters at 4 K

AbstractThreshold voltage behavior at cryogenic temperatures is dominated by interface traps. This mechanism leads to different trends of the threshold voltage for NMOS and PMOS toward deep cryogenic temperature. This study investigates threshold voltage (Vth) at cryogenic temperatures down to 10 mK for the first time, based on the recently developed physical charge‐based analytical threshold voltage model. To investigate the impact of devices on circuits at low temperatures, crucial MOSFET and analog design parameters, including transconductance (gm), subthreshold swing (SS), linear region current (Ilin) and gm/IDS related parameters are characterized and compared from 300 to 4 K. A Discussion on circuit performance and power consumption has been conducted to provide useful insights for low‐temperature CMOS circuit design.

An improved Fourier series-based analytical model for threshold voltage and sub-threshold swing in SOI junctionless FinFET

In this work, Fourier series-based analytical models for threshold voltage (Vth) and Sub-threshold Swing (SS) are developed for Junctionless Fin Field Effect Transistor (JLFinFET) on Silicon On Insulator (SOI) substrate, taking into account the location of the onset of current conduction in the channel. Rigorous simulations were conducted to analyse the current conduction path when JLFinFET surpasses the threshold voltage. Based on the findings from these simulations, threshold voltage condition used for deriving the threshold voltage model is modified. This modified model gives a better prediction of Vth for JLFinFET than the already existing model which doesn't include approximations based on the location of onset of current conduction. The analytical model developed for SS is also capable of closely predicting the SS of JLFinFET obtained from the TCAD simulator down to a gate length of 20 nm.

Threshold voltage modeling based comparative performance exploration of Junctionless and Junction-Based High-K gate stack Dual-Material Cylindrical Gate-All-Around Macaroni MOSFET

This paper presents explicit threshold voltage modeling based comparative threshold voltage exploration of Junctionless (JL) and Junction-based (JB) High-K gate stack (HKGS) Dual-Material (DM) Cylindrical Gate-all-around (CGAA) Macaroni (Mac.) MOSFET. Based on Young’s popular Parabolic Potential Approximation (PPA), device features like inner potential has been formulated. Based on the expression of inner potential, threshold voltage has been extracted. Other major short channel effects like Drain-induced barrier lowering (DIBL) and subthreshold swing (SS) have also been analyzed. Device parameters such as inner, outer radii, channel lengths, type of high-k gate oxide, source/drain doping for JB device, etc. have also been varied to examine their effects on device parameters. Finally mathematical outputs have been corroborated with simulation outputs from Atlas.

A ballistic model for subthreshold current and threshold voltage of the dual-material-gate nanosheet MOSFET

— A ballistic model for subthreshold current of the dual-material-gate (DMG) nanosheet (NS) MOSFET is developed based on the Landauer approach, three-dimensional scaling equation, and the continuity of subthreshold current at the interface between the control gate and screen gate in the channel, The work function difference between the screen gate and control gate can be converted into the new interface-quasi-fermi-potential (IQFP) at the junction between different gate regions. Through the IQFP, the ballistic subthreshold current for DMG NS MOSFET is successfully developed. With the determined subthreshold current, the ballistic threshold voltage can also be achieved by the constant current method. Under the low and high drain voltage corresponding to their IQFPs, the subthreshold behavior is mainly governed by the contact potential and thermal voltage, respectively. Furthermore, Ohm's law regarding ballistic resistance for the DMG NS MOSFET can still be valid in the subthreshold conduction.

Tunneling Current Variations in Small-Sized Devices Based on a Compact Threshold Voltage Model

Accurate modeling of threshold voltage is necessary in the integrated circuit design of strained silicon devices. Thoroughly researching the factors that affect threshold voltage and establishing a more precise threshold voltage model, can provide essential theoretical support for integrated circuit design. By solving a Poisson equation, in this paper, we demonstrate a comprehensive physical model for the threshold voltage of strained Si NMOSFETs using the gradual channel approximation theory and a quasi-two-dimensional analysis. The model investigates the physical effects such as short-channel, narrow-channel, non-uniform doping, and drain-induced barrier lowering effects on the threshold voltage. After substituting the extracted parameters into the model, a comparison was made with experimental results to validate the accuracy and correctness of the established model. Additionally, variations in the tunneling current of small-sized devices were studied. The two models provide essential references for the analysis and design of strained Si large-scale integrated circuits.

Physics based numerical model of a nanoscale dielectric modulated step graded germanium source biotube FET sensor: modelling and simulation

This paper proposes a novel dielectric modulated step-graded germanium source biotube FET for label-free biosensing applications. Its integrated structure and unique design combine the benefits of the gate stack, germanium source, triple-gate architecture, and a step-graded biotube channel, resulting in superior performance over existing biosensors. A compact two-dimensional analytical model for channel potential, drain current, threshold voltage, and subthreshold swing has been formulated and agrees well with the simulated results. The comprehensive investigation of different device parameters, including doping and bias, offers valuable insights into optimizing the biosensor’s performance. The proposed biosensor exhibits remarkable sensitivity, achieving up to 263 mV and 1495.52 nA for certain biomolecules, which has been validated by a compact analytical model and simulations performed on the SILVACO TCAD simulator. Several parameters are employed to assess the biosensor’s effectiveness: threshold voltage, ION/IOFF ratio, subthreshold swing, off-current, peak trans-conductance, and on-current. Furthermore, the biotube channel design enables lightweight and cost-efficient biosensors, enhancing the biosensor’s practicality. This work also includes an analysis of the effect of temperature on the biosensor’s performance and characteristics, providing insights into practical applications. High sensitivity of the biosensor signifies a significant advancement in biosensing technology, suggesting a wide range of potential applications in biomedical field.

Characterization and modeling of threshold voltage for organic and amorphous thin-film transistors

This work portrays the study and analysis of several extraction techniques that are typically used to ascertain the threshold voltage of organic thin-film transistors (OTFTs) and oxide-based transistors. This study evaluates the effects of physical and electrical parameters such as channel length, doping concentration, temperature, and trap on the threshold voltage (VTH) of both p-type and n-type bottom gate top contact (BGTC) OTFTs using graphical method. The methods employed in the present work to extract the threshold voltage are determined in the linear region of operation and are derived from the drain current (IDS) and the gate-source voltage (VGS) transfer characteristics. To compare and analyze the threshold voltage, various techniques such as the linear extrapolation method (ELR), constant current method (CC), transconductance linear extrapolation method (GMLE), second derivative method (SD), ratio method (RM), Inverse Ratio method (VX), and transition method (TM) are employed in the present work. In addition to DC characterization, the capacitance-voltage (C-V) method was also used to extract and compare the threshold voltage using all the conventional techniques listed above. 2-D numerical simulations were performed to assess the validity and usefulness of the various methodologies used for the extraction of the threshold voltage.

Performance Analysis of Variable Threshold Voltage (ΔVth) Model of Junction less FinTFET

The work presented in this paper is a variable threshold voltage (ΔVth) model of junction less fin gate tunnel FET (JL FinTFET) in which there is a shift in threshold voltage. As a result, to improve drive current and subthreshold slope among other devices. At the same time, gradually decrease the random dopant fluctuations (RDF) effects on Vth, ambipolar leakage current by using this design. The threshold voltage in the junction less fin gate TFET may be modified using 2D numerical simulations by supplying a voltage to the variable gate. The effects of the threshold voltage change on the device's overall performance investigate. A GaSb junction less fin gate TFET and AlGaSb junction less fin gate TFETs with variable threshold voltage characteristics compare. The ON state current is 1.5x10-3 A/m, the SS is 17.1 mV/decade, and the Iamb is 3.314x10-17 A/m.

Impact of fin width on nano scale tri-gate FinFET including the quantum mechanical effect

An inversion charge-based threshold voltage model is proposed for 10 nm channel length Tri-gate (TG) FinFET. The variation threshold voltage has been studied with respect to fin width for different fin height and channel length The effect of width quantization has been explained with the help of the quantum mechanical effect (QME). A precise comparison of threshold voltage in terms of classical mechanics and quantum mechanics depicts the presence of width quantization in short channel device. The improvement of the short channel effects (SCEs), like subthreshold swing (SS), drain-induced barrier lowering (DIBL) and threshold voltage roll off have been studied. The impact of channel length to fin width ratio on DIBL and has been examined. The improvement of the SCEs at the same oxide thickness has been observed for high-k dielectric material. The potential and effect of hafnium oxide (HfO2) have been discussed and validated using technology computer-aided design (TCAD) simulation.

Threshold Voltage Model for 2-D FETs With Undoped Body and Gated Source

In this article, a threshold voltage model for two-dimensional (2-D) materials-based field-effect transistors (FETs) with an undoped body and a gated source is derived based on an analytical solution to Poisson’s equation at the source region. The effect of fringing fields on the underlapped region for the case when the gate has almost no overlap with the source is also studied and incorporated using conformal mapping. The derived threshold voltage model highlights the dependence of the turn-on condition on the barrier height at the metal/2-D interface, the geometry of the device, particularly on the 2-D film and oxide thickness, and the gate-to-source overlap length. Modifications on the barrier height at the metal/2-D junction due to the widely observed metal Fermi level pinning (FLP) effect on fabricated devices are also integrated. The proposed new model is verified by numerical simulations and published experimental data with close agreement.

Exploiting Metadata to Estimate Read Reference Voltage for 3-D nand Flash Memory

In consumer electronics, 3-D NAND flash memory has become the state-of-the-art storage medium due to the multi-bit storage per cell and 3-D stacking technology. However, flash memory cells are commonly vulnerable to numerous types of circuit-level noise, resulting in threshold voltage distribution distortion and decreased reliability. Characterization of the threshold voltage distribution and modeling of optimal read reference voltages can help to mitigate the reliability deterioration. We provide a solution for improving the reliability of flash memories while reducing their implementation cost in this paper. The proposed pre-processing method is shown to yield a smaller number of scanning voltage steps reducing the time overhead and energy consumption of multiple read operations during the characterization of threshold voltage distributions. We propose a single state asynchronous estimation (SSAE) method to estimate optimal read reference voltages. Compared with the advanced two-state asynchronous estimation (TSAE) method, it is shown to reduce the computational and space overhead by half. Furthermore, compared with using the default read reference voltages, it is also shown to reduce RBER without exact knowledge of noise.

A Phenomenological Model for Electrical Transport Characteristics of MSM Contacts Based on GNS.

Graphene nanoscroll, because of attractive electronic, mechanical, thermoelectric and optoelectronics properties, is a suitable candidate for transistor and sensor applications. In this research, the electrical transport characteristics of high-performance field effect transistors based on graphene nanoscroll are studied in the framework of analytical modeling. To this end, the characterization of the proposed device is investigated by applying the analytical models of carrier concentration, quantum capacitance, surface potential, threshold voltage, subthreshold slope and drain induced barrier lowering. The analytical modeling starts with deriving carrier concentration and surface potential is modeled by adopting the model of quantum capacitance. The effects of quantum capacitance, oxide thickness, channel length, doping concentration, temperature and voltage are also taken into account in the proposed analytical models. To investigate the performance of the device, the current-voltage characteristics are also determined with respect to the carrier density and its kinetic energy. According to the obtained results, the surface potential value of front gate is higher than that of back side. It is noteworthy that channel length affects the position of minimum surface potential. The surface potential increases by increasing the drain-source voltage. The minimum potential increases as the value of quantum capacitance increases. Additionally, the minimum potential is symmetric for the symmetric structure (Vfg = Vbg). In addition, the threshold voltage increases by increasing the carrier concentration, temperature and oxide thickness. It is observable that the subthreshold slope gets closer to the ideal value of 60 mV/dec as the channel length increases. As oxide thickness increases the subthreshold slope also increases. For thinner gate oxide, the gate capacitance is larger while the gate has better control over the channel. The analytical results demonstrate a rational agreement with existing data in terms of trends and values.

Analytical Modeling of Threshold Voltage and Subthreshold Slope for 3-D NAND Flash Memory With a Non-Uniform Doping Profile

Analytical Modeling of Threshold Voltage and Subthreshold Slope for 3-D NAND Flash Memory With a Non-Uniform Doping Profile

Novel Approach to FDSOI Threshold Voltage Model Validated at Cryogenic Temperatures

Novel Approach to FDSOI Threshold Voltage Model Validated at Cryogenic Temperatures

A Threshold Voltage Model for AOS TFTs Considering a Wide Range of Tail-State Density and Degeneration

There have been significant differences in principle electrical parameters between amorphous oxide semiconductor (AOS) thin-film transistors (TFTs) and silicon-based devices for their distinct conduction mechanisms. Additionally, threshold voltage is one of the key parameters in device characterization and modeling. In this work, a threshold voltage model is developed for AOS TFTs considering the various density of exponential tail states below the conduction band, including degenerate conduction. The threshold condition is defined where the density ratio of free carriers to the trapped carriers reaches a critical value depending on the distribution parameters of tail states. The resulting threshold voltage expression is fully analytical and is of clear physical meaning, with simple parameter extraction methods. Numerical and experimental verifications show that this model provides appropriate values of threshold voltage for devices with different sub-gap tail states, which could be a useful method for identifying the threshold voltage of a large variety of AOS TFTs.

Computationally Efficient Region-Wise Potential- Based Extremely Closed-Form Analytical Modeling of B/N Substitution Doped GFETs

A simplified region-wise potential-based analytical model is established for boron (B) or nitrogen (N) substitution doped graphene field-effect transistor (GFET). The closed-form direct analytical relation between graphene channel potential and applied bias condition is developed by imposing the effective approximation for Fermi–Dirac integral function in various regions of operation. The boundary for distinct GFET operating regime is separated based on the position of Dirac point and Fermi energy level with respect to applied bias condition. The semiclassical drift and diffusive transport model is utilized to obtain the drain current. In addition to that, the drift component, diffusion coefficient, and its corresponding current component for B and N substitution doped GFETs have been modeled individually and their influence on total current is discussed. The proposed region-potential-based analytical model has shown good agreement with numerically solved self-consistent model. Also, the physical insights in device design, such as threshold voltage and saturation drain potential model with respect to various doping/device parameters, have been examined.

A unified 2-D model for nanowire junctionless accumulation and inversion mode MOSFET in quasi-ballistic regime

A unified 2-D continuous potential model for cylindrical nanowire junctionless accumulation mode (JAM) MOSFET and conventional inversion mode (IM) MOSFET has been presented in this manuscript. The 2-D Poisson’s equation in cylindrical coordinates is solved analytically with the help of the superposition principle and evanescent mode analysis of the Fourier-Bessel series is performed. Both free and depletion charges are considered in the 2-D Poisson’s equation. The model thus derived is continuous across different operation regimes (depletion and accumulation/inversion) with respect to VGS. Further, a threshold voltage model is also derived from the potential model and an expression of drain-induced barrier lowering (DIBL) is formulated. The short channel drain current model is derived from the potential-based charge model and quasi-ballistic transport velocity model. Furthermore, models for transconductance (gm) and output conductance (gd) is also formulated from the drain current model. A 3-D TCAD tool from CogendaTM has been used to numerically verify our proposed unified analytical model.

Study on amplitude of the noise power spectrum for nano-strained Si NMOSFET

Based on the micro-transport mechanism of total dose to nano-strained Si MOS device, the trapped charge is calculated. By solving the two-dimensional Poisson equation, the channel surface potential is obtained, and the influence of the second-order effect is considered. The bandgap narrowing effect and the short channel effect are considered to obtain high-precision-strained Si threshold voltage of the nano NMOS device.. According to the noise power spectrum amplitude defined in the invention, the trap charge and threshold voltage models are calculated in the invention. The analytical model of correlation between the trap charge of strain Si MOSFET and the amplitude of 1/f noise power spectrum under the total dose effect is derived. The analytical model of correlation between trap charge and 1/f noise power spectrum amplitude constructed by the invention has a simple form, clear physical meaning and high calculation accuracy, which provides a feasible theoretical basis for irradiation reliability and circuit application of strained Si-integrated device.