Work Function Variation Research Articles

Field emission energy distribution studies of single multi-walled carbon nanotube emitter with gas adsorptions

The field emission electron energy distribution (FEED) investigation on the individual carbon nanotube (CNT) is a powerful approach to study the intrinsic electronic properties, including the work function and field emission energy level, for CNT devices. We fabricated the single multi-walled carbon nanotube (MWNT) emitter by the solution evaporation dielectrophoretic process after the chemical vapor deposition (CVD) synthesis of the MWNT film. The FEED properties of the MWNT emitter in hydrogen and nitrogen environments were investigated. The FEED peaks shifted up gradually in both hydrogen and nitrogen ambiences, indicating the effective work function reduction effect with gas adsorptions. The amounts of spectrum displacements increased with raising gas partial pressures, with larger displacements of up to 0.65 eV for hydrogen between 10−7 Pa and 10−4 Pa. The double peak spectra imply that emission electrons could be from the hexagonal and the pentagonal carbons. Meanwhile, high carbon content was detected in the ultimate vacuum, attributed highly to the MWNT etching from the emission. This investigation suggests that the work function variation plays key role for the field emission instability and the pressure sensing effect of CNT emitters.

Impact of Process Fluctuations on RF Small-Signal Parameter of Gate-All-Around Nanosheet Transistor Beyond 3 nm Node

In the present work, the variations of <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">RF</i> small-signal model parameters induced by the intrinsic process fluctuations are investigated in gate-all-around (GAA) nanosheet transistor beyond 3 nm node. With the help of nonlinear rational function fitting, the RF small-signal model parameters are first analytically extracted from the non-quasi-static (NQS) equivalent circuit. The impact of work-function variation (WFV), line edge roughness (LER), and gate edge roughness (GER) on small-signal model parameters are evaluated by 3-D TCAD simulation. Results demonstrate that the channel distribution resistance <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{\text {gdi}}$ </tex-math></inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{\text {gsi}}$ </tex-math></inline-formula> are the most sensitive parameters to intrinsic process fluctuations. Furthermore, compared to LER and GER, WFV is found to have the dominated role in the variation of RF small-signal parameters, while LER and GER played a positive promotion role in aggravating the variation. The underlying physical mechanisms are discussed in detail.

Effect of Work-function Variation on Transfer Characteristics and Memory Performances for Gate-all-around JLFET based Capacitorless DRAM

In this study, we present variations in transfer characteristics and memory performances caused by work-function variation (WFV) in the metal gate of a one-transistor dynamic random-access memory cell based on a gate-all-around junctionless field-effect transistor (GAA-JLFET). To investigate the influence of WFV, we simulated 200 samples of GAA-JLFETs. The samples had different transfer characteristics depending on the metal grain granularity. In addition, we calculated and analyzed the mean and standard deviations for the transfer characteristics. Further, the memory performances were analyzed using two extreme cases with the highest and lowest threshold voltage (V<SUB>th</SUB>) as examples. When WFV was not considered, the current ratio was 108, and retention time was more than 10 ms. Meanwhile, when WFV was considered, the current ratio was 10² and 10⁴, and the retention time was reduced to 0.051 ms and 2.2 ms, respectively. These results showed that WFV affected not only the transfer characteristics in GAA-JLFET but also the memory performances; it could adversely affect the reliability of the memory device.

Hot carrier effect in Ferro-FinFET for variation in temperature, work function, and FE layer thickness

Using 3D TCAD simulator, the hot carrier effects (HCEs) in terms of impact ionization rate and horizontal electric field are reported for Ferro-FinFET taking temperature, work function of gate (ɸM), and ferroelectric thickness (tFE) as parameters. It is observed, these parameters have significant impact on the HCEs of Ferro-FinFET. It is perceived from analysis that temperature, ɸM, and tFE have observable impact on DC characteristics and a hysteresis loop is formed between forward and reverse sweep. We have shown the impact of temperature, ɸM, and tFE on the subthreshold swing (SS) and the ION/IOFF of Ferro-FinFET.

Linearity and Analog Performance Analysis of Silicon Junctionless Bulk FinFET Considering Gate Electrode Workfunction Variability and Different Fin Aspect Ratio

Linearity and Analog Performance Analysis of Silicon Junctionless Bulk FinFET Considering Gate Electrode Workfunction Variability and Different Fin Aspect Ratio

Suppression of Statistical Variability in Stacked Nanosheet Using Floating Fin Structure

A novel floating fin-structured nanosheet (FNS) is proposed to improve the work function (WF) variation by the fluctuation of the space between channels ( ${T}_{{\text {sp}}}$ ) in vertically stacked nanosheet devices. Through computer aided design (TCAD) simulations with calibrated models, it is found that the WF variation induces the serious variations of electrical characteristics such as threshold voltage and current drivability, and FNS is more robust against the ${T}_{{\text {sp}}}$ fluctuation than laterally long nanosheet (LNS) thanks to its unique structure where the channel adjacent to the ${T}_{{\text {sp}}}$ occupies a small portion of the entire channel. Furthermore, based on figures of merit (FoMs) analysis, it is revealed that the slow corner margin of FNS is significantly improved without sacrificing the device performances, which is advantageous for near-threshold-voltage (NTV) designs.

Architecture and Optimization of 2T (Footprint) SRAM

A 6T-SRAM bitcell with the footprint of only two transistors is demonstrated by stacking four n-type vertical gate-all-around transistors (VFET) on two pFinFETs. The local interconnects are all within the footprint of the two bottom pFinFETs. The bitcell area is <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.014~\mu \text{m}^{{2}}$ </tex-math></inline-formula> considering the experimentally achievable metal pitch of 52 nm and bottom pFinFETs of 5 nm node. It can be further reduced to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.009~\mu \text{m}^{{2}}$ </tex-math></inline-formula> considering the metal pitch of 30 nm. The minimum operating voltage is analyzed considering the dominant work function variation. The fin height of pFETs and the gate length of nFETs are used to optimize the read/write static noise margin (RSNM/WSNM) for the same bitcell area. The cell ratio is insensitive to pFET fin height and nFET gate length, leading the read stability to be less affected by pFET fin height and nFET gate length as compared to the write stability. The minimum operating voltage is reduced to 0.59 V using pFET fin height of 15 nm and nFET gate length of 20 nm to balance the read/write SNM without assist circuit techniques. The minimum operating voltage can be further improved to 0.56 V by optimizing the threshold voltage of −0.27 and 0.27 V for pFETs and nFETs, respectively. Moreover, using the negative bitline (NBL) technique can provide an additional 320 mV reduction on the write minimum operating voltage.

Design and Self-Consistent Schrodinger-Poisson Model Simulation of Ultra-Thin Si-Channel Nanowire FET

Since at the regime of nanometer, the quantum confinement effects are observed and the wave nature of electrons is more dominant. Therefore, the classical approach of current formulation in mesoelectonics and nanoelectronics results in inaccuracy as it does not consider the quantum effect, which is only applicable for the bulk electronic device. For accurate modeling and simulation of nanoelectronics, device atomic-level quantum mechanical models are required. In this work, an ultra-thin (2 nm diameter) Silicon- channel Cylindrical Nanowire FET (CNWFET) is designed and simulated by invoking non-equilibrium green function (NEGF) formalism and self-consistent Schrodinger-Poisson’s equation model. Then impact variation of temperature, oxide thickness, and metal work function variation in the NWFET is investigated to analyze the distinct performance parameters of the device e.g. threshold voltage (Vth) drain induced barrier lowering (DIBL), sub-threshold swing (SS), and ION/IOFF ratio. The designed device exhibits reliable results and shows a SS of 57.8 mV/decade and ION to IOFF ratio of order 109 at room temperature.

3-D TCAD Monte Carlo Device Simulator: State-of-the-art FinFET Simulation

This work presents a comprehensive description of an in-house 3D Monte Carlo device simulator for physical mod-eling of FinFETs. The simulator was developed to consider var-iability effects properly and to be able to study deeply scaled devices operating in the ballistic and quasi-ballistic regimes. The impact of random dopants and trapped charges in the die-lectric is considered by treating electron-electron and electron-ion interactions in real-space. Metal gate granularity is in-cluded through the gate work function variation. The capability to evaluate these effects in nanometer 3D devices makes the pre-sented simulator unique, thus advancing the state-of-the-art. The phonon scattering mechanisms, used to model the transport of electrons in pure silicon material system, were validated by comparing simulated drift velocities with available experi-mental data. The proper behavior of the device simulator is dis-played in a series of studies of the electric potential in the device, the electron density, the carrier's energy and velocity, and the Id-Vg and Id-Vd curves.

Impact of Process-Induced Variations on Negative Capacitance Junctionless Nanowire FET

In this study, the impact of the negative capacitance (NC) effect on process-induced variations, such as work function variation (WFV), random dopant fluctuation (RDF), and line edge roughness (LER), was investigated and compared to those of the baseline junctionless nanowire FET (JL-NWFET) in both linear (Vds = 0.05 V) and saturation (Vds = 0.5 V) modes. Sentaurus TCAD and MATLAB were used for the simulation of the baseline JL-NWFET and negative capacitance JL-NWFET (NC-JL-NWFET). Owing to the NC effect, the NC-JL-NWFET showed less variation in terms of device performance, such as σ[Vt], σ[SS], σ[Ion/Ioff], σ[Vt]/µ[Vt], σ[SS]/µ[SS], and σ[Ion/Ioff]/µ[Ion/Ioff], and enhanced device performance, which implies that the NC effect can successfully control the variation-induced degradation.

KPFM and DFT as tools to correlate the charge distribution and molecular orientation of dendritic adsorbates on different surfaces

The interaction between metals and organic layers is currently a hot topic due to its relevance in future applications based on hybrid organic/inorganic systems at the nanoscale. This work studies the surface modification of HOPG and gold substrates by spontaneous adsorption of aryl-dendrons based on either 3,5-bis(3,5-dinitrobenzoylamino) or 3,5-bis(3,5-diaminobenzoylamino) benzoic acids at fully controlled conditions. KPFM is used to assess the local work function variations upon assembly. A correlation between changes in work function values and spatial ordering of the adsorbates is observed. The aryl-dendrons interact with graphite surfaces through π-π stacking, allowing the formation of ordered layers. Due to depolarization effects, these films cause changes in the local work function values that are smaller on graphite surfaces than on gold substrates. Furthermore, the presence of molecular aggregates driven by intermolecular hydrogen bonding for the case of amino functionalized surfaces has a direct impact on the local work function, which varies depending on whether the areas are partially covered or densely packed. DFT calculations were performed in order to gain a deeper understanding of the correlation between the work function variations and the orientation of the effective molecular dipole moment due to the underlying molecular structures of the adsorbed layer.

Work function variations on electrostatic and RF performances of JLSDGM Device

This paper offers a systematic analysis on the impact of work function (WF) variations on electrostatic and radio frequency (RF) performances of nchannel junctionless strained double gate (DG) (n-JLSDGM) metal oxide semiconductor field effect transistor (MOSFET). The study has been performed under othe constant level of design parameters that operates in saturation as a transconductance amplifier, considering the dependence of electrostatic and RF performance on the variation of WF. Furthermore, this paper aims to provide physical insight into the improved electrostatic and RF performances of the proposed n-JLSDGM device. The device layout and characteristics were designed and extracted respectively via a comprehensive 2-D simulation. Device performances such as on-state current (ION), off-state current (IOFF), on-off current ratio, subthreshold swing (SS), intrinsic capacitances, dynamic power dissipation (Pdyn), cut-off frequency (fT) and maximum oscillation frequency (fmax) are intensively investigated in conjunction with WF variations.

Local stiffness and work function variations of hexagonal boron nitride on Cu(111).

Combined scanning tunnelling and atomic force microscopy using a qPlus sensor enables the measurement of electronic and mechanic properties of two-dimensional materials at the nanoscale. In this work, we study hexagonal boron nitride (h-BN), an atomically thin 2D layer, that is van der Waals-coupled to a Cu(111) surface. The system is of interest as a decoupling layer for functional 2D heterostructures due to the preservation of the h-BN bandgap and as a template for atomic and molecular adsorbates owing to its local electronic trapping potential due to the in-plane electric field. We obtain work function (Φ) variations on the h-BN/Cu(111) superstructure of the order of 100 meV using two independent methods, namely the shift of field emission resonances and the contact potential difference measured by Kelvin probe force microscopy. Using 3D force profiles of the same area we determine the relative stiffness of the Moiré region allowing us to analyse both electronic and mechanical properties of the 2D layer simultaneously. We obtain a sheet stiffness of 9.4 ± 0.9 N·m−1, which is one order of magnitude higher than the one obtained for h-BN/Rh(111). Using constant force maps we are able to derive height profiles of h-BN/Cu(111) showing that the system has a corrugation of 0.6 ± 0.2 Å, which helps to demystify the discussion around the flatness of the h-BN/Cu(111) substrate.

Performance Investigation of Novel Pt/Pd-SiO2 Junctionless FinFET as a High Sensitive Hydrogen Gas Sensor for Industrial Applications

In this paper, a junctionless (JL) Silicon FinFET (Fin Field effect transistor) has been designed as a hydrogen gas (H <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> ) sensor. An analytical model has been developed to analyze the response of junctionless FinFET for detection of hydrogen gas. Palladium is used as a catalytic metal gate. The variation in the gas molecule concentration alters the pressure induced on the catalytic metal gate which changes work function of the metal gate. This variation in metal gate work function is used for detecting the presence of the hydrogen gas. Various electrical parameters for which designed gas sensor is analyzed are- surface potential, threshold voltage, drain current, transconductance, output conductance and charge concentration. The sensitivity analysis in terms of threshold voltage and drain current at different pressures is also carried out. The performance of the sensor with catalytic gate metals-palladium (Pd) and platinum (Pt) is analyzed to find which metal gate gives better response as a hydrogen gas sensor. The JL FinFET is also compared with JL Gate All Around (GAA) transistor for threshold voltage and drain current sensitivity.

Microconical Structure Formation and Field Emission From Atomically Heterogeneous Surfaces Created by Microwave Plasma–Based Low-Energy Ion Beams

We report the formation of self-organized microconical arrays on copper surface when exposed to high flux (5.4 × 1015 cm−2 s−1) of 2 keV argon ion beams at normal incidence. The created microconical arrays are explored for field emission properties. The surface morphologies are investigated by scanning electron microscopy and atomic force microscopy. The local work function variation is analyzed by Kelvin probe force microscopy, and the argon content in the irradiated layer is measured with X-ray Photoelectron Spectroscopy. The average aspect ratio (base width/height) of microstructures for individual irradiated samples is found to increase from 0.7 to 1.5 with a decrease in ion fluence. The ion concentration is highest (3.89 %) for a fluence of 4.7 × 1018 cm−2, which asserts the formation of atomically heterogeneous surface due to subsurface ion implantation. An enhancement in the field emission properties of the argon ion–treated copper substrates at a fluence of 4.7 × 1018 cm−2 with a low turn-on voltage of 2.33 kV and with electron emission current 0.5 nA has been observed. From the Fowler–Nordheim equations, the field enhancement factor is calculated to be 5,561 for pristine copper, which gets enhanced by a factor of 2–8 times for irradiated substrates. A parametric model is considered, by taking into account the modified local work function caused due to structural undulations of the microstructures and presence of implanted argon ions, for explaining the experimental results on the field enhancement factor and emission current.

Influences of Work Function Changes in NO2 and H2S Adsorption on Pd-Doped ZnGa2O4(111) Thin Films: First-Principles Studies

The work function variations of NO2 and H2S molecules on Pd-adsorbed ZnGa2O4(111) were calculated using first-principle calculations. For the bonding of a nitrogen atom from a single NO2 molecule to a Pd atom, the maximum work function change was +1.37 eV, and for the bonding of two NO2 molecules to a Pd atom, the maximum work function change was +2.37 eV. For H2S adsorption, the maximum work function change was reduced from −0.90 eV to −1.82 eV for bonding sulfur atoms from a single and two H2S molecules to a Pd atom, respectively. Thus, for both NO2 and H2S, the work function change increased with an increase in gas concentration, showing that Pd-decorated ZnGa2O4(111) is a suitable material in NO2/H2S gas detectors.

Design and Temperature Assessment of Junctionless Nanosheet FET for Nanoscale Applications

Nanosheets are the revolutionary change to overcome the limitations of FinFET. In this paper, the temperature dependence of 10 nm junctionless (JL) nanosheet FET performance on DC and analog/RF characteristics are investigated for the first time using extended source/drain and with high-k gate stack. The detailed DC performance analysis like transfer characteristics (ID-VGS), output characteristics (ID-VDS), drain induced barrier lowering (DIBL), subthreshold swing (SS) and ION/IOFF ratio are evaluated from 200 K to 350 K. We also analyzed the temperature effect on the ON-OFF performance metric (Q), dynamic power, and power consumption. Furthermore, to understand the device performance on various process parameters like doping and work function variations are presented at 300 K. The proposed device exhibits good ION/IOFF switching behavior with IOFF reaching less than nA for all temperatures. The cutoff frequency (fT) is determined to be in the THz range the Q ranges between 1.5 to 2.2 μS-dec/mV for temperatures between 200 K to 350 K at LG of 10 nm. Moreover, the scaling effect of nanosheet at various gate lengths (LG = 5 to 20 nm) are also presented. From simulation analysis we notice that analog/RF performance parameters of a JL nanosheet FET are less sensitive to temperature variations. At extremely scaled LG the JL nanosheet FET exhibits lesser power consumption, power and decreases with increase in temperature. Thus, the proposed JL nanosheet FET demonstrates as a strong potential contender for low power and high frequency applications at nano-regime.

Performance improvement of spacer engineered n-type SOI FinFET at 3-nm gate length

In this paper, for the first time, we have investigated the DC and analog/RF performance metrics of 3 nm gate length (LG) silicon-on-insulator (SOI) FinFET using HfxTi1−xO2 high-k material in gate stack to improve subthreshold characteristics. The 3-D device performance of single-k, dual-k, and hybrid spacer is compared without spacer dielectric, and DC characteristics are presented. In this move, it is noticed that the device attains the highest ION/IOFF ratio of ~109 compared to ~105 due to an increase of effective gate length by fringing fields with spacer dielectric. Moreover, to evaluate and understand the nanostructure performance comparison is made between Junctionless (JL), Accumulation (ACC), and Inversion (INV) modes. The device exhibits excellent DC characteristics with ION/IOFF ratio of ~109, subthreshold swing (SS) of ~61.8 mV/dec, drain induced barrier lowering of (DIBL < 25 mV/V), and Vth ~ 0.36 V in all three modes with dual-k spacer. Moreover, the impact of device dimensional and process parameters such as gate length (LG), fin width (FW), fin height (FH), temperature (T), and work function variations on switching characteristics (ION/IOFF) are extracted and studied. The device performance acknowledges that Moore’s law can be validated even in 3 nm nodes to continue further scaling.

The Use of Green‐Solvent Processable Molecules with Large Dipole Moments in the Electron Extraction Layer of Inverted Organic Solar Cells as a Universal Route for Enhancing Stability

AbstractEmploying a large dipole interlayer has recently been one of the most captivating interfacial engineering approaches in organic solar cells (OSCs). In this work, the effect of using green‐solvent processable molecules with large dipole moments as electron extraction layers (DM‐EELs) on OSCs’ stability is investigated. The inverted OSCs are based on two donor–acceptor systems, with histidine and sarcosine as representative DM‐EELs and with ZnO as a control EEL. Stability results illustrate that while the dominant degradation mechanism depends on the donor–acceptor system (photoinduced degradation vs temporal degradation), using DM‐EELs substantially suppresses degradation and enhances stability in both cases. The voltage‐dependent ideality factor characteristics show that the DM‐EEL OSCs exhibit minimal recombination mechanism changes even after UV exposure. By contrast, ZnO cells are limited by significant shunt formation and UV‐induced surface recombination. Low‐temperature measurements verify that unlike the indium tin oxide (ITO)/ZnO contact, the ITO/DM‐EEL contact is not affected by trap states or work function variations. As a result, the ITO/DM‐EEL contact maintains its electron‐selectivity and resists UV‐induced surface recombination observed in the ZnO cells. The results show that using green‐solvent processable materials with large dipole moments as EELs can provide a universal route for enhancing the stability of inverted OSCs.

Analytical Modeling and Performance Analysis of Surface Potential for Junctionless MOSFET

The advancement in semiconductor technology requires small devices with low power consumption. This paper presents an analytical modeling of surface potential for junctionless MOSFET. Parabolic approximation is utilized to find out the surface potential. The effect of device parameter variation on surface potential and electric field has been studied. The variation in gate work function has been investigated for surface potential. Moreover, the consequence of variations in device parameters like drain bias, gate length ratio, radius of silicon pillar and doping concentration are also inspected. It is found that present device shows an excellent behaviour for future VLSI chips. The analytical results are matched with the TCAD results which validates the model.