Abstract

Nanosheets are the revolutionary change to overcome the limitations of FinFET. In this paper, the temperature dependence of 10 nm junctionless (JL) nanosheet FET performance on DC and analog/RF characteristics are investigated for the first time using extended source/drain and with high-k gate stack. The detailed DC performance analysis like transfer characteristics (ID-VGS), output characteristics (ID-VDS), drain induced barrier lowering (DIBL), subthreshold swing (SS) and ION/IOFF ratio are evaluated from 200 K to 350 K. We also analyzed the temperature effect on the ON-OFF performance metric (Q), dynamic power, and power consumption. Furthermore, to understand the device performance on various process parameters like doping and work function variations are presented at 300 K. The proposed device exhibits good ION/IOFF switching behavior with IOFF reaching less than nA for all temperatures. The cutoff frequency (fT) is determined to be in the THz range the Q ranges between 1.5 to 2.2 μS-dec/mV for temperatures between 200 K to 350 K at LG of 10 nm. Moreover, the scaling effect of nanosheet at various gate lengths (LG = 5 to 20 nm) are also presented. From simulation analysis we notice that analog/RF performance parameters of a JL nanosheet FET are less sensitive to temperature variations. At extremely scaled LG the JL nanosheet FET exhibits lesser power consumption, power and decreases with increase in temperature. Thus, the proposed JL nanosheet FET demonstrates as a strong potential contender for low power and high frequency applications at nano-regime.

Highlights

  • Due to a wide range of applications in electronic fields like military, automobiles, nuclear sector, satellite communications, space, infrared detectors, and terrestrial systems which are highly temperature dependent [1,2,3]

  • The variation in ION/IOFF ratio is due to a change in OFF current (IOFF) only

  • The potential distribution is more towards the drain and is minimal towards the channel and source side which reduces short channel effects (SCEs)

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Summary

Introduction

Due to a wide range of applications in electronic fields like military, automobiles, nuclear sector, satellite communications, space, infrared detectors, and terrestrial systems which are highly temperature dependent [1,2,3]. In order to counter these SCEs metal oxide semiconductor field effect transistor (MOSFET) with more than one gate is a viable option for future nano transistors. One such device is FinFET in which short channel effects (SCEs) have been reduced by wrapping the channel from three sides. For sub-10 nm technology nodes more robust structure that can control the channel from all directions is highly essential in order to control the channel to avoid SCEs. The gate-all-around structures like GAA nanowire, GAA nanoplate and nano-sheet are the suitable candidates that can replace FinFET at sub-10 nm regime [7]. The limiting factors of GAA nanowire transistor is lower drive current due to lower effective channel widths

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