Abstract

This paper adapts 3-D quantum transmission model to evaluate the performances of the junctionless (JL) FinFET devices for silicon-on-insulator (SOI) and bulk FinFET structures using high-k/materials as gate oxide dielectrics materials. Silicon dioxides (SiO 2 ), silicon nitride (Si 3 N 4 ), hafnium dioxide (HfO 2 ) are used as the dielectric materials of the simulated JL FinFETs. Various device characteristics, such a subthreshold swing, drain-induced barrier lowering and On/Off current, are also explored under different gate lengths and fin widths. The simulated results reveal the device characteristic degrades with the gate length decreases from 20 to 10 nm dramatically under any configurations. The JL bulk transistor have greater performance than SOI structure under the short channel by adjusting the device's threshold voltage with the doping concentration of the substrate. Considering the transistor performance, HfO 2 is the only acceptable gate oxide dielectric material as the gate length is less than 14 nm.

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