Single Event Upset Research Articles

Efficacy of Spatial and Temporal RHBD Techniques at Advanced Bulk FinFET Technology Nodes

Single-event (SE) performance of a variety of radiation-hardened by design (RHBD) flip flop (FF) circuits are evaluated at the 7-nm and 5-nm bulk FinFET nodes. For a given RHBD technique, the 5-nm node design has a single-event upset (SEU) cross-section an order of magnitude higher than that at the 7-nm node. Such an increase in SEU cross-section was not seen with scaling of previous nodes. Simulations indicate that the increase in SEU cross-section is due to disproportionate changes in single-event transient pulse-widths and sensitive areas after an ion strike. A figure-of-merit is proposed to quantify the efficacy of a given RHBD technique. RHBD FF designs are evaluated using this metric to show the efficacy of spatial and temporal RHBD techniques at the 7-nm and 5-nm technology nodes at both nominal and reduced supply voltage operations.

Evaluation of the Single-Event-Upset Vulnerability for Low-Energy Protons at the 7- and 5-nm Bulk FinFET Nodes

Upsets due to low-energy protons are a concern for highly scaled technology nodes as critical charges for storage cells continue to decrease. This work evaluates the SEU vulnerability of D-FF and SRAM designs at the 7-nm and 5-nm bulk FinFET nodes. D-FF designs at the 5-nm node have single-event upset (SEU) cross-sections that are an order of magnitude greater than that of the 7-nm node due to unbalanced decreases in critical charge and collected charge. Upsets were observed for a wider range of proton energies for the 5-nm node than the 7-nm node D-FFs due to the decreases in critical charge and changes in fin geometry with scaling. Despite its smaller cell size, the single-port SRAM design was more susceptible than the two-port SRAM design due to the lower critical charge. Multi-cell upsets due to lower-energy protons were observed for the first time for SRAM designs at the 5-nm node. The results of this study indicate that designers will need to be mindful of SEUs for environments with significant fluxes of low-energy protons.

An Analysis of the Significance of the 14N(n, p) 14C Reaction for Single-Event Upsets Induced by Thermal Neutrons in SRAMs

The thermal neutron threat to the reliability of electronic devices caused by <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">10</sup> B capture is a recognized issue that prompted changes in the manufacturing process of electronic devices with the aim of limiting as much as possible the presence of this isotope nearby device sensitive volumes. <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">14</sup> N can also capture thermal neutrons and release low-energy protons (through the <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">14</sup> N(n,p) <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">14</sup> C reaction) that have high enough linear energy transfer to cause single-event upsets (SEU). Typically, nitrogen is used in thin barrier layers made of TaN or TiN or even as insulator in the form of Si <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sub> . Numerical simulations on sensitive volumes calibrated on proton and ion experimental data and with an accurate description of the metallization layer on top of the sensitive region show that the presence of nitrogen in these thin barrier layers can be enough to justify the experimentally observed thermal neutron SEU cross section for a static random access memory sensitive to low-energy protons. Nevertheless, the expected SEU cross section from thermal neutrons is usually a few orders of magnitude lower than that of high-energy particles, therefore, not representing an important threat in atmospheric applications. At the same time, for high-energy accelerators, the contribution to the total soft error rate could become substantial, though easy to handle by margins.

Smart-Redundancy With In Memory ECC Checking: Low-Power SEE-Resistant FPGA Architectures

In harsh environments, such as space, radiation, and charged particles cause single-event effects (SEEs), faults occurring randomly on any electronic component. These must be mitigated to ensure device functionality. Modern mitigation methods, such as triple modular redundancy (TMR), are very effective against single-event transients (SETs) but incur a minimum of 3 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times$</tex-math> </inline-formula> cost in the area. Single-event upsets (SEUs) affect sequential elements and are regularly repaired using memory scrubbing. Scrubbing is a slow serial process going through every memory word, looking for errors to repair. Scrubbing involves a nonnegligible amount of time before an error is detected, during which other events can occur and compromise the system. Field-programmable gate arrays (FPGAs) rely heavily on sequential elements to store their configuration; thus, FPGA’s SEU detection time is critical to ensuring design sustainability in harsh conditions. In this article, we propose an alternative mitigation method based on sensor integration and FPGA architecture modification, called smart-redundancy with in-memory error correction code checking (SRIMECCC). The sensors allow asynchronous SEU detection, reducing the time to detect by 57 250 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times$</tex-math> </inline-formula> on average and enabling local reconfiguration. Our method includes built-in dual redundancy that reduces the power consumption by 87% on average, benefiting embedded systems. SRIMECCC is also an area-efficient technique that saves 28% of total effective area compared to TMRed designs implemented in FPGAs.

Medium-Earth-Orbit Spaceflight Radiation Effects in Triple Modular System on Programmable Device

This work presents experimental results of medium-Earth orbit (MEO) spaceflight radiation effects in a COTS SRAM-based FPGA (commercial off-the-shelf static random access memory-based field programmable gate array) device implementing a case-study digital system design protected with the classical triple modular redundancy (TMR) technique. This UGA/TIMA’s experiment is a part of the NASA/GSFC’s SET (space environment testbeds) payload launched in the AFRL’s DSX (demonstration and science experiments) spacecraft in June 2019. Results report 69 single-event upset (SEU)-induced failures in the TMR-protected case-study system, moreover total ionizing dose effects for nearly two years of space mission seem not to contribute to an increment of SEU-induced failures.

Analysis of the Radiation Field Generated by 200-MeV Electrons on a Target at the CLEAR Accelerator at CERN

The radiation showers generated by the interaction of high-energy electrons with matter include neutrons with an energy distribution peaked at the MeV scale, produced via photonuclear reactions, allowing measurements of neutron-induced Single-Event Effects in electronic devices. In this work we study a setup where the 200-MeV electron beam of the CLEAR accelerator at CERN is directed on an aluminum target to produce a radiation field with a large neutron component. The resulting environment is analyzed by measuring the Single-Event Upset (SEU) and Latchup rates in well-characterized SRAMs, as well as the Total Ionizing Dose in passive Radio-Photo-Luminescence dosimeters, and by comparing the results with predictions from FLUKA simulations. We find that a lateral shielding made of lead protects the SRAMs from an excessive TID rate, yielding an optimal configuration for SEU measurements, particularly in SRAMs that are highly sensitive to MeV-scale neutrons. This setup provides an interesting complementary neutron source with respect to standard neutron facilities based on spallation targets or radioactive sources.

USE OF OPEN-SOURCE COTS/MOTS HARDWARE AND SOFTWARE PLATFORMS FOR THE BUILD UP OF THE CUBESAT NANOSATELLITES

Abstract. CubeSats as a sub-class of nanosatellites have become a game-changer in the industry of scientific research and exploration of the new space technologies. Their cost effectiveness, relative ease of manufacturing, and the predicted lifecycle are the main factors of success. Having such popularity in mind – many vendors, student teams and enthusiast started to build their platforms to offer reuse and faster buildup of such satellites, introducing so-called COTS/MOTS approach of the satellite’s construction. However, looking into statistics – only 2.5% of the launched satellites were able to full perform their mission, and almost 25% just failed. Partially, the key problems are in the area of using non-radiation hardened electronics as the CubeSat idea is to use commercial (or at utmost automotive) components. Authors of the article provide a holistic view on the existing hardware and software platforms that are currently available as COTS/MOTS solutions, as well as their capabilities. Part of the research was done in the area of the available software frameworks, as the modern software has rather high cyclomatic complexity and often it is exactly software components that make CubeSat mission at risk. Software related frameworks are compared via the use of newly introduced by the authors multi-factor ranking model (FMCSA). At the same time the article raises the cross-country problem of the creation and use of the Ukrainian platform for the CubeSats. Authors propose a solution for the creation of the part of the CubeSat platform as the starting point and it is an On-Board Computer (OBC). The idea is to design an OBC that can solve the big portion of the known issues of the CubeSat hardware and software with the major stress on the hardware issues related to the Single-Event Upset (SEU) and Single-Event Latch Up (SEL), without moving to the radiation tolerant semiconductors. Proposed in the article solution combines the selection of the modern central processor, that is industry recognized, availability of the software solutions for it, as well as the power-domains control principle that allows to minimize the potential harm of the SEU and SEL radiation-driven events.

Radiation hardened 12T SRAM cell with improved writing capability for space applications

This paper presents an inventive and extremely dependable radiation-hardened by-design (RHBD) 12T SRAM Cell with enhanced writing capability (RHWC-12T) for a space radiation environment. The Proposed RHWC-12T SRAM is designed on Cadence Virtuoso with quad-storage nodes and simulated in 45-nm CMOS technology with the supply voltage of 1.1 V and 27∘C operating temperature. The proposed cell is tolerant to both 0 to 1 and 1 to 0 SEUs (Single event upsets). Also, it provides better speed and stability compared to the other considered SRAM cells such as 6T, 10T Dohar, Quatro, We-Quatro, QUCCE-12T, and NQuatro. According to simulation findings, the proposed SRAM cell provides 1.053× better writing stability than the 10T Dohar SRAM cell. In addition, the write access time improves by 3.56× with 1.36× area overhead than 10T Dohar SRAM cell.

Soft-Error-Aware Radiation-Hardened Ge-DLTFET-Based SRAM Cell Design

In this paper, a soft-error-aware radiation-hardened 6T SRAM cell has been implemented using germanium-based dopingless tunnel FET (Ge DLTFET). In a circuit level simulation, the device-circuit co-design approach is used. Semiconductor devices are very prone to the radiation environment; hence, finding out the solution to the problem became a necessity for the designers. Single event upset (SEU), also known as soft error, is one of the most frequent issues to tackle in semiconductor devices. To mitigate the effect of soft error due to single-event upset, the radiation-hardening-by-design (RHBD) technique has been employed for Ge DLTFET-based SRAM cells. This technique uses RC feedback paths between the two cross-coupled inverters of an SRAM cell. The soft-error sensitivity is estimated for a conventional and RHBD-based SRAM cell design. It is found that the RHBD-based SRAM cell design is more efficient to mitigate the soft-error effect in comparison to the conventional design. The delay and stability parameters, obtained from the N-curve, of the Ge DLTFET-based SRAM cell performs better than the conventional Si TFET-based SRAM cell. There is an improvement of 305x &amp; 850x in the static power noise margin and write trip power values of the Ge DLTFET SRAM cell with respect to the conventional Si TFET SRAM cell.

Investigation of Single-Event Upset in Graphene Nano-Ribbon FET SRAM Cell.

In recent years, graphene has received so much attention because of its superlative properties and its potential to revolutionize electronics, especially in VLSI. This study analyzes the effect of single-event upset (SEU) in an SRAM cell, which employs a metal-oxide semiconductor type graphene nano-ribbon field effect transistor (MOS-GNRFET) and compares the results with another SRAM cell designed using a PTM 10 nm FinFET node. Our simulations show that there is a change in the data stored in the SRAM after a heavy ion strike. However, it recovers from radiation effects after 0.46 ns for GNRFET and 0.51 ns for FinFET. Since the degradation observed in Q and Qb of GNRFET SRAM are 2.7X and 2.16X as compared to PTM nano-MOSFET, we can conclude that GNRFET is less robust to single effect upset. In addition, the stability of SRAM is improved by increasing the supply voltage VDD.

Measurements of radiation effects in an antifuse FPGA

This paper presents the irradiation and the measurement analysis for a commercial antifuse Field Programmable Gate Array (FPGA) from Microsemi’s Axcelerator family, part number AX250. Following proton and X-ray beam irradiation, at very high dose rate above 1krad/s, the total ionizing dose (TID) first effects were visible around 260 krad (SiO 2), and this threshold value increases at lower radiation dose rates. We expect for most space and accelerator applications that this value will be at least several Mrads, or even that the FPGA might never reach this threshold. At very high radiation dose rates, TID-induced leakage currents were observed in the device. FPGA data were recorded continuously for more than 100 h after each irradiation with a fully operating FPGA. Quantitatively, the room-temperature annealing of the radiation-induced defects leads to a fast decrease of the device leakage current by a factor of 7 in the first 100 h after irradiation. The last measurements done after three months place the currents to within 30% to 70 % relative to the before-irradiation values in case of two tested FPGA. Several firmware configurations were used to test different logic resources and to measure single event upsets (SEUs). An upper limit of SEU logic cross-section was found to be (2.56 ± 0.51) ⋅ 10−13 cm 2/FPGA for dose rates around 1krad/s. SEU cross-section values for RAM blocks have on average a value of (3.72 ± 0.8) ⋅ 10−14 cm 2/bit. The complete list of results is given and the effects are extrapolated to a high-energy physics experiment environment — LHCb RICH at CERN.

Disturbances from single event upsets in the GRACE follow-on laser ranging interferometer

The GRACE – Follow On (GRACE-FO) satellite mission (2018-now) hosts the novel Laser Ranging Interferometer (LRI), a technology demonstrator for proving the feasibility of laser interferometry for inter-satellite ranging measurements. The GRACE-FO mission extends the valuable climate data record of changing mass distribution in the system Earth, which was started by the original GRACE mission (2002–2017). The mass distribution can be deduced from observing changes in the distance of two low-earth orbiters employing interferometry of electromagnetic waves in the K-Band for the conventional K-Band Ranging (KBR) and in near-infrared for the novel LRI.This paper identifies possible radiation-induced Single Event Upset (SEU) events in the LRI phase measurement. We simulate the phase data processing within the Laser Ranging Processor (LRP) and use a template-based fitting approach to determine the parameters of the SEU and subtract the events from the ranging data. Over four years of LRI data, 31 of such events were identified and characterized.

Heavy Ion Single Event Effects in CMOS Image Sensors: SET and SEU

High-energy particles in space often induce single event effects in CMOS image sensors, resulting in performance degradation and functional failure. This paper focuses on the formation and morphology of transient bright spots in CMOS image sensors and analyzes the formation process of transient bright spots by conducting heavy ion irradiation experiments to obtain the variation law of transient bright spots with heavy ion linear energy transfer values and background gray values; in addition, we classify the single event upset that occurred in the experiments according to the state of transient bright spots and extract the characteristics of different single event upsets. The failure mechanisms of different single event upsets are analyzed according to their characteristics and are combined with the information given by transient bright spots. This provides an essential reference for rapidly evaluating single event effects and the reinforcement design of CMOS image sensors.

A High-Reliability 12T SRAM Radiation-Hardened Cell for Aerospace Applications.

The static random-access memory (SRAM) cells used in the high radiation environment of aerospace have become highly vulnerable to single-event effects (SEE). Therefore, a 12T SRAM-hardened circuit (RHB-12T cell) for the soft error recovery is proposed using the radiation hardening design (RHBD) concept. To verify the performance of the RHB-12T, the proposed cell is simulated by the 28 nm CMOS process and compared with other hardened cells (Quatro-10T, WE-Quatro-12T, RHM-12T, RHD-12T, and RSP-14T). The simulation results show that the RHB-12T cell can recover not only from single-event upset caused by their sensitive nodes but also from single-event multi-node upset caused by their storage node pairs. The proposed cell exhibits 1.14×/1.23×/1.06× shorter read delay than Quatro-10T/WE-Quatro-12T/RSP-14T and 1.31×/1.11×/1.18×/1.37× shorter write delay than WE-Quatro-12T/RHM-12T/RHD-12T/RSP-14T. It also shows 1.35×/1.11×/1.04× higher read stability than Quatro-10T/RHM-12T/RHD-12T and 1.12×/1.04×/1.09× higher write ability than RHM-12T/RHD-12T/RSP-14T. All these improvements are achieved at the cost of a slightly larger area and power consumption.

Distributions of energy imparted to a micro-volume by secondary charged fragments of nuclear interactions in space radiation field.

The field of cosmic radiation at low-Earth orbit (LEO) has a complex composition. It always contains a component of secondary charged particles, formed by the products of nuclear interactions of the primary high-energy radiation with the nuclei of spacecraft's shielding material, electronic components and biological matter on board. Generation of this secondary radiation can be observed in some track detectors in the form of "stars" formed by tracks-fragments with a common vertex. The energy absorbed by the medium in the region adjacent to the interaction vertex can reach abnormally high values because of its intersection by several particle fragments. In the present paper, a methodology is considered to calculate the energy imparted by such fragments to a spherical sensitive volume in an aqueous medium. The energy distributions for three fragment events were calculated for different positions of the vertex relative to the spherical volume. The obtained data were analyzed and were compared with the distribution for a uniform fluence of secondary particles. It was shown that as the fragmentation vertex approaches the boundary of the sensitive micro-volume, the probability of events with anomalously high energy transfers, higher than the energies from single fragments, increases. The method can be applied to calculate absorbed energy distributions from secondary radiation in media of different elemental composition than that used in the present work. In the future, it is of interest to apply the method for example to study the energy imparted from secondary fragments to a silicon medium, to quantify the number of single event upsets in electronic components.

Design and Simulation of HiGBt, a 5 Gb/s SerDes for Heavy-Ion Physics Experiments

The Heavy Ion Research Facility on Lanzhou (HIRFL) and the High-Intensity heavy-ion Accelerator Facility (HIAF) are the leading heavy-ion physics centers. The increased scale of physics experiments at HIRFL and HIAF has put forward urgent requirements on high-speed serial data transmission links. Also, the intense radiation environment is a significant challenge to commercial ASIC. This paper presents the HiGBt, a general-purpose 5 Gbps SerDes ASIC designed in a 0.13 μm CMOS process for data transmission at HIRFL and HIAF. The HiGBt mainly consists of a Serializer, a Deserializer, and a high-speed clock system. The Serializer includes three stages to realize high-speed serialization. The Deserializer adopts a high linearity phase-interpolator-based structure to avoid coupling multi-VCOs. Finally, the high-speed clock system has a Single Event Upsets (SEUs)-protected divider. The simulation results indicate that the power consumption of the SerDes is 146.3 mW, while the layout area is 310 μm × 310 μm.

Designing and Reliability Analysis of Radiation Hardened Stacked Gate Junctionless FinFET and CMOS Inverter

Along with radiation sensing, necessity to study and design reliable radiation hardened devices is also increasing now-a-days. These devices are tolerant to high dosage of radiations without causing any physical damage, logic damage or data loss. In the current work, stacked gate Junctionless FinFET (SG JL FinFET) is analyzed as radiation hardened device by studying the impact of radiation of Linear Energy Transfer (LET) values ranging from 2MeV.cm/mg to 10MeV.cm/mg on the device performance. The proposed radiation hardened FinFET is experimentally calibrated with pre and post irradiation data. Single event upset (SEU) study using transient analysis is carried out to study the performance of proposed radiation hardened device at microwave frequency. High-k material-hafnium dioxide is used as gate oxide material to improve radiation hardness of SG JL FinFET. Electrical parameters-drain current, surface potential and SEU generation rate are studied to analyze device characteristics. Optimization of gate oxide, doping concentration, gate metals and temperature is carried out to enhance the reliability of device in terms of radiation hardness. SG JL FinFET is exposed to different types of waves-UV rays, X-ray, and Gamma rays to study the response of device at different frequencies. The comparison of SG JL and SG Inversion Mode (IM) FinFET has been performed. Comparison of SG JL FinFET with previously reported Inverted mode FinFET, L-shaped tunnel FET and Fully Depleted Silicon on Insulator (FD-SOI) MOSFET is carried out to find most suitable device which can provide highest immunity to radiation exposure. Response of JL FinFET based CMOS inverter in presence of radiation is studied and is also compared with other available CMOS inverters.

Design and Analysis of a Radiation Resistant 12T SRAM Cell for Aerospace Applications

Introduction: Advanced low-power designs have been scaled down to the device parameters that increase single-event multi-node upset in memory elements. This degradation of the stability of the memory elements in aerospace applications is due to the high radiation environment and rapid temperature changes. Method: Hence, this paper presents a comprehensive treatment model for hardened storage elements with a soft error resulting in multi-node upset. A novel 12T SRAM memory cell configuration has been proposed, analysed, and simulated using Cadence Virtuoso gpdk 45 nm CMOS technology. Result: The proposed design counteracts the positive feedback induced due to the charged ion strike, as in past technical literature. The radiation environment has been realized with double exponential current sources, and temperature analysis has been carried out under parametric analysis. Conclusion: The novel 12T achieves good stability and remains resilient to bit-flip due to ion strikes for a wider range of voltage when the temperature varies from -50oC to 200oC. Moreover, the proposed structure features a lower susceptibility to single event upset, less write and read time, and reduced area compared to the reported RSP 14T.

Testing of a new type SEU-tolerant SRAM

In high-energy physics experiments, it is a trend to implement digitalization in the front end of readout electronics based on Application Specific Integrated Circuits (ASICs), which are exposed to the radiation environment. As an important part of ASIC, SRAM (Static Random-Access Memory) is impressionable to Single Event Upset (SEU) due to the radiation environment. Therefore, a new SEU-tolerant SRAM cell structure was designed in our previous work. In this paper, a test system for evaluating the radiation tolerance effect of this SRAM structure is described, and the chip’s performance in the radiation environment is presented. The test results show that the new SRAM cell upset cross-section was reduced by five times compared with the ordinary 6T cell without increasing the power consumption.

SEU performance of Schmitt-trigger-based flip-flops at the 22-nm FD SOI technology node

Compared with bulk technologies, Fully-depleted silicon-on-insulator (FD SOI) technology nodes show better resistance to single-event upsets. However, additional hardening techniques should be investigated to mitigate upsets at this technology node. Single-event (SE) performance of multiple hardened flip-flop (FF) designs based on Schmitt-trigger circuits along with a conventional DFF design in a 22-nm FD SOI process is presented. FF designs were tested using alpha particles and heavy-ions. Results show significant reductions in SEU cross-sections compared with the conventional design. Alpha particle exposures showed zero upsets for all FF designs tested. Schmitt-trigger-based FF designs showed from 2× to 200× improvement in heavy-ion SEU cross-sections compared with the conventional DFF design.