Reverse Recovery Time Research Articles

Proposal and design of a new SiC-emitter lateral NPM Schottky collector bipolar transistor on SOI for VLSI applications

A novel bipolar transistor structure, namely, a SiC emitter lateral NPM Schottky collector bipolar transistor (SCBT) with a silicon-on-insulator (SOI) substrate is explored using two-dimensional (2-D) simulation. A comprehensive comparison of the proposed structure with its equivalent Si lateral NPN BJT and an SiC emitter lateral NPN HBT is presented. Based on simulation results, the authors demonstrate for the first time that the proposed SiC emitter lateral NPM transistor shows superior performance in terms of high current gain and cut-off frequency, reduced collector resistance, negligible reverse recovery time and suppressed Kirk effect over its equivalent Si lateral NPN BJT and SiC emitter lateral NPN HBT. A simple fabrication process compatible with BiCMOS technology is also discussed.

Current–voltage and reverse recovery characteristics of bulk GaN p-i-n rectifiers

p-i-n rectifiers were fabricated on epitaxial layers grown on free-standing GaN substrates. The forward turn-on voltage, VF was ∼5 V at 300 K and displayed a positive temperature coefficient. The specific on-state resistance (RON) was ∼5 mΩ cm2 at 300 K, with an ideality factor of ∼2 and activation energy for low forward current density of ∼1.6 eV. This is consistent with carrier recombination in the space charge region via a midgap deep level. The figure-of-merit, VB2/RON, where VB is the reverse breakdown voltage, was 0.32 MW cm−2. The reverse recovery time was ⩽600 ns at 300 K. The improved forward characteristics relative to previous heteroepitaxial p-i-n GaN rectifiers show the advantages of employing a GaN substrate to make a true vertical transport geometry device.

2.6 A, 0.69 MW cm −2 single-chip bulk GaN p-i-n rectifier

The performance of a 9 device array of 500 × 500 μm 2 GaN p-i-n rectifiers fabricated on epitaxial layers grown on a free-standing GaN template is reported. The forward turn-on voltage was ∼5.5 V at 25 °C, with an on-state resistance of ∼5 × 10 −3 Ω cm 2. The total forward current was 1 A at ∼8.8 V and 2.6 A at 18 V. The power figure-of-merit for the array, V B 2/ R ON, was 0.69 MW cm −2, with a reverse recovery time of ⩽300 ns. The individual p-i-n rectifiers were interconnected using electroplated Au and clamped in a Cu pressure pack for thermal management.

Unified model and reverse recovery nonlinearities of the driven diode resonator.

We study the origins of period doubling and chaos in the driven series resistor-inductor-varactor diode (RLD) nonlinear resonant circuit. We find that resonators driven at frequencies much higher than the diode reverse recovery rate do not show period doubling. Models of chaos based on the nonlinear capacitance of the varactor diode display a reverse-recovery-like effect, and this effect strongly resembles reverse recovery of real diodes. We find for the first time that in addition to the known dependence of the reverse recovery time on past current maxima, there are also important nonlinear dependencies on pulse frequency, duty cycle, and dc voltage bias. Similar nonlinearities are present in the nonlinear capacitance models of these diodes. We conclude that a history-dependent and nonlinear reverse-recovery time is an essential ingredient for chaotic behavior of this circuit, and demonstrate for the first time that all major competing models have this effect, either explicitly or implicitly. Besides unifying the two major models of RLD chaos, our work reveals that the nonlinearities of the reverse-recovery time must be included for a complete understanding of period doubling and chaos in this circuit.

A TCAD comparative study of power rectifiers: modified P–i–N vs. modified mosaic contact P–i–N diode

This paper presents the results of a TCAD comparative study of an modified P–i–N diode (M-PiN) vs. modified mosaic contact P–i–N diode (M-MCPD). The P +/N + mosaic contact is formed on the anode’s surface by selective phosphorus and boron diffusion through its corresponding oxide mask. A significant reduction in the drift-region lifetime in the M-PiN rectifier is required to achieve the same short reverse recovery time observed in the M-MCPD rectifiers. The reduction in the reverse recovery time is mainly due to the fact that the M-MCPD rectifier has a smaller stored charge in the drift-region compared to the M-PiN rectifier. Since the forward voltage drop of the M-MCPD is not quite affected by different mosaic area ratios the M-MCPD rectifier exhibits a better trade-off between forward drop and switching characteristics compared to the M-PiN rectifier. The two-dimensional numerical study has been carried out using the circuit and system simulation programs from ISE-TCAD to realize the technological, electrical and mixed-mode simulation.

Dynamic Characteristics of 6.2 kV High Voltage 4H-SiC pn Diode with Low Loss

A 4H-SiC pin diode with improved termination named mesa JTE has been developed and a high blocking voltage of 6.2kV and a low VF of 4.7V at 100A/cm2 have been achieved. A developed diode has a short reverse recovery time of 28.5ns at room temperature. By evaluation of reverse recovery characteristics, a developed diode has a minority carrier lifetime of longer than 1μs at 350°C in spite of a minority carrier lifetime of 64ns at room temperature. Furthermore, a developed diode has 1/29th lower recovery loss than those of a commercialized 4.5kV Si diode.

High-power 4H-SiC JBS rectifiers

This paper reports the detailed design, fabrication, and characterization of two sets of high-power 4H-silicon carbide (4H-SiC) junction barrier Schottky (JBS) diodes - one with a 1500-V, 4-A capability and another with 1410-V, 20-A capability. Two-dimensional (2-D) device simulations show that a grid spacing of 4 /spl mu/m results in the most optimum trade-off between the on-state and off-state characteristics for these device ratings. JBS diodes with linear and honeycombed p/sup +/ grids, Schottky diodes and implanted p-i-n diodes fabricated alongside show that while 4H-SiC JBS diodes behave similar to,Schottky diodes in the on-state and switching characteristics, they show reverse characteristics similar to p-i-n diodes. Measurements on 4H-SiC JBS diodes indicate that the reverse-recovery time (/spl tau//sub rr/) and associated losses are near-zero even at a high reverse dI/dt of 75 A//spl mu/s. A dc/dc converter efficiency improvement of 3-6% was obtained over the fastest, lower blocking voltage silicon (Si) diode when operated in the 100-200 kHz range.

Edge termination design and simulation for bulk GaN rectifiers

GaN bulk rectifiers show excellent on-state resistances (in the mΩ cm−2 range), forward turn-on voltages of ∼1.8 V and reverse-recovery times of <50 ns. A key requirement is to develop effective edge termination techniques in order to prevent premature surface-induced breakdown. We have performed a simulation study of the effects of varying the dielectric passivation material (SiO2, SiNx, AlN, Sc2O3, or MgO), the thickness of this material, the extent of metal overlap onto the dielectric and the ramp oxide angle on the resulting reverse breakdown voltage (VB) of bulk rectifiers. We find that SiO2 produces the highest VB of the materials investigated, that there is an optimum metal overlap distance for a given oxide thickness and small oxide ramp angles produce the highest VB.

A new lateral PNM Schottky collector bipolar transistor (SCBT) on SOI for nonsaturating VLSI logic design

The novel characteristics of a new lateral PNM Schottky collector bipolar transistor (SCBT) on silicon-on-insulator (SOI) are explored using two-dimensional (2D) simulation. The collector-base junction of the proposed lateral PNM transistor consists of a Schottky junction between n-base (N) and metal (M). The characteristics of this structure are compared with that of lateral PNP transistors on SOI. We demonstrate that the proposed structure has a superior performance in terms of reduced collector resistance, high current gain, negligible base widening, and very low reverse recovery time compared to the compatible lateral PNP transistors. A simple fabrication procedure is also suggested providing the incentive for experimental verification.

All-solid-state triggerless repetitive pulsed power generator utilizing a semiconductor opening switch

The repetitive pulsed power generator was constructed with the semiconductor opening switch realizing the pulse compression by an inductive energy storage system. For the preliminary pulse compression, the magnetic pulse compression system was employed. The saturable inductors and transformers were used to transfer the electrical energy from the primary storage capacitor to the load compressing the pulse. For the final output of the generator, the semiconductor opening switch (SOS) was used. The SOS assembly used in the system consists of 80 diodes that were designed to conduct high reverse current and have short reverse recovery time. By tuning the current fed to the SOS, the amplitude and pulse width of the generated voltage at the 300 Ω resistive load were 150 kV and 60 ns, respectively. Although the present generator system operates repetitively, the system has no triggered gas-discharge or semiconductor closing switch. Also, all the devices used in the system are in solid sate. The system provides stable operation and long lifetime.

Irradiation of semiconductor devices using a 10 MeV travelling wave electron linear accelerator

A 10 MeV travelling wave electron linear accelerator, previously used for teaching, was adapted to irradiate semiconductor devices. Theoretical formulas and the EGS4 programs were used to validate the feasibility and superiority of using the 10 MeV electron linear accelerator for irradiating the semiconductor devices. Electron energies should be greater than 7 MeV to irradiate packaged high-power thyristors. Irradiation increased diodes' breakdown voltage and decreased their reverse recovery time when accelerated electrons irradiated packaged diodes. Controllable high-power packaged power thyristors are also irradiated to shorten the minority carrier lifetime and turn-off time. The resulting product quality reached expected requirements.

Using 12 MeV electron beams to develop silicon P +NN + high frequency rectifying diodes

Twelve MeV electron beams were used to irradiate common P +NN + diodes (1 A and 1 kV) in order to transfer them into high frequency rectifying ones. Some interesting results have been obtained. It seems that this method is superior to the traditional gold-doping technique in controlling precisely the lives of the minority carriers. Compared with the later electron beam irradiation made the reverse recovery time ( t rr) and FWD-voltage ( V F) of the diodes better consistent and repeatable. The high temperature performance was also obviously improved. The qualified rate of diodes was enhanced by more than 30%.

Study of a-Si:H emitters for efficient carrier injection in GaAs bipolar devices

Experimental and theoretical results are presented concerning the application of a wide gap amorphous silicon layer to improve the injection efficiency into GaAs regions. A 30 nm a-Si:H film is grown by low temperature ( T=270°C) plasma enhanced chemical vapour deposition and has an energy gap of 1.8 eV, which is 0.4 eV larger than that of the underlying crystalline GaAs. The pin diode which is fabricated has device quality rectifying properties and a reverse breakdown voltage of 120 V. When operated as a current switch it has a reverse recovery time of 20–30 ns, largely determined by the minority carrier recombination in the GaAs intrinsic layer. The theoretical analysis of the device, based on a numerical physical simulator, shows that the density of states at the interface affects the forward bias voltages and currents.

High voltage GaN Schottky rectifiers

Mesa and planar GaN Schottky diode rectifiers with reverse breakdown voltages (V/sub RB/) up to 550 and >2000 V, respectively, have been fabricated. The on-state resistance, R/sub ON/, was 6 m/spl Omega//spl middot/cm/sup 2/ and 0.8 /spl Omega/ cm/sup 2/, respectively, producing figure-of-merit values for (V/sub RB/)/sup 2//R/sub ON/ in the range 5-48 MW/spl middot/cm/sup -2/. At low biases the reverse leakage current was proportional to the size of the rectifying contact perimeter, while at high biases the current was proportional to the area of this contact. These results suggest that at low reverse biases, the leakage is dominated by the surface component, while at higher biases the bulk component dominates. On-state voltages were 3.5 V for the 550 V diodes and /spl ges/15 for the 2 kV diodes. Reverse recovery times were <0.2 /spl mu/s for devices switched from a forward current density of /spl sim/500 A/spl middot/cm/sup -2/ to a reverse bias of 100 V.

Effects of External Operating Conditions on the Reverse Recovery Behaviour of Fast Power Diodes

SummaryIn this paper, both experimetal and simulation results, showing the effects of Junction temperature, forward current and the rate of fall of forward current, or commutating di/dt on the reverse recoveyr behaviour of modern fast power diodes are presented. The main parameters used to characterise the reverse recover performance of a semiconductor diode, are the reverse recovery charge, peak recovery current and reverse recovery time. The diode snappiness phenomenon due to a current chop-off during reverse recovery, was also investigated and linked with the above parameters.

A novel circuit for accurate characterization and modeling of the reverse recovery of high-power high-speed rectifiers

As circuit switching frequency continues to increase, there is a need to produce faster rectifiers with lower power losses. Efficient utilization of high-power ultrafast rectifiers requires precise knowledge of the key static and dynamic switching parameters, especially the reverse-recovery characteristics. Conventional reverse-recovery test circuits were developed to test rectifiers with reverse-recovery times (t/sub RR/) greater than 100 ns, however, new measurement techniques are needed for accurate characterization and modeling of the high-power ultrafast rectifier reverse-recovery process. A test circuit topology is proposed which offers several advantages over existing test circuits. This circuit offers the ability to characterize high-power ultrafast rectifiers at very high di/dt and also provides independent control of bias current, reverse voltage and di/dt. This circuit is also studied using a two-dimensional (2-D) mixed device and circuit simulator in which the device under test is represented as a 2-D finite-element grid and the semiconductor equations are solved under boundary conditions imposed by the proposed test circuit. This simulation tool is used to understand the device physics of the reverse-recovery process and develop more accurate models to be implemented in behavioral circuit simulators. The simulation results are then compared to the measured data for a silicon P-i-N and 200-V GaAs Schottky rectifier under various measurement conditions. Simulation results are shown to be in excellent agreement with the measured data.

Electron irradiation for adjusting the reverse recovery time and forward voltage drop characteristics of fast diodes

The electron linear accelerator ALIN-10 has been used to irradiate at room temperature and high temperature silicon diodes type BA159, BAX157 and 6DRR1 (manufacturer – Baneasa S.A.-factory 2300, Romania). The influence of 10 MeV electron irradiation upon the main electrical characteristics (reverse recovery time, forward voltage, reverse current) has been examined for different absorbed doses (10–50 kGy) and different irradiation temperatures (25°C, 175°C, 250°C). The dependence of the minority carrier lifetime, reverse recovery time and forward voltage on the radiation dose, and the percentage distribution (%) of the reverse recovery time and of the reverse current for the irradiated diodes are presented. A comparison between the electrical performances of the fast diodes obtained by electron irradiation and the electrical performances of the fast diodes obtained by gold or platinum diffusion has been made.

High-power rectifier using the BSIT operation

A novel high-power rectifier using the BSIT (Bipolar mode Static Induction Transistor) operation has been demonstrated. In order to improve the reverse blocking capability of this diode, an ion implanted P-type channel structure is introduced. Device simulations have revealed that, as the tradeoff relationships between reverse blocking voltage, forward voltage drop, and reverse recovery time are considered, there exists an optimum set of the channel dosage and the channel width.

Silicon Carbide MOSFET Integrated Circuit Technology

The research and development activities carried out to demonstrate the status of MOS planar technology for the manufacture of high temperature SiC ICs will be described. These activities resulted in the design, fabrication and demonstration of the World's first SiC analog IC — a monolithic MOSFET operational amplifier. Research tasks required for the development of a planar SiC MOSFET IC technology included characterization of the SiC/SiO2 interface using thermally grown oxides; high temperature (350 °C) reliability studies of thermally grown oxides; ion implantation studies of donor (N) and acceptor (B) dopants to form junction diodes; epitaxial layer characterization; N channel inversion and depletion mode MOSFETs; device isolation methods and finally integrated circuit design, fabrication and testing of the World's first monolithic SiC operational amplifier IC. These studies defined a SiC n-channel depletion mode MOSFET IC technology and outlined tasks required to improve all types of SiC devices. For instance, high temperature circuit drift instabilities at 350 °C were discovered and characterized. This type of instability needs to be understood and resolved because it affects the high temperature reliability of other types of SiC devices. Improvements in SiC wafer surface quality and the use of deposited oxides instead of thermally grown SiO2 gate dielectrics will probably be required for enhanced reliability. The slow reverse recovery time exhibited by n+–p diodes formed by N ion implantation is a problem that needs to be resolved for all types of planar bipolar devices. The reproducibility of acceptor implants needs to be improved before CMOS ICs and many types of power device structures will be manufacturable.

Thermal Evolution of Rectifier Speed and Deep Levels in Irradiated Silicon

ABSTRACTP+NN+ silicon rectifiers have been irradiated by protons and alpha particles. DLTS and reverse recovery time (the so called TRR) measurements were performed in both as-irradiated and annealed (400°C) samples. The evolution of implantation induced-centers with the annealing is not the same when using the two particles. For example, the concentration of the well known A center increases (decreases) with the annealing when protons (alpha particles) are used. On the other hand, the measurements of the TRR show that the rectifier speed decreases with the annealing in all cases studied.