Silicon Carbide MOSFET Integrated Circuit Technology

Abstract

The research and development activities carried out to demonstrate the status of MOS planar technology for the manufacture of high temperature SiC ICs will be described. These activities resulted in the design, fabrication and demonstration of the World's first SiC analog IC — a monolithic MOSFET operational amplifier. Research tasks required for the development of a planar SiC MOSFET IC technology included characterization of the SiC/SiO2 interface using thermally grown oxides; high temperature (350 °C) reliability studies of thermally grown oxides; ion implantation studies of donor (N) and acceptor (B) dopants to form junction diodes; epitaxial layer characterization; N channel inversion and depletion mode MOSFETs; device isolation methods and finally integrated circuit design, fabrication and testing of the World's first monolithic SiC operational amplifier IC. These studies defined a SiC n-channel depletion mode MOSFET IC technology and outlined tasks required to improve all types of SiC devices. For instance, high temperature circuit drift instabilities at 350 °C were discovered and characterized. This type of instability needs to be understood and resolved because it affects the high temperature reliability of other types of SiC devices. Improvements in SiC wafer surface quality and the use of deposited oxides instead of thermally grown SiO2 gate dielectrics will probably be required for enhanced reliability. The slow reverse recovery time exhibited by n+–p diodes formed by N ion implantation is a problem that needs to be resolved for all types of planar bipolar devices. The reproducibility of acceptor implants needs to be improved before CMOS ICs and many types of power device structures will be manufacturable.