Turn-off Energy Loss Research Articles

Ultrafast and Low-Turn-OFF Loss Lateral IEGT With a MOS-Controlled Shorted Anode

A novel ultrafast and low-loss lateral injectionenhanced gate transistor (LIEGT) is proposed and investigated by simulation. The device features a MOS-controlled shorted anode (MCSA) and a bias voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">AG</sub> ) applied between the anode trench gate (ATG) and the anode electrode. The n+ anode is shorted to the N-buffer through the MOS channel around the ATG when the MCSA is activated with V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">AG</sub> V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> during turn-off and blocking states, and thus the p+ anode/N-buffer junction is unactivated. The MCSA LIEGT turns off as fast as a unipolar device by optimizing the time gap to activate the MCSA before turning off the cathode trench gate (CTG). The activated MCSA would deactivate hole injection from the anode side and synchronously quickly extract the electrons from the N-drift, which improves the switching speed and dramatically decreases the turn-off energy loss (E <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</sub> ). In the blocking state, the MCSA LIEGTachievesa MOS breakdown mode instead of an open base p-n-p bipolar breakdown mode. Thus, the breakdown voltage (BV) is not only improved but also independent of the p+ anode doping concentration. In the forward conduction state with V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">AG</sub> = 0, the MCSA is unactivated and hence the MCSA LIEGT operates like a conventional LIEGT without deteriorating the on-state voltage drop (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> ). Compared with the conventional LIEGT, the proposed device decreases E <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</sub> by 88% and improves the BV by 13% at the same VON. Importantly, E <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</sub> is almost independent of V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> .

SiC MOSFETs for Offshore Wind Applications

Space and weight are critical factors for offshore wind applications during the construction, operation, and maintenance phases. Superior material properties of silicon carbide enable the development of power devices capable of switching fast as well as handling high power. Thus, this paper performs the quantitative evaluation of the total converter loss and efficiency at different switching frequencies in order to observe the potential performance gains that SiC MOSFETs can bring over Si IGBTs for such applications. When simulating the detailed converter losses in a three-phase, two-level topology; the turn-on and turn-off switching energy losses obtained from the laboratory measurement and the conduction losses acquired from the datasheet are used as a look-up table input. Additionally, the simulated results are compared with the analytical and the numerical solutions. In conclusion, this analysis gives an insight into how SiC MOSFET outperforms Si IGBT over all switching frequency ranges with the advantages becoming more visible at higher frequencies.

A Snapback-Free Fast-Switching SOI LIGBT With an Embedded Self-Biased n-MOS

A 600-V snapback-free fast-switching silicon-on-insulator lateral insulated gate bipolar transistor with an embedded self-biased n-MOS (SBM) is proposed and investigated by simulations. The proposed device features an n-MOS which consists of the N+ anode, p-layer, N-buffer, and the anode trench gate (ATG) embedded between the P+ anode and N+ anode. It is worth noting that the ATG is driven by the anode, without any additional control circuits. At the initial conduction stage, p-layer/N-buffer junction acting as electron barrier contributes to snapback-free with a reduced cell pitch. Simultaneously it provides an extra built-in path to extract electrons at the turn-OFF stage, which hence reduces the turn-OFF energy loss ( ${E} _{ \mathrm{\scriptscriptstyle OFF}}$ ) and increases the switching speed. Furthermore, the hole leakage current of the SBM LIGBT in the blocking state is suppressed due to the electron accumulation/inversion formed along the sidewall of the ATG, avoiding triggering the P+NP transistor and thus increases the breakdown voltage by 11% in comparison with that of the conventional LIGBT. Simulation results show that the SBM LIGBT reduces ${E} _{ \mathrm{\scriptscriptstyle OFF}}$ by 31% and 43% compared to the conventional LIGBT with the same on-state voltage drop ( ${V} _{ \mathrm{\scriptscriptstyle ON}}$ ), at the load current of 100 and 200 A/cm2, respectively.

Characterization and Performance Evaluation of the Superjunction RB-IGBT in Matrix Converter

In this paper, we investigate the performance of the three-phase ac–ac matrix converter (MC) utilizing the novel superjunction (SJ) reverse-blocking (RB)-insulated gate bipolar transistor (IGBT) as switch elements for the first time. The SJ RB-IGBT offers bidirectional blocking capability >1200 V by introducing a shorted-collector trench and n2-layer. The SJ RB-IGBT exhibits bipolar conducting mode in the on-state and the unipolar mode during turn-off. Therefore, both a low on-state voltage ( V on) and a low turnoff energy loss ( E off) can be obtained. The SJ RB-IGBT delivers the E off 80% lower than state-of-the-art RB-IGBTs without penalty in the V on. These merits make the SJ RB-IGBT an attractive candidate for the MC. To address the short circuit arising in commutation of the MC, the split gate is adopted for a low Miller capacitance. The power loss, efficiency, and loss distribution of the three-phase MC with the SJ RB-IGBT and other RB-IGBTs are compared by simulation and calculation. Compared with the MC using conventional nonpunch-through RB-IGBT, the MC with SJ RB-IGBT achieves 85%, 87%, and 56% reductions in the turnoff, reverse recovery, and conduction losses, respectively, yielding 56% reduction in the total loss. The low-power loss and superior dynamic performance of the SJ RB-IGBT enables the MC to operate at higher frequency and higher power density.

Experimental study on the influence of junction temperature on the relationship between IGBT switching energy loss and device current

Accurate determination of power losses in semiconductor devices is important for optimal design and reliable operation of a power converter. The switching loss is an important component of the total device loss in an insulated-gate bipolar transistor (IGBT) in a voltage source inverter. The objective here is to study experimentally the influence of junction temperature on the turn-on switching energy loss Eon and turn-off switching energy loss Eoff. More specifically Eon and Eoff are both related to device current Ic; the influence of junction temperature on the relationship between Eon and Ic and that between Eoff and Ic is studied. As the operating environmental conditions and load conditions of power converter vary widely, a wide range of junction temperatures between −35°C and +125°C is considered here. The experimental data enable precise determination of the switching loss in each device in a high-power converter at any practical operating condition. This leads to precise estimation of total device loss and optimal thermal design of the converter. This further helps off-line and/or on-line estimation of device junction temperatures required for study of thermal cycles and reliability.

A Low Turn-Off Loss 4H-SiC Trench IGBT With Schottky Contact in the Collector Side

In this paper, a 4H-SiC trench insulated gate bipolar transistor (IGBT) incorporating a Schottky contact in the collector side is proposed to reduce the turn-off energy loss. The proposed structure is explored and compared with the conventional IGBT using ATLAS. The simulation results have indicated that the reduction in turn-off energy loss is more than 88%, with a slight degradation in the ${I}$ – ${V}$ characteristics. Concurrently, with the same on-state voltage drop, the turn-off loss is reduced by a figure of 84%.

4H-SiC Trench IGBT With Back-Side n-p-n Collector for Low Turn-OFF Loss

In this paper, an n-p-n collector incorporated in the back side of a 4H-SiC trench IGBT is presented to reduce the turn-off energy loss. A comparative study between the proposed structure and the conventional structure is conducted through ATLAS. The simulation results have demonstrated that the turn-off energy loss is reduced by more than 82.96% with a slight degradation in the on-state voltage drop.

Improvement of turn‐off energy loss ( E off ) variations by low Mg doping in p‐GaN gate power devices

In p-GaN gate AlGaN/GaN power devices, turn-off energy loss (E off) variations in die-level uniformity are observed because of the thickness variations of remained p-GaN in the ungated region. These E off variations can be reduced by negative turn-off gate voltages. However, this method can induce new burden in circuit design because of the negative voltages. Therefore, we focus on fabrication processes such as Mg doping in p-GaN gate. Using low Mg doping in p-GaN gate, E off variations mostly disappear, but threshold voltage (V th) is approximately 0.3 V decreases. In addition, dynamic on-resistance (dynamic R ds,on) is slightly increased.

Effect of the anode-emitter injection efficiency on the characteristics of hybrid SIT–MOS transistors

The possibility of optimization of high voltage hybrid SIT-MOS transistors (HSMT) by local reduction of the lifetime near anode emitter and/or reduction of the anode emitter injection ability by three different ways has been investigated using two-dimensional numerical simulation. It has been shown that all of these methods proposed previously for optimization of insulated-gate bipolar transistor (IGBT) are physically equivalent and makes it possible to reduce turn-off energy losses $E_{off}$ in HSMT by 30-40%. Importantly that energy $E_{off}$ in optimized HSMT appears to be 15-35% less than in equivalent trench IGBT under other equal conditions.

Remained p‐GaN effect to turn‐off energy loss ( E off ) in p‐GaN gate power devices

In p-GaN gate AlGaN/GaN power devices, the p-GaN etching process to define the gate region is critical to device performance. In some cases, the remained p-GaN in the ungated region can exist as a result of under-etching, and can act like a charge reservoir in the p-GaN gate power device. In this reported work, the effect of this remained p-GaN layer is investigated for the first time. The main effect of the thick remained p-GaN on the ungated region is the increments of turn-off energy loss (E off) in spite of the similar turn-on energy loss (E on). This is related to the hole trapping in the remained p-GaN region which is observed by the change of turn-off gate voltages.

Small-sized silicon-on-insulator lateral insulated gate bipolar transistor for larger forward bias safe operating area and lower turnoff energy

This Letter presents a novel small-sized lateral insulated gate bipolar transistor on silicon-on-insulator substrate (SOI-LIGBT), which features a lowly doped p -type pillar alongside the oxide trench in the drift region. The variation in vertical doping termination technology is also proposed for the first time. The p -pillar layer leads to electric field reshaping in the y -direction, and homogenises current flow lines under the gate and cathode. It results in a very wide forward bias safe operating area (FBSOA) for the proposed SOI-LIGBT, which is obviously improved by over 50% compared with the deep-oxide trench SOI-LIGBT (DT SOI-LIGBT). Moreover, at the same forward voltage drop of 1 V, the turnoff energy loss for the proposed SOI-LIGBT is reduced by 28.5 and 81.2% compared with those of DT SOI-LIGBT and the conventional SOI-LIGBT, respectively.

A high voltage silicon-on-insulator lateral insulated gate bipolar transistor with a reduced cell-pitch

A high voltage (> 600 V) integrable silicon-on-insulator (SOI) trench-type lateral insulated gate bipolar transistor (LIGBT) with a reduced cell-pitch is proposed. The LIGBT features multiple trenches (MTs): two oxide trenches in the drift region and a trench gate extended to the buried oxide (BOX). Firstly, the oxide trenches enhance electric field strength because of the lower permittivity of oxide than that of Si. Secondly, oxide trenches bring in multi-directional depletion, leading to a reshaped electric field distribution and an enhanced reduced-surface electric-field (RESURF) effect. Both increase the breakdown voltage (BV). Thirdly, oxide trenches fold the drift region around the oxide trenches, leading to a reduced cell-pitch. Finally, the oxide trenches enhance the conductivity modulation, resulting in a high electron/hole concentration in the drift region as well as a low forward voltage drop (Von). The oxide trenches cause a low anode—cathode capacitance, which increases the switching speed and reduces the turn-off energy loss (Eoff). The MT SOI LIGBT exhibits a BV of 603 V at a small cell-pitch of 24 μm, a Von of 1.03 V at 100 A/cm−2, a turn-off time of 250 ns and Eoff of 4.1×10−3 mJ. The trench gate extended to BOX synchronously acts as dielectric isolation between high voltage LIGBT and low voltage circuits, simplifying the fabrication processes.

Design and Characterization of High-Voltage Silicon Carbide Emitter Turn-off Thyristor

A novel MOS-controlled silicon carbide (SiC) thyristor device, the SiC emitter turn-off thyristor (ETO), as a promising technology for future high-voltage and high-frequency switching applications has been developed. The world's first 4.5-kV SiC p-type ETO prototype based on a 0.36 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> SiC p-type gate turn-off (GTO) shows a forward voltage drop of 4.6 V at a current density of 25 A/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and a turn-off energy loss of 9.88 mJ. The low loss shows that the SiC ETO could operate at a 4-kHz frequency with a conventional thermal management system. This frequency capability is about four times higher than the 4.5-kV-class silicon power devices. The numerical simulations and theoretical analysis have been carried out to show the potentially improved performance of the high-voltage SiC ETOs. The results show that the high-voltage (10-kV) SiC n-type ETO has much better tradeoff performance than that of the p-type ETO due to a smaller current gain of the lower bipolar transistor in the SiC n-type GTO. Further improvement of the 10-kV SiC n-type ETO can be made with the optimum design of the drift layer carrier lifetime and buffer layer doping concentration of the 10-kV SiC GTO. The theoretical analysis and numerical simulation shows the SiC ETO also has the excellent reverse bias safe operating area. The experimental and theoretical studies show that the SiC ETO is a promising candidate for high-voltage (> 5 kV) power conversion applications.

Turn-Off Behavior of 1.2 kV/25 A NPT-CIGBT Under Clamped Inductive Load Switching

<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> For the first time, this paper analyzes the turn-off behavior of the planar 1.2 kV/25, a nonpunch-through clustered insulated gate bipolar transistor (NPT-CIGBT) under clamped inductive load switching, in detail and through experiment simulation. Turn-off behavior of the CIGBT involves strong interaction between device and circuit parameters. The circuit parameter such as gate resistance was varied in order to observe the <emphasis emphasistype="italic">dI</emphasis>/<emphasis emphasistype="italic">dt</emphasis>, <emphasis emphasistype="italic">dV</emphasis>/<emphasis emphasistype="italic">dt</emphasis>, and turn-off energy loss of the device. Experimental results are shown at 25 <formula formulatype="inline"><tex Notation="TeX">$^\circ$</tex></formula> C and 125 <formula formulatype="inline"><tex Notation="TeX">$^\circ$</tex></formula>C. In addition, numerical simulation results are used to enhance understanding of the internal physics of the NPT-CIGBT turn-off process. </para>

Design and Characterization of High-Voltage 4H-SiC p-IGBTs

High-voltage p-channel 4H-SiC insulated gate bipolar transistors (IGBTs) have been fabricated and characterized. The devices have a forward voltage drop of 7.2 V at 100 A/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and a -16 V gate bias at 25degC, corresponding to a specific on-resistance of 72 mOmega ldr cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and a differential on-resistance of 26 mmOmega ldr cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . Hole mobility of 12 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /V ldr s in the inversion channel with a threshold voltage of -6 V was achieved by optimizing the n <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> well doping profile and gate oxidation process. A novel current enhancement layer was adopted to reduce the JFET resistance and enhance conductivity modulation by improving hole current spreading and suppressing the electron current conduction through the top n-p-n transistor. Inductive switching results have shown that the p-IGBT exhibited a turn-off time of ~1 mus and a turn-off energy loss of 12 m J at 4-kV dc-link voltage and 6-A load current at 25degC. The turn-off trajectory from the measured inductive load switching waveforms and numerical simulations shows that the p-IGBT had a near-square reverse bias safe operating area. Numerical simulations have been conducted to achieve an improved tradeoff between forward voltage drop and switching off energy by investigating the effects of drift layer lifetime and p-buffer layer parameters. The advantages of SiC p-IGBTs, such as the potential of very low ON-state resistance, slightly positive temperature coefficient, high switching speed, small switching losses, and large safe operating area, make them suitable and attractive for high-power high-frequency applications.

Transient Characterization of the Planar DMOS With a Metal/Poly-Si Replacement Gate

In this brief, transient characterization of a novel self-aligned metal/poly-Si gate planar double-diffused MOS (DMOS) transistor for high switching speed and high-efficiency dc/dc converter applications are reported. The breakdown voltage and the threshold voltage of the fabricated metal/poly-Si gate planar DMOS are 36 and 2.1 V, respectively. The gate sheet resistance of the metal/poly-Si gate is around 0.2 O/? , which is 50 times lower than that of the polysilicon gate. The low sheet resistance reduces the switching time, as well as the power loss of the device during the clamped inductive load switching. For a device with a drain current of 69 A/cm2, the turn-on and turn-off times are reduced from 29 to 25 ns and from 36 to 31 ns, respectively. The turn-on and turn-off switching energy losses are reduced by 22% and 15%, respectively.

A 30 V Self-Aligned Metal/Poly-Si Replacement Gate Planar DMOS for DC/DC Converters

In this letter, a novel self-aligned metal/poly-Si gate planar double-diffused MOS (DMOS) is proposed and demonstrated for high-switching-speed and high-efficiency dc/dc converter applications. The self-aligned metal/poly-Si gate is realized by a replacement gate technology. The fabricated metal/poly-Si gate planar DMOS has a breakdown voltage of 36 V and a threshold voltage of 2.1 V. The gate sheet resistance of the metal/poly-Si gate is around 0.2 Omega/square, which is 50 times lower than that of the polysilicon gate. The low sheet resistance reduces the switching time as well as the power loss of the device during switching. For a device with a drain current of 69 A/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , the turn-on and turn-off times are reduced from 29 to 25 ns and from 36 to 31 ns, respectively. The turn-on and turn-off switching energy losses are reduced by 22% and 15%, respectively

A 500V, Very High Current Gain (β=1517) 4H-SiC Bipolar Darlington Transistor

A 500V, Very High Current Gain (β=1517) 4H-SiC Bipolar Darlington Transistor

2.5KV-30A Inductively Loaded Half-Bridge Inverter Switching using 4H-SiC MPS Free-Wheeling Diodes

2.5KV-30A Inductively Loaded Half-Bridge Inverter Switching using 4H-SiC MPS Free-Wheeling Diodes

Demonstration of high voltage (600–1300 V), high current (10–140 A), fast recovery 4H-SiC p-i-n/Schottky(MPS) barrier diodes

In this work, the design, fabrication, and testing of improved, high power 4H-SiC merged p-i-n/Schottky(MPS) diodes, in the 600–1300 V voltage range, are described. Both DC and transient test results are presented. The diodes were designed with a multi-step junction termination extension (MJTE) to improve the blocking voltage. The MJTE design allows full utilization of the superior breakdown properties of SiC. At 600 V, the highest forward current capability of a packaged MPS diode showed a current of 50 A at 2 V and 140 A at 4 V. At 1300 V, the current was 4 A at 2 V and 10 A at 4 V. In addition, the SiC MPS diode reverse voltage showed excellent suppression of the Schottky leakage current at temperatures up to 250 °C. The transient properties were measured with an inductively loaded half-bridge inverter circuit at high current and high temperatures (high- T). Results showed that the replacement of Si freewheeling diodes by SiC diodes results in far less storage charge in the diodes and substantial reduction in diode turn-off energy loss, especially at high- T. Switching measurements at currents up to 230 A compared a SiC MPS and a state-of-the-art Si diode; the MPS showed a 47% energy loss reduction at room temperature and 84% at 200 °C. The IGBT energy loss reduction, when using an MPS diode, was 15% at room temperature and 45% at 150 °C. The use of MPS diodes should result in improved efficiency when used in power electronics applications.