Abstract

A 600-V snapback-free fast-switching silicon-on-insulator lateral insulated gate bipolar transistor with an embedded self-biased n-MOS (SBM) is proposed and investigated by simulations. The proposed device features an n-MOS which consists of the N+ anode, p-layer, N-buffer, and the anode trench gate (ATG) embedded between the P+ anode and N+ anode. It is worth noting that the ATG is driven by the anode, without any additional control circuits. At the initial conduction stage, p-layer/N-buffer junction acting as electron barrier contributes to snapback-free with a reduced cell pitch. Simultaneously it provides an extra built-in path to extract electrons at the turn-OFF stage, which hence reduces the turn-OFF energy loss ( ${E} _{ \mathrm{\scriptscriptstyle OFF}}$ ) and increases the switching speed. Furthermore, the hole leakage current of the SBM LIGBT in the blocking state is suppressed due to the electron accumulation/inversion formed along the sidewall of the ATG, avoiding triggering the P+NP transistor and thus increases the breakdown voltage by 11% in comparison with that of the conventional LIGBT. Simulation results show that the SBM LIGBT reduces ${E} _{ \mathrm{\scriptscriptstyle OFF}}$ by 31% and 43% compared to the conventional LIGBT with the same on-state voltage drop ( ${V} _{ \mathrm{\scriptscriptstyle ON}}$ ), at the load current of 100 and 200 A/cm2, respectively.

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