Charge Trapping Research Articles

GaN-Based Charge Trapping Memory With an AlN Interfacial Layer for Multi-State Operation

GaN-Based Charge Trapping Memory With an AlN Interfacial Layer for Multi-State Operation

Noise analysis of NC-GAAFET cylindrical nanowire with non-uniform interface trap charge

In this article, low to high frequency noise behavior analysis of negative capacitance gate-all-around field effect transistor (NC-GAAFET) MFIS structure Silicon Nanowire (SiNW) device, using Sentauras TCAD simulations, is investigated. The NC-GAAFET SiNW yields on current (ION) 5.31 times larger and off current (IOFF) is significantly reduced by ∼ 105 orders compared to baseline SiNW. The device exhibits an excellent switching ratio of 5.2 × 1014. Average subthreshold swing for the NC-GAAFET is 33 mV/dec compared to 64 mV/dec of baseline nanowire. The Negative-DIBL for the device is −20 mV/V which outshines earlier findings. Furthermore, the drain current noise power spectral density (PSD) Sid, and input referred gate voltage noise PSD (Svg) are comprehensively analyzed in the presence of Gaussian trap (non-uniform) distribution. The analysis indicates that, flicker or (1/f) noise dominates in low frequency regime, generation-recombination (G-R) noise is more influential in mid frequency regime whereas in very high frequency regime diffusion noise is leading. The device exhibits least Sid(NET) and Svg(NET) at tfe = 6 nm compared to baseline, tfe = 5 nm, and 7 nm.

Synaptic plasticity and associative learning in IGZO-based synaptic transistor

The increasing demand for efficient data access in high-performance computing systems has emphasized the limitations of the traditional von Neumann architecture, particularly due to the von Neumann bottleneck. This bottleneck arises from the significant power and time consumption required for data transfer between the central processing units and memory, impeding overall system efficiency. Neuromorphic computing offers a promising alternative. Neuromorphic systems emulate biological neurons and synapses, enabling parallel data processing and potentially overcoming the limitations of traditional computing architectures. This study focuses on synaptic transistors with In–Ga–Zn-O (IGZO) channels and TaOx charge trapping layers (Ox-CTL) to enhance neuromorphic computing capabilities. The devices were fabricated using reactive sputtering and atomic layer deposition, followed by comprehensive structural and compositional analyses. Experimental results demonstrated significant hysteresis, high on/off ratios, and multibit conductance states, suggestive of effective charge trapping and detrapping mechanisms. Evaluation through potentiation, depression, and excitatory postsynaptic current (EPSC) measurements, along with simulations using the Modified National Institute of Standards and Technology (MNIST) database, revealed improved pattern recognition accuracy. Additionally, associative learning experiments modeled after Pavlov’s dog conditioning emphasized the device's capability for both long- and short-term memory retention. These findings suggest that IGZO-based synaptic transistors are promising candidates for next-generation neuromorphic computing systems, offering enhanced data processing efficiency and adaptability.

Color‐Tunable White Circularly Polarized Electroluminescence Triggered Using Chiral Co‐Assembly‐Sensitized Strategy

AbstractWhite circularly polarized organic light‐emitting diodes (CP‐WOLEDs) are central to prospective 3D displays and lighting sources. However, owing to the unwanted charge trapping effect and inefficient chirality transfer, the development of CP‐WOLEDs with a high color rendering index (CRI) and large dissymmetry factor (gEL) is challenging. Herein, a pioneering strategy of chiral co‐assembly‐sensitized circularly polarized luminescence (CCS‐CPL) is proposed for improving the performance of white circularly polarized electroluminescence (CP‐EL). Chiral co‐assembled sensitizers ((S‐/R‐Cz)0.2‐(I‐P)0.8) are smartly developed using π–π stacking interactions between the chiral binaphthyl derivatives (S‐/R‐Cz) and achiral conjugated pyrene‐based polymer (I‐P) in a molar ratio of 1:4. Using the chiral co‐assembly‐sensitized strategy on achiral aggregation‐induced emission (AIE) dyes for emitting layers (EMLs) of OLEDs, full‐color achiral AIE‐active dyes can be sensitized by chiral co‐assembly (S‐/R‐Cz)0.2‐(I‐P)0.8. The color‐tunable white CP‐EL performance can be achieved at the CIE coordinates of (0.33, 0.33) with an ultrahigh CRI of 93 and a large gEL value up to 0.071. This study thus provides a valuable guidance for CCS‐type CP‐WOLEDs.

Temperature analysis of lead zirconate titanate GAA-NCFET nanowire with interface trap charges

This article explores the static and trap analysis of lead zirconate titanate negative capacitance gate-all-around (PZT NC GAAFET) nanowire at different temperature using Sentaurus 3D TCAD simulations. Impact of uniform and non-uniform trap charges on various electrical parameters for different ferroelectric (FE) layer thickness is investigated. Work delves the effect of interface traps, at Silicon-HfO2 interface, on electrical parameters of PZT NC GAAFET. Device yields subthreshold slope of 49 mV/dec, at TFE 20 nm, which surpasses Boltzmann tyranny limit. ION, IOFF, ION/IOFF, VTH, SS, and gm have enhanced owing to incorporation of PZT FE layer in contrast to baseline GAAFET. IDS-VGS of NC GAAFET evinces a positive (negative) shift for negative (positive) traps, owing to negative capacitance, compared to baseline for which it exhibits reverse shift. Moreover, the influence of interface trap charges, for NC GAAFET, prevails in subthreshold regime. Electrical parameters primarily deteriorate in presence of interface traps as temperature elevates.

Surface modification of SnO2 electron transporting layer by graphene quantum dots for performance and stability improvement of perovskite solar cells

The surface modification of SnO2 electron transporting layer (ETL) is investigated for the performance and stability improvement of perovskite solar cells by adding citric acid (SnO2-citric) and graphene quantum dots (SnO2-GQDs) in SnO2 ETL precursors for carboxyl group and GQDs, respectively. As a result, the hydrophobic surface of SnO2-GQDs is obtained by adding GQDs to the SnO2 precursor, forming SnO2-GQDs ETL. In addition, the hydrophobic surface of SnO2 ETL is significant in increasing grain size crystallinity of perovskite obtained by this modification process. Also, the charge trap density and recombination carriers between ETL and perovskite interface were advanced. Thus, the surface modification of SnO2-GQDs ETL can enhance the power conversion efficiency (PCE) of PSCs at the highest value of 17.81% from 15.52% with a decrease of the hysteresis effect. The enhancement is due to the combining effect of carboxyl groups and GQDs interface engineering between ETL and perovskites layers. Also, the stability of perovskite solar cells without encapsulation for 28 days is achieved. These suggest that the combining effect can be used in surface modification and for efficiency enhancement of PSCs.

Study on trap sensitivity for single material gate and double material gate nano-ribbon FETs

In this work, the trap sensitivity of single material gate (SMG) and dual material gate (DMG) nano ribbon FETs (NRFETs) are reported using TCAD Sentaurus Device simulator. The trap sensitivity is extracted for Gaussian trap distribution of both acceptor and donor type traps. We have reported the trap sensitivity for the variation in trap concentration, energy peak position, work function of metal gate, and temperature for both the NRFETs. It is realized that trap sensitivity is greater and lesser than 100% for acceptor type trap in SMG and DMG NRFETs, respectively, whereas, such sensitivity is 147% and 123% for donor type trap concentration, respectively. Temperature also shows a significant variation in trap sensitivity for both the NRFETs. The increase in work function leads to the reduction in trap sensitivity for both NRFETs in existence of acceptor and donor trap charges. The maximum sensitivity in trap are 400% and 275% for SMG and DMG NRFETs, respectively, in presence of donor trap concentration. Moreover, the trap sensitivity is very insignificant at high gate bias for donor type trap concentration with wide variation in parameters.

Enhanced breakdown strength of epoxy composites by constructing dual-interface charge barriers at the micron filler/epoxy matrix interface

For the advanced energy systems with ultra-high voltage and frequency, in order to improve the thermal conductivity, arc resistance and mechanical strength of epoxy-based dielectric materials, the addition of micron inorganic fillers is necessary. However, this will inevitably degrade their breakdown strength. In this work, the example of constructing dual-interface charge barriers by optimizing molecular structure at micron filler/epoxy matrix interface to capture charge and then enhance the breakdown strength of epoxy composites is reported. Results show that the Al2O3@PVDF-6/BPA system with optimized interfacial structure exhibits the breakdown strength of AC and DC voltages of 37.5 and 67.8 kV/mm, respectively, far outperforming current epoxy composites containing micron fillers. The charge trapping effects in the dual-interface charge barriers are comprehensively investigated, which is confirmed to be the reason for the improved breakdown strength. In particular, the construction of dual-interface charge barriers hardly sacrifices the thermal and mechanical properties of epoxy composites. This work unveils a scalable approach to exploring satisfied dielectric epoxy composites by dual-interface charge barriers construction at the micron filler/epoxy matrix interface.

Investigation of optical parameters in Ge source SELBOX tunnel FET under visible spectrum

In this work, we have implemented Ge source Selective buried oxide (SELBOX) Tunnel FET for photo sensing applications in the visible range of spectrum for wavelength (λ = 300–700) nm. The various electrical parameters are extracted under dark and illumination states considering the presence and absence of trap charges at the interface of gate oxide and semiconductor. It is seen that at illumination state, the drain current degrades at low gate voltage and presence of traps lead to reduced tunnelling rate. Further, the spectral sensitivity, responsivity, and signal to noise ratio (SNR) are extracted for this TFET based photosensor with variation in λ. Result reveals that spectral sensitivity, responsivity, and signal to noise ratio (SNR) are 20.8, 0.5, and 49.5 dB, respectively, at λ = 300 nm. Further, the presence of trap charges result in degradation of these parameters. Finally, a comparative study of optical parameters with the existing data is highlighted.

Distinguishing the Charge Trapping Centers in CaF2-Based 2D Material MOSFETs.

Crystalline calcium fluoride (CaF2) is drawing significant attention due to its great potential of being the gate dielectric of two-dimensional (2D) material MOSFETs. It is deemed to be superior to boron nitride and traditional silicon dioxide (SiO2) because of its larger dielectric constant, wider band gap, and lower defect density. Nevertheless, the CaF2-based MOSFETs fabricated in the experiment still present notable reliability issues, and the underlying reason remains unclear. Here, we studied the various intrinsic defects and adsorbates in CaF2/molybdenum disulfide (MoS2) and CaF2/molybdenum disilicon tetranitride (MoSi2N4) interface systems to reveal the most active charge-trapping centers in CaF2-based 2D material MOSFETs. An elaborate Table comparing the importance of different defects in both n-type and p-type devices is provided. Most impressively, the oxygen molecules (O2) adsorbed at the interface or surface, which are inevitable in experiments, are as active as the intrinsic defects in channel materials, and they can even change the MoSi2N4 to p-type spontaneously. These results mean that it is necessary to develop a high-vacuum packaging process, as well as prepare high-quality 2D materials for better device performance.

Unveiling the Impact of Interfaces and Impurities on Photogenerated Charge Trapping in Phototransistors with Diverse Organic Semiconductor Active-Layer Architectures

Unveiling the Impact of Interfaces and Impurities on Photogenerated Charge Trapping in Phototransistors with Diverse Organic Semiconductor Active-Layer Architectures

Modeling defect-level switching for nonlinear and hysteretic electronic devices

Previously, we demonstrated hysteretic and persistent changes of resistivity in two-terminal electronic devices based on charge trapping and detrapping at immobile metastable defects [Yin et al., Phys. Rev. Appl. 15, 014014 (2021)]; we termed these defect-level switching (DLS) devices. DLS devices feature all-electronic resistive switching and thus are volatile because of the “voltage-time” dilemma. However, the dynamics of volatile resistive switches may be valuable for emerging applications such as selectors in crosspoint memory and neuromorphic computing concepts. To design circuits using these volatile resistive switches, accurate modeling is essential. In this work, we develop an accurate and analytical model to describe the switching in DLS devices, based on the established theories of point defect metastability in Cu(In,Ga)Se2 (CIGS) and II–VI semiconductors. The analytical nature of our model allows for time-efficient simulations of dynamical behavior of DLS devices. We model the time durations of SET and RESET programming pulses, which can be exponentially shortened with respect to the pulse amplitude. We also demonstrate the concept of inverse design: given desired resistance states, the width and amplitude of the programming signal can be chosen accordingly.

Hole transport mechanism at high temperatures in p-GaN/AlGaN/GaN heterostructure

This Letter reports an investigation of hole transport in p-GaN/AlGaN/GaN heterostructures through experimental and theoretical analyses under varied conditions. Highly non-linear current–voltage (I–V) characteristics, obtained via the linear transmission line method measurements, are utilized for this study. At low bias voltage, the transport can be ascribed to the Schottky nature of the contact, while at high bias, the conduction is observed to be governed by space-charge limited current (SCLC). The Schottky characteristics (Schottky barrier height and non-ideality factor) and the SCLC exponent were analyzed for devices with varying contact spacings and at different high temperatures. The SCLC exponent, m, is in the range of 2≤m≤4 depending on the applied voltage range, revealing the existence of the trap states in the channel region. The findings of this work indicate that the charge injection, field-induced ionization, and trap states in the p-GaN channel are critical factors in the current transport of p-GaN/AlGaN/GaN heterostructure.

Photoexcited Polaron Relaxation as a Structurally Sensitive Reporter of Charge Trapping in a Conducting Polymer

AbstractConjugated polymers (CPs) play a central role in electronic applications due to their easily tuned electronic and ionic conductivities via chemical or electrochemical doping. Although doping improves charge conduction by introducing high densities of carriers into the CP, the accompanying structural changes and their impact on carrier mobility remain elusive. Methods capable of probing carrier distributions and their dependence on polymer morphology are needed to better understand how to improve conductivity. Here, a transient absorption (TA) spectroscopy approach is demonstrated, capable of directly probing mobile and trapped carriers in doped CPs and that is also sensitive to polymer nanostructure by using a model polythiophene system with tuned crystallinity. Exciting polarons in the polymer films produces distinct photoinduced absorption signals in the near‐infrared spectrum that decay during the picosecond timescale in the form of biphasic, stretched exponential kinetics, which reflect a distribution of mobile (free) and trapped polarons. The kinetic analysis provides evidence for mobile polarons irrespective of polymer film crystallinity, whereas polarons located in impure amorphous phases with reduced chain ordering exist within a deeper distribution of trap states. Altogether, these observations suggest a stronger correlation of carrier trapping with local chain ordering (planarity or aggregation) rather than polymer crystallinity.

Charge trapping layer enabled high-performance E-mode GaN HEMTs and monolithic integration GaN inverters

In this work, high threshold voltage and breakdown voltage E-mode GaN HEMTs using an Al:HfOx-based charge trapping layer (CTL) are presented. The developed GaN HEMTs exhibit a wide threshold modulation range of ΔVTH ∼ 17.8 V, which enables the achievement of enhancement-mode (E-mode) operation after initialization process owing to the high charge storage capacity of the Al:HfOx layer. The E-mode GaN HEMTs exhibit a high positive VTH of 8.4 V, a high IDS,max of 466 mA/mm, a low RON of 10.49 Ω mm, and a high on/off ratio of ∼109. Moreover, the off-state breakdown voltage reaches up to 1100 V, which is primarily attributed to in situ O3 pretreatment effectively suppressing and blocking leakage current. Furthermore, thanks to the VTH of GaN HEMTs being tunable by initialization voltage using the proposed CTL scheme, we prove that the direct-coupled FET logic-integrated GaN inverters can operate under a variety of conditions (β = 10–40 and VDD = 3–15 V) with commendable output swing and noise margins. These results present a promising approach toward realizing the monolithic integration of GaN devices for power IC applications.

MXenes with ordered triatomic-layer borate polyanion terminations.

Surface terminations profoundly influence the intrinsic properties of MXenes, but existing terminations are limited to monoatomic layers or simple groups, showing disordered arrangements and inferior stability. Here we present the synthesis of MXenes with triatomic-layer borate polyanion terminations (OBO terminations) through a flux-assisted eutectic molten etching approach. During the synthesis, Lewis acidic salts act as the etching agent to obtain the MXene backbone, while borax generates BO2- species, which cap the MXene surface with an O-B-O configuration. In contrast to conventional chlorine/oxygen-terminated Nb2C with localized charge transport, OBO-terminated Nb2C features band transport described by the Drude model, exhibiting a 15-fold increase in electrical conductivity and a 10-fold improvement in charge mobility at the d.c. limit. This transition is attributed to surface ordering that effectively mitigates charge carrier backscattering and trapping. Additionally, OBO terminations provide Ti3C2 MXene with substantially enriched Li+-hosting sites and thereby a large charge-storage capacity of 420 mAh g-1. Our findings illustrate the potential of intricate termination configurations in MXenes and their applications for (opto)electronics and energy storage.

Charge Trapping and Defect Dynamics as Origin of Memory Effects in Metal Halide Perovskite Memlumors.

Large language models for artificial intelligence applications require energy-efficient computing. Neuromorphic photonics has the potential to reach significantly lower energy consumption in comparison with classical electronics. A recently proposed memlumor device uses photoluminescence output that carries information about its excitation history via the excited state dynamics of the material. Solution-processed metal halide perovskites can be used as efficient memlumors. We show that trapping of photogenerated charge carriers modulated by photoinduced dynamics of the trapping states themselves explains the memory response of perovskite memlumors on time scales from nanoseconds to minutes. The memlumor concept shifts the paradigm of the detrimental role of charge traps and their dynamics in metal halide perovskite semiconductors by enabling new applications based on these trap states. The appropriate control of defect dynamics in perovskites allows these materials to enter the field of energy-efficient photonic neuromorphic computing, which we illustrate by proposing several possible realizations of such systems.

Dual-Adaptive Heterojunction Synaptic Transistors for Efficient Machine Vision in Harsh Lighting Conditions.

Photoadaptive synaptic devices enable in-sensor processing of complex illumination scenes, while second-order adaptive synaptic plasticity improves learning efficiency by modifying the learning rate in a given environment. The integration of above adaptations in one phototransistor device will provide opportunities for developing high-efficient machine vision system. Here, a dually adaptable organic heterojunction transistor as a working unit in the system, which facilitates precise contrast enhancement and improves convergence rate under harsh lighting conditions, is reported. The photoadaptive threshold sliding originates from the bidirectional photoconductivity caused by the light intensity-dependent photogating effect. Metaplasticity is successfully implemented owing to the combination of ambipolar behavior and charge trapping effect. By utilizing the transistor array in a machine vision system, the details and edges can be highlighted in the 0.4% low-contrast images, and a high recognition accuracy of 93.8% with a significantly promoted convergence rate by about 5 times are also achieved. These results open a strategy to fully implement metaplasticity in optoelectronic devices and suggest their vision processing applications in complex lighting scenes.

Observation of Positive Trap Charge by Electron Holography in PMOS Device

Abstract It has been hypothesized that trap charge plays an important role in PMOS (positive-channel metal oxide semiconductor) device reliability. By using electron holography, trap charge in a spacer oxide was observed to cause an inversion of junction in an un-stressed PMOS device prepared using a Ga+ focused ion beam (FIB). Through 400°C annealing for 10 min in vacuum, trap charge in the spacer oxide dispersed and the junction recovered. Technology computer-aided design (TCAD) simulation was used to confirm the positive trap charge effect on the junction. Furthermore, the simulation showed that a low concentration of positive trap charge at the Si/SiO2 interface under the spacer led to a higher tunneling current due to an abrupt junction near the Si surface through a very localized junction inversion.

Fully solution-driven charge trapping synaptic transistor with low energy consumption for neuromorphic computing

Brain-inspired neuromorphic computing has garnered significant attention for going beyond the constraint of von Neumann architecture. To emulate the human brain functions, various artificial synaptic devices have been proposed. Due to the high reliability and the CMOS compatibility, the synaptic transistors based on charge trapping (CT) mechanism have been considered to be one of the most promising candidates. However, most of the synaptic transistors based on CT mechanism were fabricated by costly vacuum-based techniques. In this report, based on a fully solution-driven strategy, the InZnO synaptic transistors, with Nd2O3 as the CT layer and ZrO2 as the dielectric layer, were integrated. The typical synaptic behaviors, including excitatory postsynaptic current, inhibitory postsynaptic current, memory enhancement, potentiation, and depression characteristics, were simulated by modulating presynaptic spikes. It is confirmed that the fabricated synaptic transistor shows low channel conductance and low energy consumption of 0.13 pJ per synaptic event. A recognition accuracy of 93.0% was achieved for the MNIST handwritten digital image dataset by an artificial neural network simulation. This study demonstrates the feasibility of solution-processed synaptic transistors, which exhibit significant potential for the neuromorphic applications.