Fully solution-driven charge trapping synaptic transistor with low energy consumption for neuromorphic computing

Abstract

Brain-inspired neuromorphic computing has garnered significant attention for going beyond the constraint of von Neumann architecture. To emulate the human brain functions, various artificial synaptic devices have been proposed. Due to the high reliability and the CMOS compatibility, the synaptic transistors based on charge trapping (CT) mechanism have been considered to be one of the most promising candidates. However, most of the synaptic transistors based on CT mechanism were fabricated by costly vacuum-based techniques. In this report, based on a fully solution-driven strategy, the InZnO synaptic transistors, with Nd2O3 as the CT layer and ZrO2 as the dielectric layer, were integrated. The typical synaptic behaviors, including excitatory postsynaptic current, inhibitory postsynaptic current, memory enhancement, potentiation, and depression characteristics, were simulated by modulating presynaptic spikes. It is confirmed that the fabricated synaptic transistor shows low channel conductance and low energy consumption of 0.13 pJ per synaptic event. A recognition accuracy of 93.0% was achieved for the MNIST handwritten digital image dataset by an artificial neural network simulation. This study demonstrates the feasibility of solution-processed synaptic transistors, which exhibit significant potential for the neuromorphic applications.