Abstract
This article explores the static and trap analysis of lead zirconate titanate negative capacitance gate-all-around (PZT NC GAAFET) nanowire at different temperature using Sentaurus 3D TCAD simulations. Impact of uniform and non-uniform trap charges on various electrical parameters for different ferroelectric (FE) layer thickness is investigated. Work delves the effect of interface traps, at Silicon-HfO2 interface, on electrical parameters of PZT NC GAAFET. Device yields subthreshold slope of 49 mV/dec, at TFE 20 nm, which surpasses Boltzmann tyranny limit. ION, IOFF, ION/IOFF, VTH, SS, and gm have enhanced owing to incorporation of PZT FE layer in contrast to baseline GAAFET. IDS-VGS of NC GAAFET evinces a positive (negative) shift for negative (positive) traps, owing to negative capacitance, compared to baseline for which it exhibits reverse shift. Moreover, the influence of interface trap charges, for NC GAAFET, prevails in subthreshold regime. Electrical parameters primarily deteriorate in presence of interface traps as temperature elevates.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
