Time-dependent Dielectric Breakdown Characteristics Research Articles

Electrical characterization and material evaluation of zirconium oxynitride gate dielectric in TaN-gated NMOSFETs with high-temperature forming gas annealing

The electrical, material, and reliability characteristics of zirconium oxynitride (Zr-oxynitride) gate dielectrics were evaluated. The nitrogen (/spl sim/1.7%) in Zr-oxynitride was primarily located at the Zr-oxynitride/Si interface and helped to preserve the composition of the nitrogen-doped Zr-silicate interfacial layer (IL) during annealing as compared to the ZrO/sub 2/ IL - resulting in improved thermal stability of the Zr-oxynitride. In addition, the Zr-oxynitride demonstrated a higher crystallization temperature (/spl sim/600/spl deg/C) as compared to ZrO/sub 2/ (/spl sim/400/spl deg/C). Reliability characterization was performed after TaN-gated nMOSFET fabrication of Zr-oxynitride and ZrO/sub 2/ devices with equivalent oxide thickness (EOTs) of 10.3 /spl Aring/ and 13.8 /spl Aring/, respectively. Time-zero dielectric breakdown and time-dependent dielectric breakdown (TDDB) characteristics revealed higher dielectric strength and effective breakdown field for the Zr-oxynitride. High-temperature forming gas (HTFG) annealing on TaN/Zr-oxynitride nMOSFETs with an EOT of 11.6 /spl Aring/ demonstrated reduced D/sub it/, which resulted in reduced swing (69 mV/decade), reduced off-state leakage current, higher transconductance, and higher mobility. The peak mobility was increased by almost fourfold from 97 cm/sup 2//V/spl middot/s to 383 cm/sup 2//V/spl middot/s after 600/spl deg/C HTFG annealing.

Effect of deuterium postmetal annealing on the reliability characteristics of an atomic-layer-deposited HfO2/SiO2 stack gate dielectrics

The characteristics of atomic-layer-deposited (ALD) HfO2(30 Å)/SiO2(10 Å) stacks gate dielectrics were investigated after annealing in a deuterium (D2) ambient. Compared with oxides annealed in a forming gas containing hydrogen (H2), the stack dielectrics annealed in D2 ambient exhibited various advantages such as less charge trapping, less generation of interface state density (Dit), a larger charge-to-breakdown (Qbd), and longer time-dependent dielectric breakdown characteristics under conditions of electrical stress. The improved reliability can be attributed to the strength of the deuterium bond. This deuterium postmetal annealing of a high-k gate dielectric has considerable potential for future use in ultralarge-scale integration device applications.

Boron Transport Through Surface Channel pMOS Using W-poly Metal Gate Electrode: Poly Si Doping Condition and Nitric Oxide Treatment Effects

This work considers boron transport through surface channel p-metal oxide semiconductors (pMOSs) using tungsten-poly metal gate electrode as a function of poly doping conditions and nitric oxide treatment by analyzing quasi-static capacitance-voltage curves and time-dependent dielectric breakdown characteristics obtained after applying the full thermal budget, especially including selective oxidation to prohibit tungsten oxidation. From the result obtained when nitrogen was implanted into undoped amorphous Si (α-Si), it can be recognized that out-diffusion of boron into tungsten and its nitride is negligible. Mixed implantations into undoped α-Si aggravates the gate depletion, whereas it has little relationship with boron penetration into the pMOS channel. The abundance of dose in undoped α-Si facilitates the boron penetration, leading to gate oxide degradation and variation of the flatband voltage within the wafer as well as to the improvement of the gate depletion. From the comparison of the capacitance-voltage curve and the flatband voltage uniformity among experimental splits, it is found that the nitric oxide treatment retards the boron penetration into the pMOS channel effectively without significant degradation of the gate depletion. © 2002 The Electrochemical Society. All rights reserved.

Atomic Layer Deposition- and Chemical Vapor Deposition-TiN Top Electrode Optimization for the Reliability of Ta2O5 and Al2O3 Metal Insulator Silicon Capacitor for 0.13 µm Technology and Beyond

TiCl4-based atomic layer deposition (ALD)- and chemical vapor deposition (CVD)-TiN films are applied as the metal top electrode for Ta2O5 and Al2O3 metal insulator silicon (MIS) capacitor. The effects of factors such as Cl content, step coverage, deposition temperature of the TiN top electrode processes and pre-NH3 flushing on the electrical properties and reliability of the Ta2O5 and Al2O3 MIS capacitor are studied. Among these factors, poor step coverage shows distinctly degraded electrical properties of MIS capacitor, and high deposition temperature of TiN processes also degraded electrical properties, particularly those of Ta2O5. Although similar capacitance and leakage characteristics are measured with high chlorine content and pre-NH3 flushing TiN processes, a difference in the orders of magnitude is observed in time dependent dielectric breakdown (TDDB) measurements. Regarding the deposition temperature and pre-NH3 flushing effect, the electrical and TDDB characteristics of Ta2O5 degrade even more severely than those of Al2O3. Degradation of TDDB in TiN films with NH3 flushing prior to deposition is attributed to the reduction effect of the dielectric material by NH3 gas. Based on the X-ray photoelectron spectroscopy (XPS) analysis results, Al2O3 is chemically more inert than Ta2O5. In addition, the degradation of TDDB characteristics is directly correlated to the early generation of Vp-dependent solid “0” fail bit counts. Due to the relatively low deposition temperature as well as to the excellent step coverage and low resistivity, the ALD-TiN process is ideal for enhancing the reliability of a MIS capacitor.

Light Emission Analysis of Dielectric Breakdown in Stressed Damascene Copper Interconnection

Visible light emission observed in biased comb-type capacitors with a copper (Cu) damascene structure appears to be caused by electroluminescence. Photon emission probably occurs via energy states related to dangling bonds formed at a chemical-mechanical polished (CMP) surface. These energy states also appear to degrade the time-dependent dielectric breakdown (TDDB) characteristics and to increase line-to-line leakage currents. Ammonia (NH3) plasma treatment of a Cu-CMP surface dramatically improved TDDB and decreased the leakage currents. We attribute this to a reduced energy-state density through the termination of dangling bonds by hydrogen generated from the NH3 plasma.

Atomic-layer-deposited silicon-nitride/SiO2 stacked gate dielectrics for highly reliable p-metal–oxide–semiconductor field-effect transistors

An extremely thin (∼0.4 nm) silicon-nitride layer has been deposited on thermally grown SiO2 by an atomic-layer-deposition (ALD) technique. The boron penetration through the stacked gate dielectrics has dramatically been suppressed, and the reliability has been significantly improved, as confirmed by capacitance–voltage, gate-current–gate-voltage, and time-dependent dielectricbreakdown characteristics. The ALD technique allows us to fabricate an extremely thin, very uniform silicon-nitride layer with atomic-scale control.

Impact of Structural Strained Layer near SiO2/Si Interface on Activation Energy of Time-Dependent Dielectric Breakdown

A structural transition region near the SiO2/Si interface has been considered to play an important role with respect to gate oxide reliability. We clarify the effects of the structural transition region on the time-dependent dielectric breakdown (TDDB) characteristics, particularly the activation energy of the oxide breakdown for ultrathin gate oxides formed by different oxidation processes, i.e., pyrogenic oxidation, rapid thermal O2 oxidation and N2O oxynitridation. Furthermore, we investigate the properties of the structural transition region, such as the density of SiO2 as measured by the grazing incidence X-ray-scattering reflectivity (GIXR) method, the Si–O–Si bond angle by Fourier-transform infrared attenuated total reflection (FTIR-ATR), the etching rate by chemical etching and X-ray photoelectron spectroscopy (XPS). Through these investigations, it is clarified that the oxide breakdown tends to occur at the Si–O–Si network with a lower bond angle (<115°) and that the strain in the structural transition region reduces the barrier to the oxide breakdown. A 1-nm-thick strained layer is found to have a strong effect on the oxide reliability and to limit oxide scaling in future ultra-large-scale integrated circuits (ULSIs).

Thickness Dependence of the Time Dependent Dielectric Breakdown Characteristics of Pb(Zr, Ti)O3 Thin Film Capacitors for Memory Device Applications

The time dependent dielectric breakdown characteristics of lead zirconate titanate [Pb(Zr0.53Ti0.47)O3] (PZT) thin film capacitors are studied as a function of film thickness. The thickness of PZT films ranges from 70 nm to 470 nm. The variation of leakage current with electric field can be described by a power law relationship. A power law can also describe the relation between the time to dielectric breakdown (tBD) and the electric field. The exponent of the first power law agrees very well with the second when the leakage current is measured using a short delay time of 0.1 s. An extrapolation method was used to extract the tBD lifetime by correlating the tBD and the leakage current. The value of tBD lifetime increases from 104 s to 1012 s as the film thickness is decreased from 470 nm to 70 nm. If the leakage current is measured using a longer delay time (>0.1 s), stress degradation of the samples is observed.

Electrical properties of Ta 2O 5 thin films deposited on Cu

The electrical and dielectric properties of reactively sputtered Ta 2O 5 thin films with Cu as the top and bottom electrodes forming a simple metal insulator metal (MIM) structure, Cu/Ta 2O 5/Cu/n-Si, were studied. Ta 2O 5 films subjected to rapid thermal annealing (RTA) at 800°C for 30 s in N 2 ambient crystallized the film, decreased the leakage current density and resulted in reliable time-dependent dielectric breakdown characteristics. The conduction mechanism at low electric fields (<100 kV/cm) is due to Ohmic conduction; however, the Schottky mechanism becomes predominant at high fields (>100 kV/cm). Present studies demonstrate the use of Cu as a potential electrode material to replace the conventional precious metal electrodes for Ta 2O 5 storage capacitors.

X-ray irradiation effect on the reliability of ultra-thin gate oxides and oxynitrides

During X-ray irradiation of MOS devices, interface states as well as bulk electron and hole traps are generated at the Si SiO 2 interface and in the SiO 2 layer respectively. In this paper, we investigate the effect of X-ray irradiation on the electrical characteristics of 4.2 nm oxide and 4.4 nm oxynitride layers. It is shown that the bulk electron traps generated during irradiation lead to an increase of the gate current in the low gate voltage region, behaviour which can be attributed to trap assisted tunneling. From the analysis of time-dependent dielectric breakdown characteristics, it is demonstrated that the irradiation-induced bulk traps participate in the formation of the breakdown (percolation) path in the gate oxide layer.

Leakage Current Reduction of Chemical-Vapor-Deposited Ta2O5 Films on Rugged Polycrystalline Silicon Electrode for Dynamic Random Access Memory Application

In this paper we describe the electrical and physical characterizations of Ta2O5 films on rapid thermal nitrided (RTN) rugged polycrystalline silicon electrodes for 256 M dynamic random access memory (DRAM) application. To overcome the higher leakage on Ta2O5 films with rugged poly-Si bottom electrodes, we have successfully employed a light oxidation on rugged poly-Si grains for improving the acute angle of surface morphology, and a post-treatment with rapid thermal nitridation of N2O on Ta2O5 films to reduce the leakage. In addition, a RTN pre-treatment is also applied to prevent rugged poly-Si oxidation during a Ta2O5 film deposition that compromises the effective Ta2O5 thickness. Our results show that Ta2O5 film with an effective thickness of 1.4 nm (physical thickness=10 nm) and a low leakage current density of less than 1×10-8 A/cm2, suitable for 256 M DRAM application, can be achieved. Our results also show that while a light oxidation on rugged poly-Si grains could improve the acute angle between the rugged poly-Si and its congruent amorphous silicon sub-layer, over oxidation on rugged poly-Si grains could degrade the leakage current and the time dependent dielectric breakdown (TDDB) characteristics of the stacked capacitor.

Improved reliability of NO treated NH 3-nitrided oxide with regard to O 2 annealing

NH 3-nitrided oxide has been annealed in NO or O 2 gas at 1000°C for 1 min and the electrical characteristics, charge trapping and time-dependent dielectric breakdown (TDDB) have been studied. It was observed that in the F–N region before stress the conduction current is the same for all the samples but intrinsic breakdown is earlier for O 2 annealed NH 3-nitrided oxide. After stress, the leakage current increases abruptly for the O 2 annealed NH 3-nitrided oxide. The TDDB characteristics have been measured for wet, NO and O 2 annealed NH 3-nitrided oxide. It was observed that the endurance of wet and NO annealed NH 3-nitrided oxide is the same, but the O 2 annealed NH 3-nitrided oxide has a lot of initial failure at the same stress of −11 MV cm −1. From the experimental results, it can be said that NO annealing not only removes H which comes from the NH 3 nitridation but also improves the oxide reliability by replacing strained Si–O bonds for a stable Si–N bond.

Effects of oxidation process on interface roughness of gate oxides on silicon: X-ray reflectivity study

We report on the effects of the wet and dry oxidation processes on the interfacial roughness and time dependent dielectric breakdown (TDDB) characteristics of the poly-Si/SiO2/Si(100) trilayer. The interface roughness of the oxide layers buried under a thick poly-Si electrode has been investigated using an x-ray reflectivity technique. Analysis of x-ray reflectivity data for the trilayer samples and for a bare oxide film shows that interface roughness of poly-Si electrode/SiO2 interfaces depends on oxidation process while oxide layers have smooth SiO2/Si-subtstrate interfaces. TDDB of the SiO2 layer has also been observed to depend on the oxidation process, indicating that the interface roughness is a crucial factor affecting the TDDB characteristics. The wet oxidized SiO2 film is more stable to dielectric breakdown and has smoother interfaces than the dry oxidized sample.

Oxide thickness dependence of nitridation effects on TDDB characteristics

Wet oxide thicknesses dependence of nitridation effects on electrical characteristics, charge trapping properties and TDDB (Time Dependent Dielectric Breakdown) characteristics have been investigated. It is found that the difference of conduction current between the wet and nitrided wet oxide increases with increasing oxide thickness both for negative and positive bias to the gate until constant current stress is applied. After the stress, with decreasing oxide thickness both in wet and nitrided wet oxide leakage current increases. Up to ∼ 60 Å no difference was observed between the wet and nitrided wet oxide but at ∼ 50 Å nitrided wet oxide has less increase of current comparing to the wet oxide for the same stress. In wet oxide with increasing stress current density initial hole trap decreases but electron trap increases whereas in nitrided wet oxide has less initial hole trap and also electron trap is less comparing to the wet oxide. Both in wet and nitrided wet oxide for negative bias stress, time to 50 % breakdown decreases with decreasing thickness but at ∼ 50 Å a turn-around effect was observed due to nitridation i.e., the 50 % breakdown time is greater for nitrided wet oxide comparing to the wet oxide. On the contrary, for positive bias stress 50 % breakdown time increases with decreasing oxide thickness both in wet and nitrided wet oxide. For positive bias also a turn-around effect is observed at ∼ 50 Å i.e., 50% breakdown time is less in nitrided wet oxide comparing to the wet oxide. The improved reliability of nitrided wet oxide at the thin region of ∼ 50 Å seems to be due to the increase of more SiN bond to the interface of oxide and Si comparing to the thick oxide of above ∼ 60 Å for the same nitridation conditions.

Time dependent dielectric breakdown characteristics of MOS capacitors with Si-implanted SiO 2: Toshihiro Matsuda, Takahashi Ohzone and Takahashi Hori. Solid State Electronics, 1996, 39(10), 1427

Time dependent dielectric breakdown characteristics of MOS capacitors with Si-implanted SiO 2: Toshihiro Matsuda, Takahashi Ohzone and Takahashi Hori. Solid State Electronics, 1996, 39(10), 1427

Effects of the oxidation process on the electrical characteristics of oxidized nitride films

The effects of the oxidation process on the electrical characteristics of metal–oxide–semiconductor (MOS) capacitors were studied. It was found that electrical and time dependent dielectric breakdown (TDDB) characteristics are improved for the MOS capacitor with a wet oxidized nitride film over the N2O oxidized nitride film. The depth profile of the oxidized nitride film is also studied by Auger electron spectroscopy. It is observed that from the top surface of an oxidized nitride film of about 2 nm (nitride film oxidized in the wet oxidation process or in N2O ambient by rapid thermal processing), the level of oxygen is the same but, compared to a N2O oxidized nitride film, the level of nitrogen is greater in a wet oxidized nitride film. The improvement of the electrical and TDDB characteristics of the wet oxidized nitride film over the N2O oxidized nitride can be thought due to the increased amount of nitrogen from the top surface to a depth of nearly 2 nm of the oxidize nitride films.

Electrical breakdown induced by silicon nitride roughness in thin oxide–nitride–oxide films

The time-dependent dielectric breakdown (TDDB) characteristics of thin oxide–nitride–oxide (ONO) films containing 4 nm of Si3N4 were found to be exclusively determined by statistical thickness fluctuations of the Si3N4 layer. A two-parameter statistical model describes this roughness and explains experimental TDDB data. A simple growth model combined with the statistical model reduces the number of parameters to one. It is consistent with TDDB data and is in quantitative agreement with transmission electron microscopy and x-ray photoelectron spectroscopy data and is able to explain the origin of the roughness. On an ONO with a 4 nm Si3N4 layer and an area of 8 cm2—corresponding to the total storage area of a 256 Mbit dynamic random access memory—the thinnest point in the Si3N4 can be expected to be below 10 Å. So eliminating the Si3N4 roughness would bring a drastic improvement in reliability.

Evaluation of a copper metallization process and the electrical characteristics of copper-interconnected quarter-micron CMOS

Copper metallization was applied to quarter-micron CMOS circuits using copper chemical vapor deposition (CVD) and chemical mechanical polishing (CMP). Both the metallization process and the electrical characteristics of CMOS devices/circuits were evaluated. Process-induced metal contamination on both sides of the wafer were quantitatively evaluated and reduced to about of 10/sup 11/ atoms/cm/sup 2/ by using an optimized cleaning sequence. The ability of borophosphosilicate-glass (BPSG) to act as a copper diffusion barrier was discovered and the ability of TiN to do so was also confirmed. Electrical characteristics of n and p MOSFET's with copper interconnections were stable even after annealing at 550/spl deg/C. The leakage current of the pn junction, capacitance-voltage characteristics and time-dependent dielectric breakdown characteristics of the MOS diode indicate that the copper metallization process did not deteriorate the pn junction and the gate oxide. Normal operation of a 53-stage quarter-micron CMOS inverter ring oscillator with copper metallization was successfully achieved.

Effects of post-deposition annealing on the electrical properties and reliability of ultrathin chemical vapor deposited Ta/sub 2/O/sub 5/ films

This paper reports the effects of post-deposition rapid thermal annealing on the electrical characteristics of chemical vapor deposited (CVD) Ta/sub 2/O/sub 5/ (/spl sim/10 nm) on NH/sub 3/-nitrided polycrystalline silicon (poly-Si) storage electrodes for stacked DRAM applications. Three different post-deposition annealing conditions are compared: a) 800/spl deg/C rapid thermal O/sub 2/ annealing (RTO) for 20 sec followed by rapid thermal N/sub 2/ annealing (RTA) for 40 sec, b) 800/spl deg/C RTO for 60 sec and c) 900/spl deg/C RTO for 60 see. Results show that an increase in RTO temperature and time decreases leakage current at the cost of capacitance. However, over-reoxidation induces thicker oxynitride formation at the Ta/sub 2/O/sub 5//poly-Si interface, resulting in the worst time-dependent dielectric breakdown (TDDB) characteristics. >

Effects of surface pretreatment of polysilicon electrode prior to Si/sub 3/N/sub 4/ deposition on the electrical characteristics of Si/sub 3/N/sub 4/ dielectric films

Effects of various surface pretreatments of polysilicon electrode prior to Si/sub 3/N/sub 4/ deposition on leakage current, time-dependent dielectric breakdown (TDDB) and charge trapping characteristics of thin Si/sub 3/N/sub 4/ films deposited on rugged and smooth poly-Si are investigated. Surface pretreatments consist of different combinations of HF clean, rapid thermal H/sub 2/-Ar clean, and rapid thermal NH/sub 3/-nitridation (RTN) and are intended to modify the surface of bottom poly-Si electrode. Results show that RTN treatments lead to lower leakage current, reduced charge trapping, and superior TDDB characteristics as compared to rapid thermal H/sub 2/-Ar clean.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>