Silicon Field Emitter Arrays Research Articles

Parameters of the tip arrays covered by low work function layers

Silicon field emitter arrays have been fabricated and investigated. Four different field emission enhancement layers were studied: (1) porous silicon layers, (2) carbon films, (3) hydrogen implanted layers, (4) Cs-enriched layers. Scanning electron microscopy was used to study the morphology of the tips. Comparison of the above arrays was accomplished by obtaining effective work functions, field enhancement factors, and effective emission areas from Fowler–Nordheim plots.

Fabrication of silicon field emitters by forming porous silicon

A new method to fabricate silicon field emitter array (FEA) by forming porous silicon is proposed. Silicon FEAs have been successfully fabricated on n-type and p-type substrates using this method. In this method, porous silicon is formed around the masking discs in HF solution to make tips. Then the porous silicon is thermally oxidized to form the insulator between the gate metal and the silicon substrate. The final gate hole diameter is nearly equal to the masking disc diameter, and the gate leakage current is less than 0.5% of the anode current. For a silicon FEA made on an n-type substrate with a gate hole diameter of 1.4 μm and for a silicon FEA made on a p-type substrate with a gate hole diameter of 1.8 μm, an emission current of 1.1 μA per tip and 1.0 nA per tip is obtained at a gate voltage of 100 V, respectively.

Control of emission characteristics of silicon field emitter arrays by an ion implantation technique

Conical Si field emitter arrays with gate electrodes have been fabricated. Emitter tips were doped by using an ion implantation technique so as to control the emission characteristics. The doped emitters with n-type surfaces showed typical field emission characteristics. However, the p-type emitters did not work well with the Fowler–Nordheim theory and showed plateaus in the Fowler–Nordheim plots. It is speculated from the capacitance–voltage measurements and the experiment of photoenhanced emission that the emission current is limited due to the supply of electrons from depletion layers near the emitter tips and from inversion layers under the gate electrodes.

Influence of fill gases on the failure rate of gated silicon field emitter arrays

The influence of a variety of background gases on the failure rate of gated field emitter arrays has been investigated. The effects of argon, helium, nitrogen, and xenon were investigated, with pressures ranging from 1×10−8 to 1×10−4 Torr. The gated field emitter arrays were operated in dc and pulsed emission modes. The failure rate of gated field emitters is a very strong function of the type of background gas, its pressure, and whether the array was operated in a pulsed or dc bias mode. As expected, the failure rate for all gases increased rapidly as the background pressure increased, but was substantially different for the various gases. The failure rate of arrays increased rapidly as the electron impact ionization cross section of the background gas decreased. The large reduction in failure rates due to operation in a pulsed mode as compared to a dc mode of operation, as previously seen for experiments without a background gas, was also evident for all background gases tested.

Enhanced electron emission from phosphorus-doped diamond-clad silicon field emitter arrays

Undoped and phosphorus (P)-doped diamond-clad Si field emitter arrays have been successfully fabricated using microwave plasma chemical vapor deposition (MPCVD) technology. The electron emission from the blunt diamond-clad microtips are much higher than those for the pure Si tips with sharp curvature due to a lower work function. Furthermore, the characteristics of emission current against applied voltage for the P-doped diamond-clad tips show superior emission at lower field to the undoped ones. After the examination of Auger electron spectroscopy (AES) and electrical characteristics of as-grown diamond, such a significant enhancement of the electron emission from the P-doped diamond-clad tips is attributed to a higher electron conductivity and defect densities.

Instability and reliability of silicon field emission array

The instability and reliability of silicon field emission cathode are investigated. The total instability is divided into four components which are extracted from the emitting current curve I(t). The appearance of the I(t) curve, the meaning and causes of the four components are described and discussed, respectively. Reliability is defined and a set of failure modes are reported. To make a normalized measurement of reliability, a computerized system is proposed.

Fabrication and Electrical Characteristics of a Multi-layer Structure of Polycrystalline Silicon Field Emitters and Thin Film Transistor

We have developed a new multi-layer structure of polycrystalline silicon field emitter array (poly-Si FEA) and thin film transistor (TFT), where poly-Si FEA and the TFT are successively fabricated using a thermally grown SiO2 mold and transferred to a glass substrate. During operation, the TFT not only controls amount of field emission but also stabilizes fluctuation of the field emission. Since the TFT does not decrease the space for poly-Si FEA fabrication, the structure will be a good candidate for high quality flat panel displays. In this paper, we present details of the fabrication method of the multi-layer structure, and also show the field emission control by the TFT for static and switching characteistics.

Fabrication of Silicon Field Emitter Arrays with 0.1-µm-Diameter Gate by Focused Ion Beam Lithography

Cone-shaped silicon (Si) field-emitter arrays (FEAs) with 0.1-µ m-diameter gates were fabricated by focused ion beam (FIB) lithography. In the fabrication process, a 200 keV Be2+ FIB with a beam diameter of 0.06 µ m was irradiated to a positive-tone electron-beam resist to form an array of silicon oxide ( SiOx ) disks used as masks for cone-shape etching of a Si substrate. We have succeeded in the operation of the present FEA and obtained the emission current of 1 nA/tip at the gate voltage of 25 V.

Fabrication and Characterization of Diamond-Clad Silicon Field Emitter Arrays

Microsized silicon tip arrays with sharp curvature were formed based on the techniques including reactive ion etching and oxidation-sbarpening. A new fabrication technology of polycrystalline diamond-clad Si microtips using microwave plasma CVD (MPCVD) was subsequently developed to improve the capability and stability of the field emission from the pure Si tips. By means of SEM and transmission electron microscopy (TEM), the as-deposited films are found to be polycrystalline diamond with fine grain (∼800 Å) structure. With the anode voltage of 1100 V and anode-to-cathode distance of 30 µ m, the emission current of 240 µA in a 50×50 diamond-clad Si microtip array can be achieved, which is much higher than those for Cr-clad and pure Si microtip arrays. Based on curve fitting of a Fowler-Nordheim ( F-N ) plot, such great improvement is partially attributed to the lowering of the effective work function from 5.5 eV to 2.08 eV.

A novel fabrication process of a silicon field emitter array with thermal oxide as a gate insulator

We have successfully developed a fabrication process of a silicon field emitter array with a gate insulator formed by Si/sub 3/N/sub 4/ sidewall formation and subsequent thermal oxidation. This process overcomes some problems in the conventional fabrication, such as high etch rate, low breakdown field, and gate hole expansion arising from evaporation of gate oxide. Therefore, we could improve process stability and emission performance, and also reduce gate leakage current. The optimum process conditions were determined by process simulations using SUPREM-4. The turn-on voltage of the fabricated field emitters was approximately 38 V. An anode current of 0.1 /spl mu/A (1 /spl mu/A) per tip was measured for a 625-tip array at the gate bias of 80 V (100 V), and the gate current was less than 0.3% of the anode current at those emission levels. >

Silicon field emitter arrays with low capacitance and improved transconductance for microwave amplifier applications

We report here on DC and RF measurements of electron field emission current obtained from silicon field emitter arrays (FEAs) containing more than 1000 tips. The field emitters in these FEAs have the form of 4 μm tall cylindrical columns where the tops of the columns were sharpened into points having radii of curvature estimated from TEM analysis of similar devices to be less than 100 Å. With a gate bias voltage of about 120 V DC, emission currents of approximately 2 mA have been collected at the anode. This collector current, corresponding to about 2 μA per tip, is in the acceptable range suggested in the literature for RF amplification in the GHz frequency range. RF modulation of the collected current at 1 GHz has been measured from these structures and the data are presented. As a result of placing the field emitters on tall columns, the parallel-plate capacitance between the cathode and gate electrodes of these FEAs has been decreased to under 2 fF per emitter tip. The magnitude of the input impedance at 1 GHz is about 30 Ω, which is a reasonable match to the commonly used 50 Ω instrument impedance. The RF measurements of collected current, input power, and device input impedance are consistent with the current and voltage measurements at DC, thereby giving credence to the design of vacuum microelectronic microwave amplifiers using this type of silicon FEA. From these results we believe that RF power gain in the GHz regime is attainable with vacuum microelectronic triode and tetrode structures by scaling up the size of these low-capacitance, high-transconductance silicon FEAs.

Mini-column silicon field-emitter arrays

We report emission data of silicon field emitter arrays fabricated with the ultimate goal of their integration within a planar lens structure for beam focusing experiments. The field emitters have been fabricated as linear arrays (with 20 μm separation between tips), square arrays (with 12 μm tip-to-tip separation), and single tips. The emitters themselves are formed on columns approximately 0.7 μm in height and 0.4 μm in diameter, and have gate aperture diameters as small as 1.1 μm. Two types of field emitter tips have been fabricated: One has been formed via isotropic etching of silicon in an SF6 plasma, the second using an orientation-dependent silicon wet etching procedure. Both have been sharpened with an oxidation process, and tip radii as small as 4 nm have been obtained. During testing, 14.4 μA of anode current was obtained from a single tip. From a 100 tip array, 3 mA of current was measured at a gate voltage of 85 V. From a 10 000 tip array, 14.5 mA was obtained.

Studies into the emission uniformity of large silicon field emitter arrays

We report the results of three indirect techniques which, together, provide a clear measure of emitter uniformity. First, a study of the Fowler–Nordheim characteristics has allowed limits to be placed on the variability of those tips contributing to the total current. Second, the emission characteristics of arrays are compared with those of neighboring single tips. Finally, these results have been compared with the variability observed in small arrays of close-spaced but individually addressable tips. The results obtained suggest a relatively uniform and narrow distribution of characteristics within emitter arrays produced by GEC–Marconi in which effectively 70% of the tips contribute to the total emission current. This conclusion is discussed in the context of direct emission images formed by beam collimating double-gridded cathodes.

New fabrication method of silicon field emitter arrays using thermal oxidation

The fabrication and emission characteristics of a silicon field emitter array using pure thermal oxide as a gate insulator are described. Since the thermally grown oxide film has a better stoichiometry and is a better insulator than the evaporated oxide, the fabrication process could be stabilized and the tip-to-tip uniformity improved. In addition, the aspect ratio can be controlled easily by this process free from the shadowing effect that appears in the evaporation process. Fabricated samples have been measured electrically in the vacuum of 1×10−8 Torr. The anode current of 290 nA (37 nA) for a single tip was observed at the gate voltage of 130 V (100 V), and the gate current was less than 1% of the emission current. The emission patterns of a 625-tip array showed a very uniform phosphor luminescence due to the averaging effect resulting from the multiple silicon tips.

Fabrication of column-based silicon field emitter arrays for enhanced performance and yield

In this article, simulation, fabrication, and direct current (dc) characterization data are presented for column-based silicon field emitter array (FEA) devices, made using anisotropic or isotropic etching of silicon to form emitter tips. In the design of the fabrication process, we have attempted to minimize spatial nonuniformity of process parameters affecting the geometry of the device structure, and, where possible, counteract the nonuniformity through a proper choice of processing variables. FEA devices, with as many as 232 630 tips, on 4–10 μm centers, have been successfully fabricated. The highest electron emission current measured was over 18 mA at the gate voltage of 150 V for a 6648 tip array.

Field emission from silicon through stable contaminant layers

Silicon field emitter arrays have been studied by field emission current-voltage measurements as well as by direct FEM and FIM imaging. A typical stable current of 1 μA per emitter was measured at extraction voltages of about 150 V. The data yielded a linear Fowler-Nordheim plot; however, an irreversible and abrupt change of slopeo was observed in the early stage of field emission 3pon the first increase in field. Subsequently stable and reversible, but displaced, F-N, plots were obtained. We postulate that this phenomenon is due to a self-regulating process that forms a thin stable contaminant on the emitting surface. This hypothesis was tested under controlled conditions using single emitters and found to be self-consistent.

SEM and Field Mmission study of silicon field emitter array

Arrays of nanometer-scale field emitters have recently become attractive candidates for device applications where high frequency and high current are desirable attributes. High emission current can be obtained from densely packed Spindt-type emitter arrays with very low extraction voltage. Concern with the optimum geometrical shape of each emitter and the fraction of active emitters, makes a combined study of field emission and scanning electron microscopy especially useful.Several geometrical structures, as well as several materials, have been used to fabricate the field emitter arrays. The present study concentrates on silicon-base emitters fabricated at the Microelectronics Center of North Carolina (MCNC). Each emitter has a pyramidal structure, fabricated by anisotropic chemical etching of highly doped (ND = 1017 cm−3) n-type silicon. Figure 1 shows a SEM micrograph of a typical Si field emitter with a radius of curvature less than 30 nm. The field required for electron emission, about 3 × 107 V/cm, is created by a relatively low voltage applied to the extraction gate, a metal film less than one micron distant and deposited over a dielectric layer of silicon oxide (Figures 2 and 3).

Oxidation-sharpened gated field emitter array process

Structural and electrical characteristics of silicon field emitter arrays are reported. The authors present a process using anisotropic etching of silicon, and silicon oxidation, to form self-aligned gated field emitter structures. The process uses plasma etching and oxidation to form the field emission tips, and allows control of the aspect ratio of the devices. Processing limits and process latitude are discussed. The authors observed average currents of 0.3 mu A/emitter in 1300-emitter arrays, and the emission is stable at 5*10/sup -8/ torr. The arrays exhibit a soft failure behavior, where individual emission tips fail as the gate voltage is increased, but the array as a whole continues to operate. >

A Silicon Field Emitter Array Planar Vacuum FET Fabricated with Microfabrication Techniques

ABSTRACTIn this paper we will discuss a new type of field effect transistor, a vacuum FET, where the usual channel material is the vacuum rather than a semiconductor. This new device is based on Field Emitter Arrays (FEA) which are inherently submicron structures. That is, the field emitters themselves must have dimensions less that 0.1 micrometers in order to generate the high electrostatic fields necessary for electron tunneling, and the control gate (or extraction electrode) must be very close to the field emitter tip in order to generate these high fields with reasonable voltages. Consequently, this new “FET” is the first of a new class of vaccum electronic switching devices based on microfabrication techniques, and susceptible to circuit integration.

Fabrication and some applications of large-area silicon field emission arrays : R. N. Thomas, R. A. Wickstrom, D. K. Schroder and H. C. Nathanson. Solid St. Electron.17, 155 (1974)

Fabrication and some applications of large-area silicon field emission arrays : R. N. Thomas, R. A. Wickstrom, D. K. Schroder and H. C. Nathanson. Solid St. Electron.17, 155 (1974)