Noise Parameters Of Transistors Research Articles

Deep-learning-based precise characterization of microwave transistors using fully-automated regression surrogates

Accurate models of scattering and noise parameters of transistors are instrumental in facilitating design procedures of microwave devices such as low-noise amplifiers. Yet, data-driven modeling of transistors is a challenging endeavor due to complex relationships between transistor characteristics and its designable parameters, biasing conditions, and frequency. Artificial neural network (ANN)-based methods, including deep learning (DL), have been found suitable for this task by capitalizing on their flexibility and generality. Yet, rendering reliable transistor surrogates is hindered by a number of issues such as the need for finding good match between the input data and the network architecture and hyperparameters (number and sizes of layers, activation functions, data pre-processing methods), possible overtraining, etc. This work proposes a novel methodology, referred to as Fully Adaptive Regression Model (FARM), where all network components and processing functions are automatically determined through Tree Parzen Estimator. Our technique is comprehensively validated using three examples of microwave transistors and demonstrated to offer a competitive edge over the state-of-the-art methods in terms of modeling accuracy and handling the aforementioned issues pertinent to standard ANN-based surrogates.

Cross-Laboratory Experimental Validation of a Tunerless Technique for the Microwave Noise Parameters Extraction

In this article, a novel tunerless technique aimed at extracting the noise parameters of on-wafer transistors is experimentally validated. In detail, the effectiveness of the method has been confirmed by employing two different setups in two remotely located laboratories. The obtained noise parameters exhibit the level of accuracy typical of the standard source tuner-based Lane technique, without the well-known limitations due to the microwave tuner. The theoretical bases of the technique have been straightforwardly illustrated, and an extensive measurement campaign has been carried out on GaAs pHEMTs to confirm the suitability of the proposed approach. Furthermore, the technique can be applied to determine the contribution of additional thermal noise sources. The developed technique might represent the core of an automatic noise parameters’ extraction test bench.

LNA Design Optimization Using DNA Computing

A noise model for heterojunction transistors using a new technique for prediction was introduced using a neural network model, and was applied to get higher accuracy for transistor noise parameters. The new model is employed in designing of a wideband Low-Noise Amplifier (LNA), which resulted higher accuracy for the four noise parameters required, using only one neural network for simulation of noise figure parameters. The accuracy of this model has been demonstrated by coordinating anticipated and estimated values of heterojunction transistors for a specific data set of noise parameters at various frequencies, temperatures and bias points.DNA computing was used to design a Low-Noise Amplifier (LNA). The DNA computing method demonstrates good and very accurate results and also shows a very high accurate results in prediction of the noise parameters by using it as FFNN to determine a threshold level value, which consequently increased the gain leading to higher bandwidth.Comparison of the new method (DNANN) to other classical optimization techniques shows that the DNA computing method results in optimized noise parameters, which consequently leads to higher LNA gain which consequently leads to improved bandwidth. Copyright © 2017 Penerbit Akademia Baru - All rights reserved.

COMPARATIVE ANALYSIS OF DIFFERENT CAD METHODS FOR EXTRACTION OF THE HEMT NOISE WAVE MODEL PARAMETERS

The noise wave model has appeared as a very appropriate model for the purpose of transistor noise modeling at microwave frequencies. The transistor noise wave model parameters are usually extracted from the measured transistor noise parameters by using time-consuming optimization procedures in microwave circuit simulators. Therefore, three different Computer-Aided Design methods that enable more efficient automatic determination of these parameters in the case of high electron-mobility transistors were developed. All of these extraction methods are based on different noise de-embedding procedures, which are described in detail within this paper. In order to validate the presented extraction methods, they were applied for the noise modeling of a specific GaAs high electron-mobility transistor. Finally, the obtained results were used for the comparative analysis of the presented extraction approaches in terms of accuracy, complexity and effectiveness.

Development and validation of ANN approach for extraction of MESFET/HEMT noise model parameters

Most of the transistor noise models refer to the intrinsic device, providing relationships between the transistor noise model parameters and the noise parameters of the intrinsic device. Having in mind that the measured noise parameters correspond to the whole device including the device parasitics, the parameters of the noise models are most often determined by using optimizations in circuit simulators. In this paper, an efficient neural approach for straightforward determination of the noise model parameters, avoiding optimizations, is proposed. A detailed validation of the proposed approach was done by comparison of the measured transistor noise parameters with those obtained by using the extracted noise model parameters for two noise models—the Pospieszalski’s noise model and the noise wave model.

An analytical approach to the HEMT noise wave model parameter determination

This paper presents an analytical approach to determination of the noise wave model parameters for a high electron-mobility transistor working under different temperature and frequency conditions. The presented approach is composed of two steps and provides more efficient determination of these parameters than in the case of optimization procedures commonly applied for that purpose in circuit simulators. The first step is extraction of the noise parameters of transistor intrinsic circuit from the measured noise parameters of whole transistor using an analytical noise de-embedding procedure. The second step is calculation of the noise wave model parameters from the de-embedded intrinsic noise parameters using existing formulas. The accuracy of the presented approach is validated in a wide frequency and temperature range by comparison of the transistor noise parameters simulated for the determined noise wave model parameters with the measured noise parameters.

Extraction of microwave FET noise wave temperatures by using a novel neural approach

Purpose – The purpose of this paper is the development of an efficient approach for extraction of the microwave FET noise wave temperatures. Design/methodology/approach – The proposed approach is based on an artificial neural network (ANN) trained to determine the noise wave temperatures from the given measured transistor noise parameters. Findings – The presented approach enables not only efficient, but also an accurate direct extraction of the noise wave temperatures. This is confirmed by the validation of the proposed approach that is done by comparison of the transistor noise parameters obtained using the extracted noise wave temperatures with the measured noise parameters. Originality/value – Application of ANN is a novel approach to extract the noise wave temperatures, which provides more efficient microwave FET noise wave modeling.

Wave approach for noise modeling of gallium nitride high electron‐mobility transistors

AbstractThe wave approach has appeared as a very efficient tool for modeling as well as for measurements of noise parameters of microwave transistors. Having in mind the attractiveness of transistors in gallium nitride technology in modern communication systems, where it is very important to keep the noise on a low level and, thus, to have accurate transistor noise models, in this paper, the wave approach is applied for the noise modeling of high electron‐mobility transistor in gallium nitride technology. The noise wave representation of the transistor intrinsic circuit noise is used, where the noise wave parameters are modeled by exploiting the artificial neural networks. The modeling results, compared with the measured data and with those obtained by the conventional noise equivalent circuit model, provide a verification of the developed model accuracy. Copyright © 2015 John Wiley & Sons, Ltd.

Microwave noise modeling for MOSFETs

SummaryAnalytical expressions for the noise parameters of radio frequency metal oxide semiconductor field effect transistors (MOSFETs) are presented in this paper. These expressions are derived from an accurate small‐signal and noise equivalent circuit model, which takes into account the substrate parasitics and series inductances. Further, simplified expressions for noise parameters in the low‐frequency range are given. Good agreement is obtained between measured and calculated results up to 14 GHz for 0.35 µm MOSFET over a wide range of bias points. Copyright © 2015 John Wiley & Sons, Ltd.

Wide temperature range SiGe HBT noise parameter modeling and LNA design for extreme environment Electronics

SummaryThis paper investigates modeling of silicon‐germanium heterojunction bipolar transistor noise parameters and impedance‐matched Low‐Noise Amplifiers (LNAs) intended for operation across a wide temperature range (from 93 to 393 K). In general, noise performance improves with cooling until about 150 K, then degrades some because of carrier freeze‐out. With a temperature independent bias current, an LNA designed for 300 K operation shows acceptable performance from 93 to 393 K, albeit with some degradation of linearity below 120 K. Copyright © 2015 John Wiley & Sons, Ltd.

New neural method for bias dependent noise modelling of microwave transistors

A new method for accurate determination of noise parameters of microwave transistors for various bias conditions is proposed in this paper. The proposed model consists of a transistor empirical noise model (modification of Pospieszalski’s noise model) and two artificial neural networks. With the aim to avoid extraction of the empirical model parameters for each bias point, an artificial neural network is used to introduce bias-dependence of the equivalent circuit parameters. Accuracy of such bias-dependent model is further improved by using an additional neural network aimed to correct the noise parameters’ values. The proposed modeling approach is exemplified by modelling of a MESFET device in packaged form. The noise parameters obtained by the simulation agree well with the measured data.

A <inline-formula> <tex-math notation="TeX">$g_{m}/I_{D}$</tex-math></inline-formula>-Based Noise Optimization for CMOS Folded-Cascode Operational Amplifier

Noise optimization is a challenging problem for nanoscale metal-oxide-silicon field-effect transistor circuits. This brief presents a technique that uses transconductance-to-drain current (g m /I D )-dependent transistor-noise parameters to explore the design space and to evaluate tradeoff decisions. An expression for the corner frequency of the folded-cascode amplifier is derived. The design process demonstrated in this brief using the folded-cascode amplifier is applicable to a wide class of amplifier circuits.

Millimeter-Wave In Situ Tuner: An Efficient Solution to Extract the Noise Parameters of SiGe HBTs in the Whole 130–170 GHz Range

SiGe HBT noise parameters ( NF <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">min</sub> , R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sub> and Γ <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">opt</sub> ) are for the first time extracted in the entire 130 - 170 GHz frequency range. This achievement is realized using a D-band on-chip source-pull system, which includes an impedance tuner integrated with the transistor under test. On-wafer noise power measurements on this system were performed for each tuner impedance state, from which are extracted the transistor noise parameters in the complete D-band.

Microwave noise characterization of graphene field effect transistors

The microwave noise parameters of graphene field effect transistors (GFETs) fabricated using chemical vapor deposition graphene with 1 μm gate length in the 2 to 8 GHz range are reported. The obtained minimum noise temperature (Tmin) is 210 to 610 K for the extrinsic device and 100 to 500 K for the intrinsic GFET after de-embedding the parasitic noise contribution. The GFET noise properties are discussed in relation to FET noise models and the channel carrier transport. Comparison shows that GFETs can reach similar noise levels as contemporary Si CMOS technology provided a successful gate length scaling is performed.

Evaluation and Modeling of Relative Importance of RF Noise Sources in SiGe HBTs Using Various Noise Representations

We evaluate the relative importance of different RF noise sources in SiGe HBTs through analytical expressions of noise correlation matrices for various representations. The relevant importances of terminal resistance thermal noise and correlated intrinsic terminal current noise are shown to vary with representation, and within the same representation, vary from element to element in the noise correlation matrix. An important analytical result is that the largest impact of base resistance on HBT noise figure is not the thermal noise it produces, but instead is its impact as an impedance element in affecting the propagation of intrinsic transistor terminal noise currents towards the extrinsic terminals. As a result, the importance of noise correlation in affecting transistor noise parameters is highly dependent on the base resistance, and for practical SiGe HBT technologies, correlated intrinsic terminal noise dominates over thermal noise in determining minimum noise figure.

Cryogenic Self-Calibrating Noise Parameter Measurement System

A system for measuring the noise parameters of a device at cryogenic temperatures is described. The method includes the thermal calibration of a module consisting of a noise diode, a dispersive coupling network, a temperature sensor, heater, and a bias-tee. The magnitude and phase of the reflection coefficient presented by the module vary rapidly with frequency and the noise output of the module can be thermally calibrated by changing the temperature of the module with an internal heater. The resulting variable impedance-calibrated noise source can be used to measure noise parameters of transistors or amplifiers over a frequency range of 0.4 to 12 GHz via the wideband frequency-variation method. The calibration scheme is not unique to the module and may be applied in general to any noise source. Calibration and noise parameter measurements are made at cryogenic temperatures on a discrete transistor and two different low-noise amplifiers. The results are compared against theoretical values and those obtained using independent measurements. To the best of the authors' knowledge, this is the first measurement of a transistor's noise parameters at cryogenic temperatures using such techniques.

Verification of Noise-Parameter Measurements and Uncertainties

We propose and implement verification methods for measurements of the noise parameters of amplifiers and transistors. Because the verification rests on the comparison of different measurement results, it also serves as a test of the uncertainties. The verification process consists of first measuring separately both a passive two-port device and the amplifier or transistor of interest [the device under test (DUT)] and then measuring the tandem configuration of the passive device plus the DUT. The results of the measurements on the tandem configuration are compared to the results predicted based on the noise parameters and scattering parameters of the two individual components. In this paper, we describe the method, discuss the uncertainty analysis, and present measurement results demonstrating the application of the method using a mismatched transmission line as the passive device. We also present simulation results demonstrating the ability of the method to detect measurement errors.

Direct parameter-extraction method for MOSFET noise model from microwave noise figure measurement

A new method for the determination of the four noise parameters of the metal oxide semiconductor field effect transistors (MOSFETs) based on the noise figure measurement system without microwave tuner is presented. The noise parameters are determined based on a set of analytical expressions of noise parameters by fitting the measured noise figure of the active device. These expressions are derived from an accurate small signal and noise equivalent circuit model, which takes into account the substrate parasitics, pad capacitances, and series inductances. On-wafer experimental verification is presented and a comparison with tuner based method is given. Good agreement is obtained between simulated and measured results for 0.5 × 5 × 16 μm, 0.35 × 5 × 16 μm and 0.18 × 5 × 16 μm (gate length × number of gate fingers × unit gate width) MOSFETs.

Interpreting Transistor Noise

The simple noise models of field effect and bipolar transistors reviewed in this article are quite useful in engineering practice, as illustrated by measured and modeled results. The exact and approximate expressions for the noise parameters of FETs and bipolar transistors reveal certain common noise properties and some general noise properties of both devices. The usefulness of these expressions in interpreting the dependence of measured noise parameters on frequency, bias, and temperature and, consequently, in checking of consistency of measured data has been demonstrated.

Low-Noise Amplifier Design With Dual Reactive Feedback for Broadband Simultaneous Noise and Impedance Matching

The simultaneous noise and impedance matching (SNIM) condition for a common-source amplifier is analyzed. Transistor noise parameters are derived based on the more complete hybrid-¿ model, and the dominant factors jeopardizing SNIM are identified. Strategies for narrowband and broadband SNIM (BSNIM) are derived accordingly. A dual reactive feedback circuit along with an LC-ladder matching network is proposed to achieve the BSNIM. It includes a capacitive and an inductive feedback, where the former utilizes the transistor parasitic gate-to-drain capacitance and the latter is formed by transformer coupling. This circuit topology has been validated in 0.18- and 0.13- ¿m CMOS technologies for a 3-11-GHz ultra-wideband (UWB) and a 2.4-5.4-GHz multistandard application, respectively. The 3-11-GHz UWB low-noise amplifier is detailed as a design example.