A <inline-formula> <tex-math notation="TeX">$g_{m}/I_{D}$</tex-math></inline-formula>-Based Noise Optimization for CMOS Folded-Cascode Operational Amplifier

Abstract

Noise optimization is a challenging problem for nanoscale metal-oxide-silicon field-effect transistor circuits. This brief presents a technique that uses transconductance-to-drain current (g m /I D )-dependent transistor-noise parameters to explore the design space and to evaluate tradeoff decisions. An expression for the corner frequency of the folded-cascode amplifier is derived. The design process demonstrated in this brief using the folded-cascode amplifier is applicable to a wide class of amplifier circuits.