MOS Samples Research Articles

Taste Detection of Maltooligosaccharides with Varying Degrees of Polymerization.

Previous studies have shown that humans can taste maltooligosaccharides [MOS; degree of polymerization (DP) of 3-20] but not maltopolysaccharides (MPS; DP of >20) and that their taste detection is independent of the canonical sweet taste receptor. The objectives of this study were to determine the DP ranges of target stimuli that are tasted and further to investigate the impact of DP on taste detectability. To achieve this goal, we prepared three food-grade MOS samples with narrow DP ranges using flash chromatography: low (4-6), medium (7-12), and high (14-21) DP samples. Following sample preparation, we asked subjects to discriminate the MOS stimuli from blanks after the stimuli were swabbed on the tip of tongue. All stimuli were initially presented at 75 mM. Acarbose, an α-glucosidase inhibitor, was added to all stimuli, including blanks, to prevent oral hydrolysis of MOS. After determining that all three MOS samples were detected at a significant degree, we conducted follow-up studies to explore whether the detection of these samples differed at a range of concentrations (18-56 mM). The results showed that detection rates of medium- and high-DP MOS varied in a concentration-dependent manner (p < 0.05). In contrast, low-DP MOS showed a consistent detection rate across concentrations tested. These results demonstrate that humans can taste MOS stimuli of all chain lengths and that relative taste detection rates are generally similar across MOS with varying chain lengths.

Evaluation of particle size on the physicochemical properties of Moringa oleifera Lam. stem powder

Moringa oleifera Lam. stem (MOS) has been used for beneficial dietary and medicinal purposes. In this work, MOS samples of six different particle sizes were produced using sieve-based mechanical grinding to investigate the impact of varying particle sizes on the physicochemical properties of MOS powder. Scanning electron microscopic images revealed the destroyed fiber structures after grinding. The color turned greener and less yellow with decreasing particle size. The angle of repose significantly decreased from 70.36º to 60.25º, as the particle size declined, demonstrating the increasing fluidity of granules. The applied mechanical treatment did not alter the primary conformational properties of MOS except for destructing the intramolecular hydrogen bonds of cellulose and hemicellulose, thereby decreasing the crystallinity and thermal stability. Surface element analysis demonstrated more carbon-rich extractives on the particle surface as the particle size reduced. This study provided reasons behind improved dissolution and bioavailability of functional ingredients in plant-based granular materials by reducing particle size.

Preparation of magnesium oxysulfate cement as a 3D printing material

The mechanical properties and setting time of magnesium oxysulfate cement (MOS) were evaluated in the context of three-dimensional printing. MOS samples with MgO-to-magnesium sulfate mole ratios ranging from 2 ~ 9 and four water-to-solid weight ratios ranging from 0.27 ~ 0.57 were developed. The initial and final setting time was ~30 and 40 min, respectively. Moreover, MOS was prepared for 3D printing. The MOS micro-structure was examined. The average pore diameter was less than 20 nm, and the total porosity ranged from 11.76 to 37.39%. The gel pore content (<10 nm) and average pore diameter influenced the MOS compressive strength.

A Simple and Efficient Charge Injection Error Compensation Structure for MOS Sampling Switches

This paper introduces a new technique to design an analog MOS switch to be used in sampled-data circuits. In any sampled-data system, the accuracy of the sampling switch is a critical parameter to determine the overall performance of the system. To satisfy accuracy requirements of the switch, a novel technique to reduce channel charge injection error is proposed. The proposed switch has a very simple structure and it uses a small area of the chip. Also, it has a low on-resistance and its variation over the input signal range is acceptable. In order to evaluate the performance of the proposed switch, simulations are done in a 0.18[Formula: see text][Formula: see text]m standard CMOS technology. Simulation results show that the sampling errors produced by the channel charge injection is eliminated through a cancellation technique using an auxiliary transistor. The output error charge due to charge injection over a wide range of the input signal variation is very low (less than 1.45[Formula: see text]fC). Also, simulation results show that the proposed switch achieves signal-to-noise plus distortion ratio (SNDR) of 85.05[Formula: see text]dB, effective number of bits (ENOB) of 13.83, total harmonic distortion (THD) of [Formula: see text]87.23[Formula: see text]dB and spurious-free dynamic range (SFDR) of 88.14[Formula: see text]dB for a 1[Formula: see text]MHz sinusoidal input of 800[Formula: see text]mV peak-to-peak amplitude at 50[Formula: see text]MHz sampling rate with a 1.8[Formula: see text]V supply voltage.

A Fully Integrated Digital LDO With Coarse–Fine-Tuning and Burst-Mode Operation

The digital low dropout regulator (D-LDO) has drawn significant attention recently for its low-voltage operation and process scalability. However, the tradeoff between current efficiency and transient response speed has limited its applications. In this brief, a coarse–fine-tuning technique with burst-mode operation is proposed to the D-LDO. Once the voltage undershoot/overshoot is detected, the coarse tuning quickly finds out the coarse control word in which the load current should be located, with large power MOS strength and high sampling frequency for a fixed time. Then, the fine-tuning, with reduced power MOS strength and sampling frequency, regulates the D-LDO to the desired output voltage and takes over the steady-state operation for high accuracy and current efficiency. The proposed D-LDO is verified in a 65-nm CMOS process with a 0.01-mm2 active area. The measured voltage undershoot and overshoot are 55 and 47 mV, respectively, with load steps of 2 to 100 mA with a 20-ns edge time. The quiescent current is 82 $\mu\textrm{A}$ , with a 0.43-ps figure of merit achieved. Moreover, the reference tracking speed is 1.5 $\textrm{V}/\mu\textrm{s}$ .

MeV electron irradiation of Si-SiO2 structures with magnetron sputtered oxide

MeV electrons influence on the characteristics of Si-SiO2 structure with magnetron sputtered oxide was studied by ellipsometry and the thermally stimulated current (TSC) method. The MOS structures used in this study were fabricated on <100> oriented p-Si wafers of 12.75-17,25 Ω.cm resistivity. Magnetron sputtered oxides with different thicknesses of 20 and 100 nm were deposited on p-Si substrates. Both groups of samples were irradiated by 23 MeV electrons. The oxide thicknesses and TSC characteristics of the MOS samples were measured before and after MeV electron irradiation with doses of 4.8×1015 and 4.8×1016 el.cm-2. The oxide thicknesses of both groups of samples increased after irradiation. The main defects generated by the MeV electrons were evaluated. It was shown that the trap concentration increases with the electron irradiation dose. The main peak in the TSC characteristics gives information about the main radiation defects at the Si-SiO2 interface of the MOS structures. These defects can be related to the vacancy-boron complexes which are associated with the main impurities in the p-Si substrate. These results correspond to our results reported earlier for MeV electron irradiated Si-SiO2 structures with thermally grown oxide. But (in this case) the effects observed are more pronounced for the magnetron sputtered oxide. A possible reason is the higher defect concentration generated in the magnetron sputtered oxide during its deposition on Si-substrates.

Effects of gamma-ray irradiation on interface states and series-resistance characteristics of BiFeO3 MOS capacitors

The effects of radiation on the electrical-interface-state density (Dit) and series resistance (Rs) characteristics of BiFeO3 MOS capacitors were studied in this work. To study the response of MOS devices to gamma irradiation over a range of doses, MOS samples were irradiated using a Co-60 gamma-ray source from 0.5 to 16 grays at a dose rate of 0.0030Gy/s. C–V and G/ω–V measurements were recorded prior to and after irradiation at high (1MHz) frequency. The effects of the radiation were determined from analysis of the C–V and G/ω–V curves. A slightly decrease in the Rs values with increasing irradiation dose was observed. The total interface-state density was found to decrease because of the reordering and restructuring of radiation-induced defects in the MOS capacitors. The experimental results indicate that the electrical Rs and Dit characteristics of BiFeO3 MOS capacitors depend on the gamma-irradiation dose, and the calculated densities of the interface states are on the order of 1011eV−1cm−2. However, the calculated Dit values are not high enough to pin the Fermi level of the Si substrate and thereby corrupt device operation over the given dose range.

Limitations of the High–Low $C$ –$V$ Technique for MOS Interfaces With Large Time Constant Dispersion

We discuss the limitations of the high-low CV technique in evaluating the interface trap density (DIT) in MOS samples with a large time constant dispersion, as occurs in silicon carbide (SiC). We show that the high-low technique can seriously underestimate DIT for samples with large time constant dispersion, even if elevated temperatures are used to extend the range of validity.

Broadening of metal-oxide-semiconductor admittance characteristics: Measurement, sources, and its effects on interface state density analyses

The admittance characteristics of a well understood oxide system of Gd0.25Ga0.15O0.60/Ga2O3 on In0.53Ga0.47As are studied at low temperature where the majority of the defect states are frozen. The capacitance-voltage (C-V) characteristics are broadened beyond those expected for an ideal sample. The broadening is ascribed to the presence of a non-uniform surface potential. We report a simple method for measuring the surface potential distribution width using the ac signal amplitude dependence of the C-V profile. A distribution of surface potentials can explain the observed behavior, but only if it includes the admittance of the semiconductor. This is in contrast to the usual approximation that the effect of a distribution of surface potentials on the admittance of the semiconductor is ignored. It is found that the charge state of defect states in the oxide and variation in the doping density of the substrate contribute to the broadening. The implications for inclusion of the semiconductor admittance for the interpretation of ideal characteristics and for the analysisof characteristics with interface states are explored. Both the conductance method and the quasi-equilibrium C-V methods are affected to some extent. An alternative method that can more accurately extract information from the admittance characteristics of the MOS samples is proposed.

New Analysis to Measure the Capacitance and Conductance of MOS Structure toward Small Size of VLSI Circuits

In this research thin film layers have been prepared at alternate layers of resistive and dielectric deposited on appropriate substrates to form four – terminal R-Y-NR network. If the gate of the MOS structures deposited as a strip of resistor film like NiCr, the MOS structure can be analyzed as R-Y-NR network. A method of analysis has been proposed to measure the shunt capacitance and the shunt conductance of certain MOS samples. Mat lab program has been used to compute shunt capacitance and shunt conductance at different frequencies. The results computed by this method have been compared with the results obtained by LCR meter method and showed perfect coincident with each other.

Radiation defects introduced by MeV electrons in argon implanted MOS structures

The influence of MeV electron irradiation on the interface states of argon implanted thin oxide MOS samples has been studied by the thermally stimulated current (TSC) method. The oxide thickness of the structures is 18 nm. Two groups of n-type MOS structures non-implanted and implanted with 20 keV Ar+ ions and a dose of 5×1012 cm−2 are examined. Both groups are simultaneously irradiated by 23 MeV electrons with doses of 1.2×1016, 2.4×1016 or 6.0×1016 el/cm2. The energy position and density of the interface states (generated by electron irradiation, ion implantation or both treatments of the samples) are determined. It is shown that MeV electron irradiation decreases the concentration of interface states (like an oxygen-vacancy and di-vacancy) slightly and creates additional interface states (like an impurity-vacancy) at the Si–SiO2 interface of argon implanted MOS structures.

New Analysis to Measure the Capacitance and Conductance of MOS Structure

In this research thin film layers have been prepared at alternate layers of resistive and dielectric deposited on appropriate substrates to form four – terminal RY-NR network. If the gate of the MOS structures deposited as a strip of resistor film like NiCr, the MOS structure can be analyzed as R-Y-NR network. A method of analysis has been proposed to measure the shunt capacitance and the shunt conductance of certain MOS samples. Matlab program has been used to compute shunt capacitance and shunt conductance at different frequencies. The results computed by this method have been compared with the results obtained by LCR meter method and showed perfect coincident with each other.

Radiation defects in n- and p-Si MOS structures caused by consecutive ion implantation and gamma irradiation

The influence of γ-irradiation on the interface states in ion-implanted MOS samples was studied by the thermally stimulated current (TSC) method. Two groups of MOS based on n- and p-type Si-wafers and oxide thickness of 110nm were implanted with 65keV silicon ions at dose of 1.2×1012cm−2. After implantation the samples were exposed to γ-radiation at doses varying from 104 to 106rad. The energy position and the concentration of interface traps before and after the gamma irradiation were determined. The electron levels at the Si–SiO2 interface created by the irradiation were found to depend on the type of silicon wafers used. The TSC of p-type MOS samples was extended to higher temperatures then for n-type, and their increment with γ-dose was larger.

Ultrathin oxynitridation process through ion implantation in a poly Si 1− xGe x gate MOS capacitor

Effect of temperature and time of heat treatment on the distribution of ion-implanted nitrogen in poly Si 0.65Ge 0.35 gate MOS samples was studied. Secondary ion mass spectrometry (SIMS) was used for the qualitative analysis of the nitrogen distribution. Rapid thermal processing was carried out for a temperature range of 950–1070°C for the redistribution of ions. The nitrogen implantation doses were 5×10 14 cm −2, 2×10 15 cm −2 and 5×10 15 cm −2, all with an implantation energy of 50 keV. For a uniform distribution of nitrogen in the SiO 2 region, an optimal temperature at a well calibrated time must be applied and this depends on the implantation dose. For medium and high concentrations the optimal conditions were 1050°C and 15 s, and 1070°C and 15 s, respectively. A uniform nitrogen distribution could be obtained throughout the SiO 2 film. Prolonged heat treatment can cause degradation of the oxide layer and movement of the nitrogen and oxygen into the channel and the poly-Si 0.65Ge 0.35 layer.

Effect of low dose γ-radiation on the annealing temperature of radiation defects in ion implanted MOS structures

The effect of previous low dose (10 3 rad) gamma irradiation on the annealing temperature of the radiation-induced defects in ion implanted MOS samples is studied by means of thermally stimulated current (TSC) method. In the work presented here two groups of samples (first—without any additional treatment and second—gamma irradiated after oxidation samples) are used. Then both groups are implanted through the oxide with boron ions with energy 15 KeV and dose of 1.2×10 12 cm −2. Thermal treating of the samples at different temperature is carried out. Full thermal annealing of the radiation defects introduced by ion implantation in the samples from the first group is observed after 15 min annealing at 700 °C. It is shown that gamma irradiation leads to a lowering of the annealing temperature—after 15 min annealing at 500 °C, TSC spectra of the double treated samples is not observed. A possible explanation of the results is proposed.

A recombination- and trap-assisted tunneling model for stress-induced leakage current

Charge-loss effects in device dielectric strongly limit the reliability of non-volatile memory cells. The explanation of the leakage mechanisms is therefore an essential condition for the establishment of scaled and reliable technology for data storage. This paper concerns with the physical interpretation of the stress-induced leakage current (SILC), based on both experimental and computational investigations on MOS capacitor structures. It is found that: (a) the leakage is partly due to electron–hole recombination mechanisms in the bulk oxide, (b) defect levels acting as recombination- and trap-assisted tunneling (RTAT) sites are located at deep energy levels in the SiO2 and (c) the SILC characteristics of thin oxide (tox<8.5 nm) MOS samples can be very well reproduced by a numerical model featuring RTAT as the leading mechanism of the leakage. As a result, the oxide-degradation effects can be monitored by the new numerical tool.

Flat band voltage shift and oxide properties after rapid thermal annealing

The flat band voltage ( V fb) shift observed for MOS samples exposed to rapid thermal annealing (RTA) (N 2, 20 s, 1040°C) is examined for (1 0 0), (1 1 0) and (1 1 1) orientation-silicon substrates. Using a mercury gate C– V system, the V fb shift can be attributed to changes in the electronic properties of the oxide layer and not polysilicon gate effects, as had previously been suggested. In addition, this work indicates that the flat band voltage shift results from a reduction of interface and fixed oxide charge due to the RTA process. The interface and oxide charge densities are related to the density of available bonds for each surface orientation, both before and after an RTA step. Based on these results, we argue that the V fb shift following RTA is primarily due to a reduction of fixed positive charge in the oxide, and to a lesser degree, to a reduction of negative interface charge. The net effect is that the RTA step reduces the total oxide charge density.

Two types of traps at the [formula omitted] interface characterized by their cross sections

The dispersion behavior of traps at the Si SiO 2 interface has been investigated applying the modulation capacitance voltage method. N-type MOS samples of different material parameters and preparation conditions were used to vary the state density distribution. Two dispersion regions have been resolved in the upper half of the gap which can be described by two Gaussian broadened time constants. The evaluated capture cross sections can be classified in two groups independent of the specific properties of the samples. The cross sections were assigned to two types of silicon dangling bond defects with different back bond configurations.

Metal–insulator transition in two dimensions

Studies of the temperature dependence of the conductivity on large number of Si–MOS samples with different disorder give evidence for the lack of a universal one-parameter scaling. We demonstrate that the 2D metallic state survives over a wide range of temperatures from 16 mK to 8 K, carrier densities from 0.7–35×10 11 cm −2 and conductances, G, from G≃0.3– 120 e 2/ h . We have revealed experimentally a weak logarithmic correction to the conductivity, which is of the delocalizing sign. We discuss a novel relationship between the partial scaling functions and the conductivity, which explains both, the exponential temperature dependence and the weak logarithmic corrections to the conductivity of the 2D strongly interacting system.

Potential fluctuations due to P b centres at the [formula omitted] interface

We show that the potential fluctuation model of Brews applies very accurately to P b centres at the (111) and (100) interfaces. Vacuum annealed MOS samples were used which contained a particularly ‘pure’ interface largely dominated by the P b-like defects. For the (100) interface, P b0 and P b1 defects appear to have the same capture cross-section.