Ge2Sb2Te5 Nanowires Research Articles

Trade‐Off between Multilevel Characteristics and Power Consumption of High‐Aspect‐Ratio Phase‐Change Memory

Storage density improvement is a key challenge for phase‐change memory (PCM) application for storage class memory (SCM). The high‐aspect‐ratio design in confined‐structure PCM enables controllable multilevel cell (MLC) operation. However, the increasing aspect‐ratio will cause too large energy consumption to successfully operate the PCM. The trade‐off of different aspect‐ratio sizes of Ge2Sb2Te5 (GST) nanowires (NWs) is investigated. Through COMSOL simulation and experiments, with the same Reset energy, the limit of aspect‐ratio decreases with increasing NWs lengths. In the meantime, larger Reset energy is required with a larger length for the same aspect‐ratio devices. Finally, the design range of the high aspect‐ratio is optimized in which the NWs length size is below 1.5 um and the aspect‐ratio ranges from 8:1 to 10:1. This work can provide guidance for the design of high‐aspect‐ratio 3D PCM with better MLC.

Phase Change via Intermediary Metastable Local Structure of Ge Atoms in Ge2Sb2Te5 Nanowires during Electrical Switching

In this study, local structural changes induced by electrical SET/RESET operations in single crystalline Ge2Sb2Te5 (GST) nanowires fabricated via the vapor-liquid-solid method have been investigate...

In situ thermal behavior of resistance drift in GeTe and Ge2Sb2Te5 nanowires via Raman thermometry

The time-dependent resistance drift in GeTe and Ge2Sb2Te5 (GST) nanowires is investigated via Raman thermometry.

Fast Switching “On/Off” Chiral Surface Plasmon Polaritons in Graphene-Coated Ge2Sb2Te5 Nanowire

Plasmonic nanowire was found to generate chiral surface plasmon polaritons (SPPs), with the perspective of enhancing molecular spectroscopy for biosensing applications. However, the lack of chiroptical switches exhibits significant limitations in detecting a multitude of various analytes with a high sensitivity and in asymmetric catalysis to provide a switchable stereoselectivity. Here, we numerically and analytically propose a graphene-coated Ge2Sb2Te5 (GST225) nanowire to solve this problem. We highlight that the chiral SPPs propagating along the nanowire can be reversibly switched between “on” (transparent) and “off” (opaque) as transiting the state of GST225 core between amorphous and crystalline. Moreover by changing the Fermi energy of the graphene coating layer, the hybrid nanowire can produce either achiral or chiral SPPs at the output of nanowire. A thermal-electric model is put forward to study the temporal variation of the temperature of the GST225 core. Transiting the structural phase of GST22...

Atomic Migration Induced Crystal Structure Transformation and Core-Centered Phase Transition in Single Crystal Ge2Sb2Te5 Nanowires.

A phase change nanowire holds a promise for nonvolatile memory applications, but its transition mechanism has remained unclear due to the analytical difficulties at atomic resolution. Here we obtain a deeper understanding on the phase transition of a single crystalline Ge2Sb2Te5 nanowire (GST NW) using atomic scale imaging, diffraction, and chemical analysis. Our cross-sectional analysis has shown that the as-grown hexagonal close-packed structure of the single crystal GST NW transforms to a metastable face-centered cubic structure due to the atomic migration to the pre-existing vacancy layers in the hcp structure going through iterative electrical switching. We call this crystal structure transformation "metastabilization", which is also confirmed by the increase of set-resistance during the switching operation. For the set to reset transition between crystalline and amorphous phases, high-resolution imaging indicates that the longitudinal center of the nanowire mainly undergoes phase transition. According to the atomic scale analysis of the GST NW after repeated electrical switching, partial crystallites are distributed around the core-centered amorphous region of the nanowire where atomic migration is mainly induced, thus potentially leading to low power electrical switching. These results provide a novel understanding of phase change nanowires, and can be applied to enhance the design of nanowire phase change memory devices for improved electrical performance.

Effect of the Thermal Conductivity on Resistive Switching in GeTe and Ge2Sb2Te5 Nanowires.

The thermal conduction characteristics of GeTe and Ge2Sb2Te5(GST) nanowires were investigated using an optical method to determine the local temperature by Raman spectroscopy. Since the localization of surface charge in a single-crystalline nanostructure can enhance charge-phonon scattering, the thermal conductivity value (κ) of single crystalline GeTe and GST nanowires was decreased significantly to 1.44 Wm(-1) K(-1) for GeTe and 1.13 Wm(-1) K(-1) for GST, compared to reported values for polycrystalline structures. The SET-to-RESET state in single-crystalline GeTe and GST nanowires are characteristic of a memory device. Unlike previous reports using GeTe and GST nanowires, the SET-to-RESET characteristics showed a bipolar switching shape and no unipolar switching. In addition, after multiple cycles of operation, a significant change in morphology and composition was observed without any structural phase transition, indicating that atoms migrate toward the cathode or anode, depending on their electronegativities. This change caused by a field effect indicates that the structural phase transition does not occur in the case of GeTe and GST nanowires with a significantly lowered thermal conductivity and stable crystalline structure. Finally, the formation of voids and hillocks as the result of the electromigration critically degrades device reliability.

The role of contact resistance in GeTe and Ge2Sb2Te5 nanowire phase change memory reset switching current

Nanowire (NW) structures offer a model system for investigating material and scaling properties of phase change random access memory (PCRAM) at the nanometer scale. Here, we investigate the relationship between nanowire device contact resistance and reset current (Ireset) for varying diameters of NWs. Because the reset switching current directly affects possible device density of PCRAM NWs, it is considered one of the most important parameters for PCRAM. We found that the reset switching current, Ireset, was inversely proportional to the contact resistance of PCRAM NW devices decreasing as NW diameter was reduced from 250 nm to 20 nm. Our observations suggest that the reduction of power consumption of PCRAM in the sub-lithographic regime can be achieved by lowering the contact resistance.

Vacuum-Insulated Self-Aligned Nanowire Phase-Change Memory Devices

Phase-change memory (PCM) is an emerging technology for faster nonvolatile memory where a small volume of phase-change material is switched between amorphous and crystalline states to provide distinct logic levels. A major difficulty with these devices is the high-power requirement for set and reset operations. In this brief, we computationally analyze a vacuum-insulated self-aligned Ge2Sb2Te5 nanowire (NW) PCM device and propose a way to control the placement and orientation of the NWs. The analysis is performed using 2-D rotationally symmetric finite-element simulations with temperature-dependent material parameters and accounting for thermoelectric effects. Simulation results predict a $\sim 10\times $ reduction in current required for reset operation and minimal thermal crosstalk when compared with a similarly sized conventional mushroom cell due to effective suppression of lateral heat loss. The operation of the vacuum-insulated NW devices is also almost independent of current polarity (unlike that of the mushroom cell), which can be advantageous for more flexible array programming schemes. These devices can be used to build densely packed PCM with lower power consumption and less thermal crosstalk.

Dislocation-templated amorphization of Ge2Sb2Te5 nanowires under electric pulses: A theoretical model

Owing to their unique phase change property, GeSbTe alloys hold promise for applications as a candidate material for nonvolatile electronic data storage. In this paper, we theoretically investigate the dislocation mechanisms underlying the phase change phenomenon of GeSbTe alloys under electric pulses. On the basis of the recent experiments by Nam et al. (Science 336, 1561–1566 (2012)), a theoretical model is presented to rationalize the dislocation-templated amorphization process under the action of electric pulses. The physical mechanisms of the nucleation, movement, and multiplication of dislocations in the electric field are analyzed. Using the model, the evolutions of temperature and dislocation density in a Ge2Sb2Te5 nanowire under electric pulses are computed and the critical voltage of amorphization is predicted.

Effect of organometallic clamp properties on the apparent diversity of tensile response of nanowires

The influence of the experimental boundary conditions used for tensile testing of individual nanowires on the measured apparent mechanical response is reported. Using a microelectromechanical platform designed for in situ tensile testing, in combination with digital image correlation of sequences of scanning electron microscope images, the mechanical behavior of single crystalline Si, Pd, and Ge2Sb2Te5 nanowires was measured during load–unload cycles. In situ testing enables direct determination of the nanowire strain. Comparison of the direct strain with common metrics for apparent strain that include any compliance or slipping of the clamping materials (electron-beam induced Pt-containing deposits) highlights several different artifacts that may be manifested. Calculation of the contact stiffness is thus enabled, providing guidelines for both proper strain measurement and selection of clamping materials and geometries that facilitate elucidation of intrinsic material response. Our results suggest that the limited ability to tailor the stiffness of electron-beam induced deposits results from the predominance of the organic matrix in controlling its mechanical properties owing to relatively low Pt content and sparse morphology.

Phase change behavior and critical size of Ge2Sb2Te5 nanowires and nanotubes

The phase change behavior of Ge2Sb2Te5 (GST) nanowires and nanotubes was investigated by using thermodynamic calculations. It is revealed that the melting and crystallization temperatures for both nanowires and nanotubes decrease as the diameter of the nanostructures is reduced. There exists a critical diameter for both nanowires and nanotubes, below which the crystallization could not take place. It determines the ultimate scaling limit of nanowires or nanostructures phase-change memory. The critical diameter for nanowires depends on the difference between the surface energy of solid and liquid phases, the bulk melting and crystallization temperatures, as well as the melting and crystallization entropy. The critical diameter of the nanotubes is larger than that of the nanowires. And it is also dependent on the ratio of outer diameter over inner diameter of the tubes. The lower ratio of outer diameter over inner diameter gives rise to the larger critical diameter of the nanotubes.

A lithography-independent and fully confined fabrication process of phase-change materials in metal electrode nanogap with 16-μA threshold current and 80-mV SET voltage

In this paper,we fabricate a lateral phase change memory device composed of a Ge2Sb2Te5 nanowire (GST NW) fully confined in a tungsten electrode nanogap. A SiNx spacer is used not only as etch mask for the fabrication of the GST NW, but also as sacrificial layer for the lift-off process, which makes it feasible to fully confine the GST NW in the metal electrode nanogap. Electrical characterization shows that the device has unprecedentedly low threshold current and SET voltage of only 16 µA and 80 mV, respectively.

Size-dependent nucleation rate of Ge2Sb2Te5 nanowires in the amorphous phase and crystallization activation energy

Simple and unified models have been established for size-dependent crystallization activation energy and nucleation rate of Ge2Sb2Te5 nanowires in the amorphous phase based on size-dependent melting temperature of low dimensional materials. The models are free of any adjustable parameters and predict a decreasing trend of crystallization activation energy and an increasing trend of nucleation rate in the amorphous phase with the size dropping of nanocrystals. Both the phenomena attribute to the increasing surface to volume ratio with the size dropping and surface atoms plays an important role. The model predictions agree well with available experimental results of Ge2Sb2Te5 wires, which supply an easy way to understand crystallization behavior of phase change memory nanomaterials.

A self-aligned process for phase-change material nanowire confined within metal electrode nanogap

A self-aligned fabrication process is presented by which phase-change material nanowire (NW) perfectly confined within metal electrode nanogap based on electron-beam lithography and inductively coupled plasma etching process. Lateral phase-change random access memory device fabrication is demonstrated by this process with Ge2Sb2Te5 NW confined within 39 nm tungsten electrode nanogap and the electrical characterizations are illustrated. It is found that the threshold current is only 2 μA and the dc power consumption is remarkably low. The process is simple, flexible and achieves localization filling. In addition, the process can be easily transferred to other types of phase-change and nanoelectronics materials.

Extremely low drift of resistance and threshold voltage in amorphous phase change nanowire devices

Time-dependent drift of resistance and threshold voltage in phase change memory (PCM) devices is of concern as it leads to data loss. Electrical drift in amorphous chalcogenides has been argued to be either due to electronic or stress relaxation mechanisms. Here we show that drift in amorphized Ge2Sb2Te5 nanowires with exposed surfaces is extremely low in comparison to thin-film devices. However, drift in stressed nanowires embedded under dielectric films is comparable to thin-films. Our results shows that drift in PCM is due to stress relaxation and will help in understanding and controlling drift in PCM devices.

Effects of transport gradients in a chemical vapor deposition reactor employingvapor–liquid–solid growth of ternary chalcogenide phase-change materials

Chemical vapor deposition (CVD) with vapor–liquid–solid (VLS) growth is employed to synthesizeindividual Ge2Sb2Te5 nanowires with the ultimate goal of synthesizing a large scale nanowire array for universalmemory storage. A consistent challenge encountered during the synthesis is a lack ofcontrol over the composition and morphology across the growth substrate. Tobetter understand the challenges associated with the CVD synthesis of the ternarychalcogenide, computational fluid dynamics simulations are performed to quantify 3Dthermal and momentum transients in the growth conditions. While these gradientsare qualitatively known to exist, they have not been adequately quantified inboth the axial and radial directions when under pressure and flow conditionsindicative of VLS growth. These data are not easily acquired by conventionalmeans for the axial direction under vacuum and are a considerable challenge toaccurately measure radially. The simulation data shown here provide 3D insights intothe gradients which ultimately dictate the region of controllable stoichiometryand morphology. These results help explain the observed inhomogeneity of thecharacterized ternary chalcogenide growth products at various growth substrate locations.

Size-Dependent Surface-Induced Heterogeneous Nucleation Driven Phase-Change in Ge2Sb2Te5 Nanowires

By combining electron microscopy and size-dependent electrical measurements, we demonstrate surface-induced heterogeneous nucleation-dominant mechanism for recrystallization of amorphous phase-change Ge2Sb2Te5 nanowires. Heterogeneous nucleation theory quantitatively predicts the nucleation rates that vary by 5 orders of magnitude from 190 to 20 nm lengthscales. Our work demonstrates that increasing the surface-to-volume ratio of nanowires has two effects: lowering of the activation energy barrier due to phonon instability and providing nucleation sites for recrystallization. The systematic study of the effect of surface in phase-change behavior is critical for understanding nanoscale phase-transitions and design of nonvolatile memory devices.

Highly scalable non-volatile and ultra-low-power phase-change nanowire memory

The search for a universal memory storage device that combines rapid read and write speeds, high storage density and non-volatility is driving the exploration of new materials in nanostructured form. Phase-change materials, which can be reversibly switched between amorphous and crystalline states, are promising in this respect, but top-down processing of these materials into nanostructures often damages their useful properties. Self-assembled nanowire-based phase-change material memory devices offer an attractive solution owing to their sub-lithographic sizes and unique geometry, coupled with the facile etch-free processes with which they can be fabricated. Here, we explore the effects of nanoscaling on the memory-storage capability of self-assembled Ge2Sb2Te5 nanowires, an important phase-change material. Our measurements of write-current amplitude, switching speed, endurance and data retention time in these devices show that such nanowires are promising building blocks for non-volatile scalable memory and may represent the ultimate size limit in exploring current-induced phase transition in nanoscale systems.

Synthesis and nanoscale thermal encoding of phase-change nanowires

Low-dimensional phase-change nanostructures provide a valuable research platform for understanding the phase-transition behavior and thermal properties at nanoscale and their potential in achieving superdense data storage. Ge2Sb2Te5 nanowires have been grown using a vapor-liquid-solid technique and shown to exhibit distinctive properties that may overcome the present data storage scaling barrier. Local heating of an individual nanowire with a focused electron beam was used to shape a nano-bar-code on a Ge2Sb2Te5 nanowire. The data encoding on Ge2Sb2Te5 nanowire may promote novel device concepts to implement ultrahigh density, low energy, high speed data storage using phase-change nanomaterials with diverse thermal-programing strategies.

Phase-Change Nanowires for Non Volatile Memory

AbstractWe report the synthesis of GeTe, Sb2Te3 and Ge2Sb2Te5 nanowires via a gold-catalyzed vapor-liquid-solid mechanism. The nanowires are studied via electron microscopy and energy-dispersive X-ray spectrometry and are found to be single crystalline. For electrical measurements contact to individual nanowires is made via electron-beam lithography. The nanowires can be switched from their initially low resistance state to a higher resistance state by applying a 200ns voltage pulse. Switching back to the low resistance state is possible via annealing. Electric force microscopy studies show the switching takes place at the metal-nanowire contact.