The epitaxy of sources and drains is a critical enabler for enhanced transistor performances. In N-type MOS devices, selective SiP epitaxy can simultaneously yield (i) very high levels of electrically active dopants which is crucial for contact resistance minimization and (ii), tensile strain in Raised Sources and Drains (RSD) on each side of Si FD-SOI channels. This study present process solutions in order to benefit from large amounts of phosphorus in a silicon lattice and have thereby tensile strain, while maintaining excellent crystal quality, good surface morphology and a low electrical resistivity. We use here industrial precursors widely used in manufacturing, e.g. a [SiH2Cl2 + PH3 + HCl + H2] chemistry, for the selective deposition, in the 600°C-700°C range, of SiP in conventional epitaxy reactors. We achieved phosphorous concentrations as high as 4.6×10²¹ cm-3 (9.3%) in blanket SiP layers while preserving good crystal quality. In FD-SOI devices, we succeeded in having a selective process yielding rather smooth and free of defects Si:P films with 1.6×10²¹ cm-3(3.2%) of P.