EEPROM Research Articles

IOT Based Energy Meter Reading System with Automatic Billing

In recent time e-meter (electronic meter) place a major role for the power consumption &cost efficient system. In advanced future it has high reliable and productive programmed meter perusing framework (AMRS). This paper aims to plan a straightforward ease.IOTbased energy meter reading system which includes fault indication. Unit usage after (i.e. for 15 days once). Mode selection (automatic& manual) and SMS alert to user. Mode selection option is included. To avoid more power consumption automatic mode is used to cut-down the appliances for the user convenience. If there is a fault in the e-meter it sends a notification to the user. If there is any fault in E-meter the LED will glow. EEPROM (Electrically Erasable Programmable Read Only Memory) used as flash memory to store a data. The proposed system neglects the regular digital meter reading system and allows remotely access the electronic meter. Legitimate validation, user can get to the created webpage points of interest from anyplace on the planet. The advantages of this project are to reduce cost and save more power and also reduce man power and time consumption. This project is implemented is hardware and software used are ARUDINO IDE (using embedded C language).

Radiation-Induced Damage–Based System and Method for Indirectly Monitoring High-Dose Ionizing Radiation

Proximate to nuclear power plant severe accidents, sustained high levels of gamma radiative flux are perilous not only to human health but also to the functionality of conventional radiation-monitoring devices. Effective accident mitigation presents a significant challenge because the gamma radiation adversely affects the means by which it is measured. Deployments of large numbers of radiation-hardened monitoring devices, required to meet the demands of adequate system reliability and the large spatiotemporal scales associated with such accidents, are expected to be prohibitively expensive. As an affordable alternative, this paper proposes usage of a wireless sensor network (WSN) built with unshielded low-cost integrated circuits (ICs) acting as consumable proportional sensors of gamma radiation dose. Adverse responses of ICs to damaging gamma radiation dose can be characterized statistically, in controlled laboratory experiments. In subsequent field application, responses of individual ICs, transmitted over a WSN to a remote computer, can be translated into local dose measurements using correlations obtained via the laboratory characterization. Experiments to characterize adverse response to radiation dose were performed on multiple complementary metal-oxide-semiconductor–based electrically erasable programmable read-only memory devices in a Gammacell 220 Cobalt-60 Irradiation Unit (60Co source) at the Canadian Nuclear Laboratories. Details of the experiments, data analyses, and a small-scale prototype WSN are discussed in this paper. Outcomes of the experiments a nd analysis support the concept of using low-cost consumable ICs in a WSN to measure high levels of gamma radiation dose associated with nuclear power plant severe accidents.

Mechanistic analysis of temperature-dependent current conduction through thin tunnel oxide in n+-polySi/SiO2/n+-Si structures

We present a detailed investigation on temperature-dependent current conduction through thin tunnel oxides grown on degenerately doped n-type silicon (n+-Si) under positive bias (VG) on heavily doped n-type polycrystalline silicon (n+-polySi) gate in metal-oxide-semiconductor devices. The leakage current measured between 298 and 573 K and at oxide fields ranging from 6 to 10 MV/cm is primarily attributed to Poole-Frenkel (PF) emission of trapped electrons from the neutral electron traps located in the silicon dioxide (SiO2) band gap in addition to Fowler-Nordheim (FN) tunneling of electrons from n+-Si acting as the drain node in FLOating gate Tunnel OXide Electrically Erasable Programmable Read-Only Memory devices. Process-induced neutral electron traps are located at 0.18 eV and 0.9 eV below the SiO2 conduction band. Throughout the temperature range studied here, PF emission current IPF dominates FN electron tunneling current IFN at oxide electric fields Eox between 6 and 10 MV/cm. A physics based new analytical formula has been developed for FN tunneling of electrons from the accumulation layer of degenerate semiconductors at a wide range of temperatures incorporating the image force barrier rounding effect. FN tunneling has been formulated in the framework of Wentzel-Kramers-Brilloiun taking into account the correction factor due to abrupt variation of the energy barrier at the cathode/oxide interface. The effect of interfacial and near-interfacial trapped-oxide charges on FN tunneling has also been investigated in detail at positive VG. The mechanism of leakage current conduction through SiO2 films plays a crucial role in simulation of time-dependent dielectric breakdown of the memory devices and to precisely predict the normal operating field or applied floating gate (FG) voltage for lifetime projection of the devices. In addition, we present theoretical results showing the effect of drain doping concentration on the FG leakage current.

Current conduction mechanisms through thin tunnel oxide during erase operation of flash electrically erasable programmable read-only memory devices

The mechanism of current conduction through thin tunnel oxide during erase operation of flash electrically erasable programmable read-only memory devices has been studied both theoretically and experimentally. The floating gate (FG) leakage current measured between 25 and 300 °C and at oxide fields ranging from 6 to 10 MV/cm is primarily attributed to Poole–Frenkel (PF) emission of trapped electrons from the electron traps located at about 1.0 eV below the silicon dioxide conduction band in addition to Fowler–Nordheim (FN) tunneling of electrons from the degenerately doped n-type polycrystalline silicon (n+-polySi) FG. It is observed that PF emission current IPF dominates FN electron tunneling current IFN at oxide electric fields Eox between 6 and 10 MV/cm and throughout the temperature range studied here. The observed thickness dependence of FG leakage current at a given applied oxide field arises due to different electron trap concentrations in the oxide. A physics based new temperature dependent analytical formula has also been developed for FN tunneling of electrons from the accumulation layer of semiconductors. In addition, the authors present theoretical results showing the effect of the FG doping concentration on the leakage current.

Design Techniques for a 30-ns Access Time 1.5-V 200-KB Embedded EEPROM Memory

A 200-KB embedded electrically erasable programmable read -only memory (EEPROM), which operates with a single 1.5-V power supply voltage based on an HHGRACE (Shanghai Huahong Grace Semiconductor Manufacturing Corporation) 90-nm EEPROM process, is developed. In this brief, several key design techniques are presented. An improved bit cell with a larger current sensing window is adopted in the split-source EEPROM array. To get high-speed read operation, a high-performance sense amplifier and a dynamic sensing window tracking reference voltage generating circuit have been proposed. The die size of the proposed EEPROM IP is 1.271 mm2, and the EEPROM cell size is 0.32 $\mu\text{m}^{2}$ . Access time of 30 ns is achieved at 1.5 V and 25 °C.

SIP with TSV for Class 1 Medical Devices

The demand for greater performance of hearing instruments in smaller form factors continues to drive the need for miniaturization of microelectronic packages. This article reports how through-silicon-via (TSV) technology was used to shrink the size of a conventional digital signal process (DSP)-based system in package (SIP) used in the smallest in-the-ear hearing instruments. The conventional SIP is a heterogeneous multichip module containing a wire-bonded electrically erasable programmable read-only memory (EEPROM) die mounted atop a DSP flip-chip die along with 10 passive components built upon a high-density alumina substrate. The wire bonds of the conventional SIP, along with the extra space they require, are eliminated and replaced by TSV structures fabricated in the DSP integrated circuit (IC) wafer using the via-last method. A redistribution layer on the back side of the DSP IC enables direct attachment and electrical interconnection of the memory IC to the DSP IC. The result is a 23% smaller SIP with functionality demonstrated in hearing aid prototypes. This is believed to be the first demonstration of TSV in a heterogeneous hearing aid multichip module. This article describes the design approaches, materials, basic process steps, results, and challenges encountered in creating this novel TSV-SIP.

Experimental Reliability Studies and SPICE Simulation for EEPROM at Temperatures up to 450°C

This article presents reliability studies of single polysilicon electrically erasable programmable read-only memory (EEPROM) cells at temperatures from 50°C to 450°C. The technically challenging measurements at elevated temperatures >250°C have been carried out for accelerated reliability studies. Furthermore, a SPICE macro model has been extended to the wide temperature range to describe the retention and endurance performance of the memory cell and to enable a better insight into the physics involved.

Air-Deployed Microbuoy Measurement of Temperatures in the Marginal Ice Zone Upper Ocean during the MIZOPEX Campaign

AbstractAir-deployed microbuoys (ADMBs) were developed as a means of measuring subsurface temperatures in the marginal ice zone (MIZ) over campaign-duration time scales to better understand how MIZ surface layer heat content accelerates melt rates at the edge of the ice pack. ADMBs are small, low-cost buoys deployable from unmanned aircraft and are capable of measuring temperatures to 0.1°C absolute accuracy at the surface, 1-m, and 2-m depth, along with GPS position. Each ADMB contains a microcontroller, GPS, 900-MHz radio, flash electrically erasable programmable read-only memory (EEPROM), battery, and a set of temperature sensors to monitor conditions for up to 10 days. A communications board on an overflying aircraft autonomously deploys each ADMB and collects data from previously deployed ADMBs for analysis. The 2013 Marginal Ice Zone Observations and Processes Experiment (MIZOPEX) campaign deployed ADMBs into the summer melt season MIZ north of Oliktok Point, Alaska, collecting over 400 h of data from two clusters of buoys during the short field campaign. Initial results indicate that SST is a good measure of upper-ocean temperature in the MIZ when conditions are well mixed, but that is often not the case. In areas with higher ice concentration, surface temperatures tend to underestimate the temperature of the subsurface, while in areas of low ice concentration, SSTs overestimate the subsurface temperature.

A Highly Scalable Single Poly-Silicon Embedded Electrically Erasable Programmable Read Only Memory With Tungsten Control Gate by Full CMOS Process

A highly scalable single poly-silicon multiple time programmable erasable programmable read only memory (EEPROM) with tungsten metallic control gate (W-CG) manufactured by full 0.13 μm-CMOS process is successfully demonstrated in this letter. Since the coupling ratio of conventional EEPROM cell is reduced with decreasing cell size, a smaller size in W-CG cell with a reduced spacing of CG to floating gate (FG) can obtain a higher coupling ratio and increase programming/erasing window owing to its novel lateral metal-insulator-poly coupling structure.

A Highly Stable and Reliable 13.56-MHz RFID Tag IC for Contactless Payment

Radio frequency identification (RFID) has been widely used for contactless payment. However, modifying sensitive data such as balance stored in an RFID tag over an air interface requires high stability and reliability, particularly when the tag is being moved away from the RFID reader (such phenomenon is called card tear). Previous countermeasures of card tear operation are mainly based on contact smart card; however, when the tag is contactless, the variation of magnetic field should be also taken into account. To solve card tear problem, this paper presents a fully integrated 13.56-MHz RFID tag IC with reliable power supply and antitearing mechanism. Proposed are the following solutions: 1) to provide a 4-kV multifunction electrostatic discharge protection circuit with rectifier and limiter; 2) to develop a low dropout circuit and a low voltage detection circuit; 3) to design a well-run antitearing mechanism, which can protect the tag from being incorrectly written; and 4) to design a digital circuit with several functions, including 3DES, micro control unit, and electrically erasable programmable read-only memory. The proposed RFID tag IC was fabricated using a 0.18-μm process with an area of 3 mm 2 . The measured results indicate that the tag operates in a stable and reliable mode without any problem caused by card tear.

Optimizing the MC6805 microcomputer for automotive systems

The MC6805 family of microcomputers includes several general purpose types. Two new devices have just been introduced that are optimized for automotive electronic microcomputer system designs requiring non–volatile memory or dual timing operations. The MC6805S2 device features a flexible dual timer architecture which is useful for ignition timing control. The MC6805K2 includes on chip EEPROM capability for storing data reference points, such as the mileage or engine run hours, when the system power is disconnected. A Serial Peripheral Interface (SPI) port is also included on both devices. This SPI feature allows fast data transfer from the processor to peripherals including display drivers or another processor. The use of these two new MCU devices, MC6805S2, MC6805K2 are also shown.

A survey of address translation technologies for flash memories

Flash is a type of Electronically Erasable Programmable Read-Only Memory (EEPROM). Different from traditional magnetic disks, flash memories have no moving parts and are purely electronic devices, giving them unique advantages, such as lower access latency, lower power consumption, higher density, shock resistance, and lack of noise. However, existing applications cannot run directly on flash memories due to their special characteristics. Flash Translation Layer (FTL) is a software layer built on raw flash memories that emulates a normal block device like magnetic disks. Primary functionalities of the FTL include address translation, garbage collection, and wear leveling. This survey focuses on address translation technologies and provides a broad overview of existing schemes described in patents, journals, and conference proceedings.

High-Yield Fabrication Process for 3D-Stacked Ultrathin Chip Packages Using Photo-Definable Polyimide and Symmetry in Packages

Getting output of multiple chips within the volume of a single chip is the driving force behind development of this novel 3D integration technology, which has a broad range of industrial and medical electronic applications. This goal is achieved in a two-step approach. Initially, thinned dies are embedded in a polyimide interposer with a fine-pitch metal fanout, resulting in ultrathin chip packages (UTCPs). Next these UTCPs are stacked by lamination. Step height at the chip edge of these UTCPs is the major reason of die cracking during the lamination. This paper contains an approach to solve this issue by the introduction of an additional layer of interposer, which makes it flat at the chip edge and thus the whole package is named as flat-UTCP. In addition to that, randomness in nonfunctional package positions per panel reduces the overall yield of the whole process up to a certain extent. A detailed analysis on these two issues to improve the process yield is presented in this paper. 3D-stacked memory module composed of four electrically erasable programmable read-only memory dies was processed and tested to demonstrate this new concept for enhancing the fabrication yield.

Half-MOS Based Single-Poly EEPROM Cell With Program and Erase Bit Granularity

A single-poly electrically erasable programmable ROM (EEPROM) cell compatible with standard CMOS process is proposed. With respect to the classical embedded NOR cell, it can be programmed and erased by Fowler-Nordheim tunneling with single-bit granularity. The memory cell is based on a novel writing-inhibition scheme enabled by the combination of the body effect with multiple half-MOS devices. Experimental results on programming, erasing, inhibition, reading, and cycling endurance are provided using a 0.13 μm standard CMOS process.

A low‐cost UHF RFID tag chip with AES cryptography engine

ABSTRACTIn this paper, the design of a low‐cost ultra‐high‐frequency (UHF) Radio Frequency IDentification (RFID) tag chip with an advanced encryption standard (AES) cryptographic engine is presented. The design of digital baseband is verified on a Field‐Programmable Gate Array (FPGA) platform. The whole chip, including a radio frequency frontend, an analog frontend, an Electrically Erasable Programmable Read‐Only Memory (EEPROM), and a baseband with AES engine, is taped out on Semiconductor Manufacturing International Corporation (SMIC) 0.13μm process. The chip area is 1 × 1 mm2, in which 0.6 × 0.3 mm2 is covered by the digital baseband. The power consumption of the entire tag chip is 20.9 μW. The design can work on both two modes of the standard ISO 18000‐6C mode and the security enhanced ISO 18000‐6C mode. To the best of our knowledge, it is the first UHF passive RFID tag chip with AES algorithm in the baseband.

Temperature Monitoring and Logging System Suitable for Use in Hospitals, Incorporating GSM Text Messaging

In this paper, a microcontroller-based temperature monitoring and logging system suitable for use in hospitals was designed and constructed. The features include ability to monitor a patient’s temperature on a continuous basis while displaying the instant result on a Liquid Crystal Display (LCD) device. The temperature monitored is logged in a memory device, Electrically Erasable Programmable Read Only Memory (EEPROM), located in the system at every 10 minutes interval and can be interfaced with a computer using USB or RS232 UART device. An ATmega16 AVR is used as the heart of the control and coordination of all the activities of the individual modules. It allowed a doctor at location from the patient to keep track of his patient’s condition while attending to other issues .

Great Encounters Leading Me to the Inventions of Flash Memories and Surrounding Gate Transistor Technology

This paper presents the history of the erasable programmable read-only memory, flash memories, and DRAM as encountered by the author.

Comparative analysis of influence of gamma radiation on programmable memory characteristics

The aim of this paper is to examine the reliability of erasable programmable read only memory (EPROM) and electrically erasable programmable read only memory (EEPROM) components subjected to the influence of gamma radiation. This problem is of considerable significance for both military industry and space technology. We present total dose results for the NM27C512 8F85 EPROM and M24128 – B W BN 5 T P EEPROM components. There is evidence that EPROM components radioactive reliability is better than that of EEPROM components. Furthermore, the changes EPROM's undergoes are reversible, so that after erasing process and reprogramming all EPROM components are fully functional. On the other hand, EEPROM's changes are irreversible and when subjected to the influence of gamma radiation, all EEPROM components become permanently nonfunctional. The obtained results are analyzed and explained via the interaction of gamma radiation with oxide layers.

High voltage generator circuit with low power and high efficiency applied in EEPROM

This paper presents a low power and high efficiency high voltage generator circuit embedded in electrically erasable programmable read-only memory (EEPROM). The low power is minimized by a capacitance divider circuit and a regulator circuit using the controlling clock switch technique. The high efficiency is dependent on the zero threshold voltage (Vth) MOSFET and the charge transfer switch (CTS) charge pump. The proposed high voltage generator circuit has been implemented in a 0.35 μm EEPROM CMOS process. Measured results show that the proposed high voltage generator circuit has a low power consumption of about 150.48 μW and a higher pumping efficiency (83.3%) than previously reported circuits. This high voltage generator circuit can also be widely used in low-power flash devices due to its high efficiency and low power dissipation.

Embedded System for Automatic Condensation Control of the Car

In this study, we designed an embedded system for automatic condensation control(ESCC) of the car. This system heats the car glasses as and when it is needed that makes driving safer and convenient. The system was built on an ATmega128L central processing unit(CPU), using high-performance electrically erasable programmable read-only memory(EEPROM) complex programmable logic device(CPLD) ATF1504AS, using which an ESCC algorithm has been proposed. The source code was written in C language. The algorithm of work was written using the dew-point table. This system not only clears the condensation on the glass but also averts condensation. The designed ESCC system begins working once the input information comes close to the dew-point table information. This device enables a wider field of view, thereby increasing safety.