Design Techniques for a 30-ns Access Time 1.5-V 200-KB Embedded EEPROM Memory

Abstract

A 200-KB embedded electrically erasable programmable read -only memory (EEPROM), which operates with a single 1.5-V power supply voltage based on an HHGRACE (Shanghai Huahong Grace Semiconductor Manufacturing Corporation) 90-nm EEPROM process, is developed. In this brief, several key design techniques are presented. An improved bit cell with a larger current sensing window is adopted in the split-source EEPROM array. To get high-speed read operation, a high-performance sense amplifier and a dynamic sensing window tracking reference voltage generating circuit have been proposed. The die size of the proposed EEPROM IP is 1.271 mm2, and the EEPROM cell size is 0.32 $\mu\text{m}^{2}$ . Access time of 30 ns is achieved at 1.5 V and 25 °C.