Bipolar Transistor Model Research Articles

Three-dimensional simulation study of bias effect on single event effects of SiGe heterojunction bipolar transistor

In this paper we establish a three-dimensional (3D) numerical simulation model of domestic SiGe heterojunction bipolar transistor (SiGe HBT) by using technology computer aided design tools, to study the bias effect on single event effect (SEE) of SiGe HBT. The response relationship between SEE and the bias of SiGe HBT is identified based on the analyses of transient current peak and charge collection of each terminal. The results show that the worst biases for SEE are different for different terminals. Even for the same terminal, the worst biases for charge collection and transient current peak are different. This phenomenon is caused mainly by the influence of applied electric field and the change of carrier transport mode.

Optimization of Abrupt Profile of Germanium in Si/SiGe Heterojunction Bipolar Transistor Specified for Radio Frequency Range Systems

In this paper, we present modeling of Heterojunction Bipolar Transistors (HBT) based on Si / SiGeC very high performance for telecommunications applications dedicated to radio frequency RF. The major objective of our work will be devoted to the influence of the germanium profile on the static and dynamic characteristics of the latter. The optimization of the profile of germanium in the base is a major element in the study of electrical characteristics of the HBT. This optimisation improves the static gain (β) of the transistor, while increasing the germanium profile in the base of 10% to 30%. However, the transition frequency (fT), and the maximum oscillation frequency (fmax) decrease when the profile of germanium is greater than 20%. A numerical modelling approach is investigated using our 2D simulator SIBIDIF, which is based on the Drift-Diffusion Model (DDM). This method solves the continuity equations for electrons and holes and is coupled with the Poissons equation based on the concept of the finite difference mesh.

Sensitive Ports under the Action of Different ESD Models of High-Frequency Low-Noise Silicon Bipolar Transistors

In order to find the most sensitive port of some high-frequency low-noise silicon bipolar transistors, some electrostatic discharge (ESD) experiments were taken on three typical devices, which is beneficial to study the relevant law of ESDS (ESD sensitivity). Based on the experimental results, reverse-biased emitter-base junction was compared with reverse-biased collector-base junction about failure voltage under the action of HBM ESD, MM ESD and BMM ESD. The results show that the sensitive port is different for those mentioned silicon bipolar transistors under the action of different ESD models. Consequently, the most sensitive port of high-frequency low-noise silicon bipolar transistors may be variable for different ESD models.

Verification of theoretical model for collector current in SiGe‐based heterojunction bipolar transistors

The theoretical collector current model for SiGe-based heterojunction bipolar transistors under parallel–perpendicular kinetic energy coupling and anisotropic masses was validated. Verification was performed by comparison to Monte Carlo (MC) calculations and experimental data obtained from previous publications. Collector current against base-emitter voltage obtained by the present model is comparable to that calculated by the MC method. The measured collector currents as a function of base-collector voltage agreed well with the calculated currents for base-emitter voltages ranging from 0.3 to 0.6 V.

The Failure Modeling Analysis of Bipolar Silicon Transister Device Caused by ESD

With the development of electronic technology, the electronic threats faced by microwave semiconductor devices was increasingly serious.In order to study the electrostatic discharge damage mechanism of bipolar silicon transistors, this paper analyzed the basic physical characteristics of bipolar transistor in electrostatic discharge, such as kirk effect and current crowding effect. Through analysis the human body electrostatic discharge model, established the ESD electric injury model of bipolar silicon transistor. If we knew the production process parameter of devices, we can calculate the ESD damage threshold for designing bipolar silicon device and providing a theoretical basis of parameter optimization. Finally the common ESD damage criterion were analyzed from different angles.

Compact Modeling of Floating-Base Effect in Injection-Enhanced Insulated-Gate Bipolar Transistor Based on Potential Modification by Accumulated Charge

We have developed a compact model of the injection-enhanced insulated-gate bipolar transistor (IGBT) applicable for circuit optimization. The main development is modeling the hole accumulation in the floating-base region. It is demonstrated that the observed negative gate capacitance is well reproduced with the developed model.

An approach for SiGe HBT small-signal modelling up to 40 GHz

In this article, a simple method for the small-signal equivalent-circuit modelling of SiGe heterojunction bipolar transistors (HBTs) fabricated with a 0.13-μm BiCMOS technology is proposed. The presented transistor model is compatible with BiCMOS processes and takes into account the parasitic effects such as substrate effect and the extrinsic capacitances. The parameter-extraction approach is based on the analytically derived equations in conjunction with the optimisation technology. The intrinsic parameters are described as the function of extrinsic resistances. The extrinsic resistances are iteratively extracted by the variance of the intrinsic elements as an optimisation criterion. The proposed modelling approach is validated by SiGe HBTs with 0.2 × 5.9 μm2 emitter occupying area from 50 MHz to 40 GHz. The agreements between the measured and modelled data are excellent in the desired frequency range over a wide range of bias points with different bias conditions.

Analytical Approach to Design of Proportional-to-the-Absolute-Temperature Current Sources and Temperature Sensors Based on Heterojunction Bipolar Transistors

Embedded temperature sensors based on proportional-to-the-absolute-temperature (PTAT) current sources have the potential to lay the foundation for low-cost temperature-aware integrated circuit architectures if they meet the requirements of miniaturization, fabrication process match, and precise estimation in a wide range of temperatures. This paper addresses an analytical approach to the minimum-element PTAT circuit design capitalizing on the physics-based modeling of the heterojunction bipolar transistor (HBT) structures. It is shown that a PTAT circuit can be implemented on only two core HBT elements with good accuracy. Derived parametric relations allow a straightforward specification of the thermal gain at the design stage, which affects sensor sensitivity. Further derived current-to-temperature mapping expresses a temperature estimate based on the measured PTAT output current. Numerical examples indicate attainable estimation accuracy of 0.43% in case of a measurement instance taken in the absence of measurement noise.

Modeling of SiC IGBT Turn-Off Behavior Valid for Over 5-kV Circuit Simulation

This paper presents a compact model of SiC insulated-gate bipolar transistors (IGBTs) for power electronic circuit simulation. Here, we focus on the modeling of important specific features in the turn-off characteristics of the 4H-SiC IGBT, which are investigated with a 2-D device simulator, at supply voltages higher than 5 kV. These features are found to originate from the punch-through effect of the SiC IGBT. Thus, they are modeled based on the carrier distribution change caused by punch through and implemented into the silicon IGBT model named “HiSIM-IGBT” to obtain a practically useful SiC-IGBT model. The developed compact SiC-IGBT model for circuit simulation is verified with the 2-D device simulation data.

HiSIM-IGBT: A Compact Si-IGBT Model for Power Electronic Circuit Design

A physics-based compact model of insulated-gate bipolar transistors (IGBTs) for power electronic circuit simulation is presented. The compact model is constructed as a combination of a metal-oxide-semiconductor field-effect transistor (MOSFET) part and a bipolar junction transistor (BJT) part with a conductivity-modulated base resistance in between them and is named “HiSIM-IGBT.” The model considers the potential distribution from the MOSFET channel to the two BJT junctions explicitly by solving important internal node potentials self-consistently. The IGBT output current at the collector terminal is governed by the base resistance of the bipolar part and the MOSFET characteristics, which is confirmed to be described accurately. The model is verified to accurately reproduce measured transient behaviors of switching test circuits which are basic components of practically used power electronic circuits.

A Sequential Model Parameter Extraction Technique for Physics-Based IGBT Compact Models

A sequential parameter extraction technique describing the fitting targets and related parameters for compact insulated-gate bipolar transistor (IGBT) models is presented. Using 2-D device simulation data for a trench-type IGBT as reference, the performance of HiSIM-IGBT as an example of a compact IGBT model is compared to an IGBT macromodel. Parameter extraction with the compact model is fast and straightforward, owing to its physics-based modeling. Even with minimal extraction effort, the compact model fits the dc current and capacitance and reproduces the transient turnoff characteristics accurately.

고전압 IGBT SPICE 시뮬레이션을 위한 모델 연구

본 논문에서는 SPICE 시뮬레이션을 위한 고전압 insulated gate bipolar transistor(IGBT)의 개선된 모델을 제안하였다. IGBT를 부속 소자인 MOSFET과 BJT의 조합으로 구성하고, 각 소자의 각종 파라미터 값을 조절하여 기본적인 전류-전압 특성과 온도변화에 따른 출력특성의 변화 등을 재현하였다. 그리고 비선형적인 리버스 트랜스퍼 커패시턴스 등의 기생 커패시턴스의 전압에 따른 변화를 높은 정확도로 재현하기 위해, 복수의 접합 다이오드, 이상적인 전압 및 전류 증폭기, 전압제어 저항, 저항과 커패시터 수동소자 등을 추가하였다. 본 회로모델을 1200V급의 트렌치 게이트 IGBT의 모델링에 이용하였으며, 실측자료와 비교하여 통해 모델의 정확도를 검증하였다. In this paper, we proposed a SPICE model of high-voltage insulated gate bipolar transistor(IGBT). The proposed model consists of two sub-devices, a MOSFET and a BJT. Basic I-V characteristics and their temperature dependency were realized by adjusting various parameters of the MOSFET and the BJT. To model nonlinear parasitic capacitances such as a reverse-transfer capacitance, multiple junction diodes, ideal voltage and current amplifiers, a voltage-controlled resistor, and passive devices were added in the model. The accuracy of the proposed model was verified by comparing the simulation results with the experimental results of a 1200V trench gate IGBT.

An enhanced model for InGaP/GaAs heterojunction bipolar transistor

This paper presents an improved InGaP/GaAs heterojunction bipolar transistor (HBT) model based on the Vertical Bipolar Inter-Company (VBIC) model. New transport current expression is proposed by considering the heterojunction effect. Collector capacitance is developed due to the mobile charge modulation, and the transit time formula is improved to account for electron velocity variation with the collector field under high current. The extraction flow is demonstrated. The new model has been verified by measurements on I–V, S-parameter, cut-off frequency and large-signal conditions.

Modeling, Simulation, and Validation of a Power SiC BJT

This paper presents a physics-based model of a silicon carbide bipolar junction transistor and verification of its validity through experimental testing. The Fourier series solution is used to solve the ambipolar diffusion equation in the transistor collector region. The model is realized using MATLAB and Simulink. The experimental results of static operation and also the simulated and experimental results of switching waveforms are given.

Modeling Non-Quasi-Static Effects in SiGe HBTs Using Improved Charge Partitioning Scheme

The applicability of a partitioned-charge-based non-quasi-static (NQS) model is investigated using exact solutions for 1-D bipolar transistors. Limitations of the model to accurately predict $y_{21}(\omega)$ are overcome by further delaying the partitioned minority charge associated with the collector. A corresponding small-signal time-domain model is derived. The proposed model effectively includes the delays within both the quasi-neutral base and base–collector space-charge regions. Using only two extra nodes over the quasi-static bipolar transistor model HICUM, the NQS model is implemented using Verilog-A. The simplicity of the model yields straightforward parameter extraction techniques. Modeling results show excellent agreement with numerically simulated data.

Comparison of insulated gate bipolar transistor models for FPGA-based real-time simulation of electric drives and application guideline

In this study, a comparison of various insulated gate bipolar transistor (IGBT) models for field-programmable gate array (FPGA)-based real-time simulation of power electronic devices is presented. System-level behavioural models include ideal, switching function and averaged models, and the detailed device-level model includes both linear behavioural and non-linear look-up table-based models of IGBT. A three-level 12-pulse voltage source converter system driving a squirrel-cage induction motor has been chosen as the test case system. The entire system including the controller and pulse width modulation (PWM) is implemented on a single FPGA using very high-speed description language in real-time at a fixed time-step of 12.5 ns. The Altera Startix III FPGA is the device used for real-time simulation. Results obtained through all five models are compared and as expected, it has been found that the behaviour-mode simulation is fast but comes with a sacrifice of accuracy and details. A guideline is provided for the users with suggestions, so that the right kind of model can be selected for a particular study.

Modeling of high voltage devices for ESD event simulation in SPICE

An ESD (electro-static-discharge) compact modeling methodology using a macro-modeling approach is introduced in this work for high voltage Lateral Double-diffused MOS (LDMOS) devices and new high-voltage protection clamps. The distinct characteristics of high voltage devices during high current/fast transient events are modeled without introducing convergence problems in ESD simulations for complex high voltage mixed-signal applications. The LDMOS ESD model consists of a sub-circuit that is built on top of the standard high-voltage MOS model (MOS20). The high voltage clamps, consisting of thyristor-type devices, are modeled using advanced bipolar junction transistor models.

Scalable large-signal model for SiGe HBTs

In this article, a scalable large-signal model for SiGe heterojunction bipolar transistors (HBTs) is presented. Compared with SPICE Gummel-Poon model, the proposed model has taken into account the self-heating effects, which is important for large-signal operations. The model includes a new base-collector breakdown description, which has taken the current dependence into account. This model allows exact modeling of all transistor parameters from single emitter size cells to other size devices. The scaling rules are shown in detail. The model is verified by the SiGe HBTs with emitter area of 0.3 × 20.3, 0.3 × 13.9, 0.3 × 9.9, and 0.3 × 1.9 um2. Excellent agreement has been achieved between modeled and measured data over a wide range of bias conditions and signal frequencies. The model has been implemented in Verilog-A using the ADS circuit simulator. © 2011 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2012. © 2012 Wiley Periodicals, Inc.

Generalized Early Voltage Model of Bipolar Transistors for Linearly Graded Germanium in Base

The standard Early voltage of the SPICE Gummel-Poon model (SGP) is generalized for SiGe npn heterojunction bipolar transistors (HBTs). An accurate model for Early effects compatible with the SGP model is obtained considering graded germanium induced bandgap narrowing effect in the base in modern SiGe HBTs and simplified to a compact model which is consistent with ISE TCAD simulation results. The presentation of the Early effect model is significant for the design and simulation of the high performance SiGe BiCMOS technology.

Comparison of insulated gate bipolar transistor models for FPGA-based real-time simulation of electric drives and application guideline

Comparison of insulated gate bipolar transistor models for FPGA-based real-time simulation of electric drives and application guideline