Vfb Shift Research Articles

An Interactive Simulation Tool for Complex Multilayer Dielectric Devices

Novel devices incorporating multiple layers of new materials increase the complexity of device structures, particularly in field-effect transistors, capacitors, and nonvolatile memory (NVM). The mounting complexity of these devices increases the difficulty of generating energy band diagrams and performing device parameter calculations whether these calculations are done by hand, using spreadsheets, or via mathematical programs. Although finite-element Poisson-Schrodinger equation solvers are available to perform the calculations, the cost and time spent learning them can be a hindrance. A straightforward GUI interactive simulation tool is presented that quickly calculates and displays energy bands, electric fields, potentials, and charge distributions for 1-D metal-multilayered-dielectrics-semiconductor stacks. Fixed charge can be inserted into dielectric layers. The freeware program calculates device parameters, (e.g., effective oxide thickness, flat-band voltage (VFB), threshold voltage (Vt), stack capacitance) and layer parameters (e.g., capacitance, potential, electric field, tunneling distance). Calculated data can be exported. Using the simulation tool, trap-based flash NVM is examined. Device performance characteristics such as the Vt and VFB shifts of three different stacks are examined. Comparisons between the program and a finite-element Poisson-Schrodinger equation solver are performed to validate the program's accuracy.

Role of Oxygen Transfer for High-k/SiO2/Si Stack Structure on Flatband Voltage Shift

We investigate the difference of flatband voltage (Vfb) behavior in high-k/SiO2/Si stack structure due to oxygen vacancy (Vo) and additional oxygen generated by the reduction and oxidation annelaing process, respectively. The Vfb of Mg and La-incorporated Hf-based high-k dielectrics is also influenced by Vo generation in high-k layer. We found that the non-linear relationships of Vfb behavior appears in HfSiOx, Mg2+- and La3+-HfSiOx dielectrics as a function of the oxidation annealing temperature, while the HfO2, N3+-HfSiOx, Mg2+- HfO2, and La3+-HfO2 dielectrics show the linear relationships of Vfb shift by introducing additional oxygen. Furthermore, it is clear that the Vfb shift of all high-k materials satisfies the diffusion equation; which indicates that the oxygen transfer in high-k layer is a dominant factor in determining Vfb. We found that the oxygen diffusion in high-k materials can be ordered as follow: Mg2+- and La3+-HfO2 > HfO2 >> N3+-HfSiOx and La3+-HfSiOx > HfSiOx and Mg2+-HfSiOx.

Process Engineering and Trap Distribution for Dielectric/Si Interfacial Layer in High-k Gated MOS Devices

The effects of interfacial layer at high-k dielectric/Si substrate formed by using stress-relieved pre-oxide (SRPO) treatment on electrical characteristics of MOS devices were studied in this work. The equivalent oxide thickness value could be scaled with reducing the thickness of the high quality IL. The reliability in terms of stress-induced leakage and stress-induced Vfb shift is clearly improved for MOS device with a SRPO treatment. Besides, the constant-voltage stress-induced interface trap generation in MOSFET was measured by charge-pumping techniques. The influences of stress and recovery on devices with HfO2 high-k dielectric are also compared. Results show that the stress induced Vth shifts can be separated into two stages, namely, trap filling and generation. The trap generation stage is only determined by the stress voltage and temperature.

Effects of Structural Transformation of Metal-GeO2 Interface on Electrical Properties

The relations between physical structural transformations and improvement of electrical properties of metal/GeO2/Ge systems using low temperature oxidation and the post metal deposition annealing (PDA) have been investigated. In metal/GeO2/Ge systems, we found that the electrical properties were drastically improved by the oxidation and the PDA. The oxidation at low temperature achieves no C-V hysteresis because of suppression of GeO desorption. on the other hand, according to results of X-ray photoelectron spectroscopy (XPS) and thermal desorption spectroscopy (TDS), the improvement mechanism of electrical properties of metal/GeO2/Ge structures after the PDA was clearly shown as follows. Once the metals were deposited on the GeO2, GeOx layer was formed at the surface region of the GeO2 due to reduction of the oxide by the metals. The sub-oxide layer at the interface causes a large negative flat-band voltage (VFB) shift on the capacitance-voltage (C-V) characteristics of the metal/GeO2/Ge structures. Then, during the PDA process at low temperature, the sub-oxide layer is disappeared with desorbing as germanium monoxide (GeO) gas, and the VFB shifts of the metal/GeO2/Ge systems were drastically improved and also their accumulation capacitances were increased because of disappearance of the sub-oxide layer.

Understanding reversal effects of metallic aluminum introduced in HfSiON/TiN PMOSFETs

We evaluate the insertion of metallic aluminum in TiN metal gate over HfSiON/SiON for a gate first CMOS integration with an equivalent oxide thickness of 15 Å. From capacitance versus voltage measurements, we report for the first time a non-linear Vfb shift associated to aluminum thickness variation (a). To understand this observation the metal gates have been reproduced on various dielectric stacks having either (b) beveled SiON or (c) 150 Å HfSiO. From beveled samples we extract the effective work function, which presents the same variations with aluminum thickness as in nominal devices (a). Aluminum diffusion at the bottom high-k interface is prevented in samples (c) thanks to thick HfSiO and leads to a negative Vfb shift. We conclude that the observed reversal shifts with metallic aluminum thickness in TiN are due to a +50 mV aluminum induced dipole at the HfSiON/SiON interface associated to an opposite metal work function decrease.

Reduction of Charge Trapping Sites in Al<sub>2</sub>O<sub>3</sub>/SiO<sub>2</sub> Stacked Gate Dielectrics by Incorporating Nitrogen for Highly Reliable 4H-SiC MIS Devices

Superior flatband voltage (Vfb) stability of SiC-based metal-insulator-semiconductor (MIS) devices with aluminum oxynitride (AlON) gate dielectrics was demonstrated. MIS capacitors with gate insulators consisting of a thick pure aluminum oxide (Al2O3) and a thin underlying SiO2 layer fabricated on n-type 4H-SiC substrates showed a positive Vfb shift due to substrate electron injection depending on the applied gate bias and the thickness of the SiO2 interlayer. This large Vfb shift was greatly suppressed for devices with AlON/SiO2 stacked gate dielectrics, suggesting that electron trapping sites in Al2O3 film were mostly compensated for by nitrogen incorporation. This finding is helpful in realizing highly reliable SiC-based MIS field-effect-transistors (MISFETs) in terms of threshold voltage stability.

Impact of diffusionless anneal using dynamic surface anneal on the electrical properties of a high-k/metal gate stack in metal-oxide-semiconductor devices

The impact of diffusionless anneal using dynamic surface anneal (DSA) on the electrical properties of p-type metal-oxide-semiconductor devices with high-k gate dielectrics and metal gate was investigated by monitoring flatband voltage (VFB) and equivalent oxide thickness (EOT) change. Compared to rapid thermal anneal, DSA induces a positive VFB shift without EOT degradation. This finding is attributed to suppression of positively charged oxygen vacancies [Vo++] generation in high-k dielectrics due to the shorter thermal budget. Processing parameters including high-k dielectrics, TiN metal gate thickness, and Si cap deposition temperature significantly affect thermally induced-oxygen vacancies, leading to different VFB behaviors.

Deposition Temperature and Thermal Annealing Effects on the Electrical Characteristics of Atomic Layer Deposited Al2O3 Films on Silicon

Atomic layer deposition (ALD) of Al2O3 is of interest for a wide range of micro-nanoelectronic applications, where the electrical properties of the deposited layers can be strongly affected by deposition conditions and post-deposition treatments. In this work, a mercury-probe capacitance-voltage characterization is carried out on Al2O3 films deposited on silicon by ALD at different temperatures and subjected to various thermal treatments in N2 ambient. Effective positive charges located at the semiconductor/dielectric interface are encountered for the films deposited at the lowest temperature (100°C). Positive Vfb shifts are always registered after the different thermal annealing conditions studied; however, the impact of the thermal treatments is found to be different depending on the deposition temperature. A significant negative charges build-up is observed after a 30 min anneal at 450°C, where improved surface passivation properties are achieved. Interestingly, the hysteresis, as well as the Vfb shifts, clearly diminish for higher deposition temperatures or after a thermal anneal. However, the highest temperature treatments (≥800°C) result in significant interface states generation. Finally, exploratory experiments about the stability of the Al2O3 layers under UV-light irradiation (in the 200–300 nm wavelengths range) show that this can be responsible for a significant degradation of their electrical characteristics.

Zero Dipole Formation at HfGdO/SiO2 Interface by Hf/Gd Dual-Sputtered Method

A method to acquire a zero dipole high-k/SiO2 interface has been proposed. We introduced Gd elements into HfO2 to compensate the VFB shift cause by interface dipoles with multiple Gd fractions and further inferred a composition of HfGdO gate dielectric layer with no interface dipoles. The physical and electrical results reveal that the band gap, conduction offset, and oxide charges are improved with increased Gd elements. With the extraction of electron effective mass and Schottky barrier of each HfGdO layer, the band structures were established, and the amount of Fermi level pinning and interface dipoles could be successfully quantified and separated by analyzing the dissimilitude of work functions obtained by different extractions. A Hf/Gd dual-sputtered power ratio of 150/43 was interpolated to realize a zero dipole interface.

Role of Oxygen Transfer for High-k/SiO2/Si Stack Structure on Vfb Shift

not Available.

Mechanism of VFB/VTH shift in Dysprosium incorporated HfO2 gate dielectric n-Type Metal-Oxide-Semiconductor devices

The authors discuss temperature-dependent dysprosium (Dy) diffusion and the diffusion-driven Dy-silicate formation process in Dy incorporated HfO2. The Dy-induced dipoles are closely related to the Dy-silicate formation at the high-k/SiO2 interfaces since the VFB shift in Dy2O3 is caused by the dipole and coincides with the Dy-silicate formation. Dipole formation is a thermally activated process, and more dipoles are formed at a higher temperature with a given Dy content. The Dy-silicate related bonding structure at the interface is associated with the strength of the Dy dipole moment and becomes dominant in controlling the VFB/VTH shift during the high temperature annealing in the Dy–Hf–O/SiO2 gate oxide system. Dy-induced dipole reduces the degradation of the electron mobility.

Effects of La2O3 Capping Layers Prepared by Different ALD Lanthanum Precursors on Flatband Voltage Tuning and EOT Scaling in TiN/HfO2/SiO2/Si MOS Structures

The use of thin capping layers that are inserted between the gate metal and dielectric layers have been shown to simultaneously cause a negative flatband voltage (Vfb) shift and to stabilize low threshold voltage (VTH). A major challenge with capping layers is to achieve adequate effective work function shifts without large increases in equivalent oxide thickness (EOT) (ΔEOT). In this work, the effects of La2O3 cap layers prepared by different ALD Lanthanum precursors, La(fAMD)3 and La(thd)3, on flatband voltage tuning and EOT scaling in TiN/HfO2/SiO2/Si metal oxide semiconductor (MOS) structures was investigated. Experimental results showed that ΔVfb and ΔEOT as high as 0.45 V and 0.055 nm, caused by dipoles at the lower interface between HfO2 and SiO2 interlayer and the diffusion of La and Hf atoms to the SiO2 interlayer, were achieved by a 1 nm thick La2O3 capping layer using a La(fAMD)3 precursor, while a relatively smaller Vfb and EOT of −0.7 V and 1.27 nm were obtained from the noncap TiN/HfO2/SiO2/Si MOSCAP sample. The use of a La(fAMD)3 precursor for the La2O3 capping layer deposition has been shown being much superior to La(thd)3 due to lower atomic layer deposition (ALD) process temperature and shorter O3 oxidant pulse duration.

Investigation of oxygen-related defects and the electrical properties of atomic layer deposited HfO2 films using electron energy-loss spectroscopy

The electrical properties of hafnium dioxide (HfO2) thin films are often attributed to the oxygen composition and oxygen-related defects; however, there have been few systematic studies on the electronic structures of such oxygen atoms. In this study, we used electron energy-loss spectroscopy to identify the influence of the electronic states of the oxygen atoms in HfO2 thin films by comparing HfO2 samples for different oxygen source pulse time during atomic-layer deposition (ALD). Although all samples by ALD have higher oxygen content in the film than that in the reference stoichiometric HfO2 sample, variations in the local symmetry of amorphous HfO2 thin films were significantly affected by oxygen source pulse time. Moreover, leakage currents of high-oxygen content HfO2 samples with longer O3 pulse time decreased considerably, compared with those of low-oxygen content HfO2 samples with shorter O3 pulse time, in which oxygen-related defects were observed by the Vfb shift under constant voltage stress. After postdeposition annealing (PDA), the electronic structure of oxygen atoms in HfO2 films was affected by the initial oxidation states in the amorphous HfO2 films. Furthermore, after PDA, polycrystalline HfO2 in high-oxygen content samples was mostly of the monoclinic phase, whereas the metastable tetragonal phase was readily formed in low-oxygen content HfO2.

Effective Work Function Modulation by Aluminum Ion Implantation on Hf-Based High- $k$/Metal Gate pMOSFET

The impact of aluminum (Al) implantation into TiN/HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> / SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> on the effective work function is investigated. Al implanted through poly-Si cannot attain sufficient flatband voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">FB</sub> ) shift unless at higher implantation energy. Al implanted through TiN at 1.2 keV with a dose of 5 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">15</sup> cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-2</sup> raised the V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">FB</sub> to about 250 mV compared with a nonimplanted gate stack. Moreover, the V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">FB</sub> shift can be up to about 800 mV at 2 keV with the same dose level accompanied with slightly equivalent oxide thickness penalty and gate leakage current degradation. Optimized process window to control Al diffusion depth was essential to minimize these impacts.

Role of Hetero Interface of Ionic/Covalent Oxides for Pt/High-k/SiO2/Si MOS Capacitors on Vfb Shift

We have investigated the role of hetero interface of ionic high-k / covalent SiO2 for Pt gate MOS capacitors with strong and weak ionic high-k dielectrics on Vfb shift. The HfO2-based high-k and HfSiON materials of the strong ionic oxide caused the positive Vfb shifts due to dipole, while the Vfb of the HfSiOx-based high-k materials of the weak ionic oxide was almost constant. These suggest that the ionicity of high-k materials is an important because the oxygen diffusion which is related to the dipole formation strongly depends on the ionicity.

The VFB Modulation Effect of ALD Grown Al2O3, SrO, La2O3 Capping Layers with HfO2 Gate Dielectrics

The effect of atomic layer deposited Al2O3, SrO, and La2O3 capping layers with HfO2 gate dielectrics were examined ffor flat band voltage (VFB) modulation. Al2O3 capping layers cause a VFB shift into the positive voltage direction, while SrO and La2O3 capping layers cause a shift into the negative voltage direction. The bottom capping layer, which positions between the Si substrate and the HfO2 dielectric was more effective in modulating the VFB compared to the top capping layer. The insulating properties of the gate dielectric stacks with different capping layers were also examined. X-ray photoelectron spectroscopy analysis verified that top capping layers did not generally diffuse to the interface between the Si substrate and the HfO2 dielectrics, which supports the result that bottom capping layers are more effective in modulating the VFB.

Achievement of Excellent C-V Characteristics in GeO2/Ge System Using Post Metal Deposition Annealing

Impacts of structural transformations of top and bottom interface of metal/GeO2/Ge structure on electrical properties were investigated. The GeO2/Ge interface that was formed by low temperature oxidation achieved negligible hysteresis because of suppressing GeO volatilization. On the other hand, the metal/GeO2 interface with post metal deposition annealing attained disappearance of VFB shift. XPS and TDS measurements show that GeOx at the interface of the as-deposited metal/GeO2 vanished after annealing. It suggests that the improvement of the VFB shift was achieved by volatilization of GeOx including defects at the metal/GeO2 interface.

Scaling equivalent oxide thickness with flat band voltage (VFB) modulation using in situ Ti and Hf interposed in a metal/high-k gate stack

This study aimed to control the work-functions and scaling equivalent oxide thicknesses (EOTs) of metal-oxide-semiconductor (MOS) devices using an “in situ” thin metal layer interposed between the gate dielectric and the metal gate. The effects of “in situ thin metal layers” were imposed to suppress low-k interfacial oxide formation, leading to a thin EOT (down to 0.5 nm) scaling due to the scavenging of excess oxygen sources through gate stacks and to allow for the tuning of nMOS and pMOS-compatible work-functions using Hf and Ti layers, respectively. Different high-k gate dielectrics (HfO2, HfOxNy), two types of transition metals (Ti, Hf), and various annealing temperature conditions were studied. The EOT became thinner as the thicknesses of the Hf and Ti thin layers increased. However, the thickening Hf cap provided a negative flat band voltage (VFB) shift, while the increasing Ti exhibited a positive VFB shift.

Comprehensive understanding of the effect of electric dipole at high-k/SiO2 interface on the flatband voltage shift in metal-oxide-semiconductor device

Electrical characteristics of HfO2/SiO2 interface are comprehensively studied to clarify the intrinsic origin of flatband voltage (VFB) shift in metal-oxide-semiconductor (MOS) device with high-k/metal gate structure. A methodology for quantitative extraction of the interface dipole and chargers at high-k/SiO2 interface is proposed. The dipole and charges at HfO2/SiO2 interface are extracted to be about −0.38 V and −1.15×1013 cm−2, respectively. This result shows that the high density of negative charges at HfO2/SiO2 interface rather than the interface dipole are the dominant cause of the positive VFB shift in the MOS device with HfO2/SiO2 stack.

Role of Hetero Interface of Ionic/Covalent Oxides for Pt/High-k/SiO2/Si MOS Capacitors on Vfb Shift

not Available.