Abstract
This study aimed to control the work-functions and scaling equivalent oxide thicknesses (EOTs) of metal-oxide-semiconductor (MOS) devices using an “in situ” thin metal layer interposed between the gate dielectric and the metal gate. The effects of “in situ thin metal layers” were imposed to suppress low-k interfacial oxide formation, leading to a thin EOT (down to 0.5 nm) scaling due to the scavenging of excess oxygen sources through gate stacks and to allow for the tuning of nMOS and pMOS-compatible work-functions using Hf and Ti layers, respectively. Different high-k gate dielectrics (HfO2, HfOxNy), two types of transition metals (Ti, Hf), and various annealing temperature conditions were studied. The EOT became thinner as the thicknesses of the Hf and Ti thin layers increased. However, the thickening Hf cap provided a negative flat band voltage (VFB) shift, while the increasing Ti exhibited a positive VFB shift.
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