Trench Isolation Oxide Research Articles

TID Radiation Response of 3-D Vertical GAA SONOS Memory Cells

The total ionizing dose response against the γ ray of 3-D silicon-oxide-nitride-oxide-nitride (SONOS) cells with a vertical polysilicon channel was investigated. No leakage current increase or subthreshold slope degradation is observed up to the total ionizing dose of 1 Mrad(Si) even for devices scaled down to 22 nm, as the gate-all-around structure provides better control over the potential in the body, and shallow trench isolation oxide is not required. The threshold voltage (VT) shifts trend during radiation is similar to the behavior of 2-D cells, and can be well predicted with McWhorter's model. Benefiting from a larger initial memory window before irradiation, 3-D SONOS cells have a significant memory window of 4.5 V after exposure to a high radiation dose of 1 Mrad(Si). These results clearly indicate that 3-D SONOS devices are promising as radiation-tolerant memories.

Investigating the degradation mechanisms caused by the TID effects in 130 nm PDSOI I/O NMOS

This paper evaluates the radiation responses of 3.3V I/O NMOSFETs from 130nm partially-depleted silicon-on-insulator (PDSOI) technology. The data obtained from 60Co ionizing radiation experiments indicate that charge trapped in the shallow trench isolation, particularly at the bottom region of the trench oxide, should be the dominant contributor to the off-state drain-to-source leakage current under ON bias. The body doping profile and device dimension are two key factors affecting the performance degradation of the PDSOI transistors after radiation. Significant front gate threshold voltage shift is observed in the T-shape gate device, which is well known as the Radiation Induced Narrow Channel Effect (RINCE). The charge trapped in the buried oxide can induce large threshold voltage shift in the front gate transistor through coupling effect in the low body doping device. The coupling effect is evaluated through three-dimensional simulation. A degradation of the carrier mobility which relates to shallow trench isolation (STI) oxide trapped charge in the narrow channel device is also discussed.

Investigation of unique total ionizing dose effects in 0.2 µm partially-depleted silicon-on-insulator technology

The total ionizing dose (TID) radiation effects of partially-depleted (PD) silicon-on-insulator (SOI) devices fabricated in a commercial 0.2µm SOI process were investigated. The experimental results show an original phenomenon: the “ON” irradiation bias configuration is the worst-case bias for both front-gate and back-gate transistors. To understand the mechanism, a charge distribution model is proposed. We consider that the performance degradation of the devices is due to the radiation-induced positive charge trapped in the bottom corner of Shallow Trench Isolation (STI) oxide. In addition, by comparing the irradiation responses of short and long channel devices under different drain biases, the short channel transistors show a larger degeneration of leakage current and threshold voltage. The dipole theory is introduced to explain the TID enhanced short channel effect.

Bias Dependence of Total-Dose Effects in Bulk FinFETs

The total ionizing dose response of triple-well FinFETs is investigated for various bias conditions. Experimental results show that irradiation with the transistor in the OFF state with the drain terminal high is the worst-case bias configuration. TCAD simulations are used to analyze the buildup of trapped charge in the trench isolation oxide and its impact on the increase in leakage current and subthreshold-slope degradation. The electric field distribution along the STI/fin boundary exerts a strong influence on the trapped charge in the isolation oxide, which induces a parasitic leakage current path at total ionizing doses of less than 200 krad(SiO2).

A New Method for Extracting the Radiation Induced Trapped Charge Density Along the STI Sidewall in the PDSOI NMOSFETs

The effects of the radiation-induced trapped charge in shallow trench isolation (STI) and buried oxide (BOX) on total ionizing radiation response of 0.13 μm partially-depleted silicon-on-insulator (PDSOI) NMOS technology are analyzed respectively. The positive trapped charge in the STI oxide, but not in the BOX, is responsible for the off-state leakage increase after ON bias radiation. A new method is proposed to calculate the surface charge density along the STI sidewall. This method takes into account the influences of the non-uniform electric field and the variable oxide thickness in the STI region. Moreover, the calculated non-uniform charge density along the STI sidewall is verified by three dimensional simulations. Even though there is charge-accumulation in the BOX, it shows minimal impact on the front-gate characteristics of the PDSOI devices in this 0.13 μm technology, except for the device with low body doping concentration. The positive charge trapped in BOX can induce significant threshold voltage shift in the RVT (regular Vth) I/O NMOSFET through coupling effect.

Composition variation of In1−xGaxAs epitaxially grown in narrow trenches on Si

In this work we investigate the indium content in In1−xGaxAs narrow trenches on Si by transmission electron microscopy (TEM), energy dispersive spectroscopy (EDS) and nano beam diffraction (NBD). We find a higher indium content in wider trenches and by scanning a trench from bottom to top we observe an increase of indium up to a maximum value close to the level of the surface of the shallow trench isolation oxide.

Comprehensive study on the TID effects of 0.13 μm partially depleted SOI NMOSFETs

Total ionizing dose (TID) effects of 0.13μm partially depleted (PD) SOI NMOSFETs are overviewed in this paper. For core devices with floating body, the 2nd peak of the front-gate transconductance (gm) degrades with incremental TID. Moreover, the 1st and 2nd peak of the drain current (Ids) hysteresis also declines due to the increased recombination current at the back-gate interface after irradiation. The front-gate subthreshold hump effect is more obvious under the OFF (off-state) and TG (transmission gate) bias conditions. By contrast, the back-gate subthreshold hump exhibits a maximum negative shift under the ON (on-state) bias condition and causes the most significant hump effect owing to the largest charge accumulation at the bottom of the shallow trench isolation (STI) oxide. The maximum negative shift of the back-gate threshold voltage is observed under the TG bias condition, leading to the coupling effect. Finally, for narrow-channel devices, it is found that the radiation-induced positive trapped charge in the STI oxide will degrade the electron mobility in the front-gate channel region, leading to a gm decrease because of the increased surface roughness scattering.

Additional Nitrogen Ion-Implantation Treatment in STI to Relax the Intrinsic Compressive Stress for n-MOSFETs

Based on the stress extraction and measurement by the atomic-force-microscope-Raman technique with nanometer-level space resolution, the high compressive stress about 700 MPa on the Si critical dimension (CD) is observed in the current complementary metal-oxide-semiconductor (CMOS) transistor. The difference of thermal expansion between Si and Shallow trench isolation (STI) oxide during the total thermal budget for the standard CMOS transistor manufacture process results in this high compressive stress in Si CD and will further degrade the electron carrier mobility about 25% seriously. In order to relax this intrinsic-processed compressive stress in Si CD and recover this device performance loss, the novel process is proposed in this paper in addition to the usage of one-side pad-SiN layer demonstrated in our previous work. With this novel process of additional nitrogen-ion implantation (IMP) treatment in STI oxide, it can be found that the less compressive stress in the Si CD can be achieved by the smaller difference of thermal expansion coefficients between Si and highly n-doped SiO2 STI oxide. The formation of Si-N bonding in the STI-oxide region can be monitored by Fourier-transform infrared spectroscopy spectra, and the thermal expansion coefficients for Si, SiO2, and SiN are 2.6, 0.4, and 2.87 ppm/K, respectively. The relaxation of intrinsic-processed compressive stress in the Si CD of about 400 MPa by this proposed additional nitrogen IMP treatment contributes 14 % electron-carrier-mobility enhancement/recovery. The experimental electrical data agree well with the theoretical k.p calculation for the strained-Si theory.

Analyzing the Radiation Degradation of 4-Transistor Deep Submicron Technology CMOS Image Sensors

This paper presents a radiation degradation study on 4-Transistor (4T) complementary metal-oxide-semiconductor (CMOS) image sensors designed in standard 0.18-μm technology. The significant contribution of this paper is a systematic evaluation of the X-ray radiation effects on image sensors from the individual device level, to the pixel level and to the level of the entire sensor. The major degradation parameters of the sensor have been analyzed. This paper also includes test structures of varying geometries of in-pixel MOSFETs, pinned photodiodes (PPD), and transfer gates (TG). Characterization was performed during different X-ray doses up to 109 krad. The major degradation-an increase in the dark signal-is analyzed by modifying the TG charge transfer time and integration time. The PPD and the TG are the elements most sensitive to the dark signal of the sensor. The radiation-related dimensional effects on the sensors are also evaluated, which show different results compared to 3T pixels. The transfer-gate length influences the dark signal due to not only the electric field variation in the TG channel but also the local defect generations. In-pixel MOSFETs are used to identify the origin of increases in radiation-induced dark signal. Shallow trench isolation (STI) oxides are responsible for the radiation degradation of the sensor. A slight degradation of the quantum efficiency was observed after radiation in the short-wavelength region. Basic hardening-by-design techniques are also presented. The discussion results of the radiation-related dimensional effects on the sensors together with the STI effect can be used as a guideline for future layout designs of radiation-tolerant sensors. Identifying the pixel dark current origin can help to determine where and how to suppress the pixel dark current generation more effectively.

The relaxation of intrinsic compressive stress in complementary metal-oxide-semiconductor transistors by additional N ion implantation treatment with atomic force microscope-Raman stress extraction

Based on the stress extraction and measurement by atomic force microscope-Raman technique with the nanometer level space resolution, the high compressive stress about 550 MPa on the Si active region (OD) is observed for the current complementary metal-oxide-semiconductor (CMOS) transistor. During the thermal budget for the standard manufacture process of the current CMOS transistor, the difference of thermal expansion coefficients between Si and Shallow Trench Isolation (STI) oxide results in this high compressive stress in Si OD and further degrades the electron carrier mobility seriously. In order to relax this intrinsic processed compressive stress in Si OD and try to recover this performance loss, the novel process is proposed in this work in addition to the usage of one-side pad SiN layer. With this novel process of additional N-ion implantation (IMP) treatment in STI oxide, it can be found that the less compressive stress about 438 MPa in Si OD can be achieved by the smaller difference of thermal expansion coefficients between Si and N-doped SiO2 STI oxide. The formation of Si-N bonding in N-doped SiO2 STI region can be monitored by Fourier transform infrared spectroscopy spectra and thermal expansion coefficients for Si, SiO2, and SiN are 2.6 ppm/K, 0.4 ppm/K, and 2.87 ppm/K, respectively. The effective relaxation of intrinsic processed compressive stress in Si OD about 112 MPa (from 550 MPa to 438 MPa) by this proposed additional N IMP treatment contributes ∼14% electron carrier mobility enhancement/recovery. The experimental electrical data agree well with the theoretical piezoelectricity calculation for the strained-Si theory.

Substrate Effect on CD Control for Ion Implantation Layer Lithography Beyond 45nm Node

Continuous technology-driven scaling has brought ion implantation (IMP) layers to a point, where the achievement of necessary resolution and line width start to meet significant process and material challenges, such as the non-negligible substrate effect. Underlying topography and film stack variation have created severe substrate reflectivity variation that affects critical dimension (CD), CD uniformity, resist profiles, and possibly defectivity, especially, the CD may vary according to different substrate film stacks, such as, trench isolation oxide (blank), and silicon. To minimize such CD offset on topography and blank area, photoresist (PR) thickness optimization in needed in addition to mask size adjustment which may meet some design rule constraints. Besides, in this paper we found that IMP process especially pre-amorphous implantation (PAI) for lightly doped drain (LDD) or source-drain (SD), may introduce one intermediate layer with different n,k that render extra effect on substrate reflectivity which will bring more complexity to photo CD control.

The influence of channel length on total ionizing dose effect in deep submicron technologies

The influence of channel length on total ionizing dose effect in a 180 nm complementary metal-oxide semiconductor technology is studied. When other conditions such as radiation bias, device structure are the same, the overall radiation response is determined by the charges trapped in the oxide. The off-state leakage due to the charges trapped in the shallow trench isolation oxide inverting the parasitic sidewall channel has correlation with the channel length. A shorter channel leads to a larger leakage current. For the first time, we report that the leakage current also exhibits the radiation enhanced channel-length modulation effect, which further degrades the device performance.

Modeling Low Dose Rate Effects in Shallow Trench Isolation Oxides

Low dose rate experiments on field-oxide-field-effect-transistors (FOXFETs) fabricated in a 90 nm CMOS technology indicate that there is a dose rate enhancement factor (EF) associated with radiation-induced degradation. One dimensional (1-D) numerical calculations are used to investigate the key mechanisms responsible for the dose rate dependent buildup of radiation-induced defects in shallow trench isolation (STI) oxides. Calculations of damage EF indicate that oxide thickness, distribution of hole traps and hole capture cross-section affect dose rate sensitivity. The dose rate sensitivity of STI oxides is compared with the sensitivity of bipolar base oxides using model calculations.

Total ionizing dose effect in an input/output device for flash memory

Input/output devices for flash memory are exposed to gamma ray irradiation. Total ionizing dose has been shown great influence on characteristic degradation of transistors with different sizes. In this paper, we observed a larger increase of off-state leakage in the short channel device than in long one. However, a larger threshold voltage shift is observed for the narrow width device than for the wide one, which is well known as the radiation induced narrow channel effect. The radiation induced charge in the shallow trench isolation oxide influences the electric field of the narrow channel device. Also, the drain bias dependence of the off-state leakage after irradiation is observed, which is called the radiation enhanced drain induced barrier lowing effect. Finally, we found that substrate bias voltage can suppress the off-state leakage, while leading to more obvious hump effect.

Radiation-induced shallow trench isolation leakage in 180-nm flash memory technology

The effects of total ionizing dose (TID) irradiation on the inter-device and intra-device leakage current in a 180-nm flash memory technology are investigated. The positive oxide trapped charge in the shallow trench isolation (STI) oxide is responsible for the punch-through leakage increase and punch-through voltage decrease. Nonuniform radiation-induced oxide trapped charge distribution along the STI sidewall is introduced to analyze the radiation responses of input/output (I/O) device and high voltage (HV) device. At low dose level, the inversion near the STI corner caused by the trapped charge occurs more easily due to the lower doping concentration in this region, which gives rise to the subthreshold hump effect. With total dose level increase, more charge at deep region of the STI oxide is accumulated, predominating the intra-device off-state leakage current. It has been discussed that the STI corner scheme and substrate doping profile play important roles on influencing the device’s performance after radiation.

Application of a Pelletron accelerator to study total dose radiation effects on 50 GHz SiGe HBTs

We have investigated the effects of 50 MeV lithium ion irradiation on the DC electrical characteristics of first-generation silicon–germanium heterojunction bipolar transistors (50 GHz SiGe HBTs) in the dose range of 600 krad to 100 Mrad. The results of 50 MeV Li 3+ ion irradiation on the SiGe HBTs are compared with 63 MeV proton and Co-60 gamma irradiation results in the same dose range in order to understand the damage induced by different LET species. The radiation response of emitter–base (EB) spacer oxide and shallow trench isolation (STI) oxide to different irradiation types are discussed in this paper. We have also focused on the efficacy in the application of a Pelletron accelerator to study total dose irradiation studies in SiGe HBTs.

Total Ionizing Dose Enhanced DIBL Effect for Deep Submicron NMOSFET

Radiation enhanced drain induced barrier lowering (DIBL) effect under different bias conditions was experimentally observed and verified by 3D simulation for deep submicron MOSFETs with shallow trench isolation (STI) oxides. The off-state leakage current increased significantly after total ionizing dose (TID) above 200 krad(Si) for PASS ,OFF and ON bias condition. The irradiated devices exhibited enhanced DIBL effect, that is the off-state leakage current increases with drain voltage and DIBL parameter increases with TID. The oxide trapped charge in the STI sidewall enhances the DIBL by decreasing the drain to gate coupling, enhancing the electric field near the STI corner, and increasing the surface potential of lowly doped substrate along STI sidewall. A simple dipole theory describing the enhanced DIBL phenomenon is introduced. The phenomenon is a result of the electrostatic effect, which concentrates drain field on channel into the source along shallow trench isolation oxide. Effective non-uniform charge distribution is applied in the 3D simulation for the radiation enhanced DIBL effect. Good agreement between experiment and simulation results is demonstrated.

Total ionizing dose effect of 0.18 m nMOSFETs

A 0.18 m MOSFET with shallow trench isolation is exposed to a -ray radiation. The parameters such as off-state leakage current, threshold voltage, transconductance, gate leakage current, and subthreshold slope are analyzed for pre- and post-irradiation. By introducing constant sheet charges at the shallow trench isolation oxide sidewall, good agreement between 3D simulation and experiment result is demonstrated. We believe that the thin gate oxide is insensitive to radiation, and the radiation induced charge trapping in the shallow trench isolation still leads to macroscopic effects such as drain-to-source leakage current, ultimately limiting the tolerance of CMOS circuits.

Modeling Ionizing Radiation Effects in Solid State Materials and CMOS Devices

A comprehensive model is presented which enables the effects of ionizing radiation on bulk CMOS devices and integrated circuits to be simulated with closed form functions. The model adapts general equations for defect formation in uniform SiO2 films to facilitate analytical calculations of trapped charge and interface trap buildup in structurally irregular and radiation sensitive shallow trench isolation (STI) oxides. A new approach whereby non-uniform defect distributions along the STI sidewall are calculated, integrated into implicit surface potential equations, and ultimately used to model radiation-induced ldquoedgerdquo leakage currents in n-channel MOSFETs is described. The results of the modeling approach are compared to experimental data obtained on 130 nm and 90 nm devices. The features having the greatest impact on the increased radiation tolerance of advanced deep-submicron bulk CMOS technologies are also discussed. These features include increased doping levels along the STI sidewall.

Total ionizing dose effects in shallow trench isolation oxides

The peaked evolution of leakage current with total ionizing dose observed in transistors in 130 nm generation technologies is studied with field oxide field effect transistors (FOXFETs) that use the shallow trench isolation as gate oxide. The overall radiation response of these structures is determined by the balance between positive charge trapped in the bulk of the oxide and negative charge in defect centers at its interface with the silicon substrate. That these are mostly interface traps and not border traps is demonstrated through dynamic transconductance and variable-frequency charge-pumping measurements. These interface traps, whose formation is only marginally sensitive to the bias polarity across the oxide, have been observed to anneal at temperatures as low as 80 °C. At moderate or low dose rate, the buildup of interface traps more than offsets the increase in field oxide leakage due to oxide-trap charge. Consequences of these observations for circuit reliability are discussed.