Abstract
The total ionizing dose (TID) radiation effects of partially-depleted (PD) silicon-on-insulator (SOI) devices fabricated in a commercial 0.2µm SOI process were investigated. The experimental results show an original phenomenon: the “ON” irradiation bias configuration is the worst-case bias for both front-gate and back-gate transistors. To understand the mechanism, a charge distribution model is proposed. We consider that the performance degradation of the devices is due to the radiation-induced positive charge trapped in the bottom corner of Shallow Trench Isolation (STI) oxide. In addition, by comparing the irradiation responses of short and long channel devices under different drain biases, the short channel transistors show a larger degeneration of leakage current and threshold voltage. The dipole theory is introduced to explain the TID enhanced short channel effect.
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