The relaxation of intrinsic compressive stress in complementary metal-oxide-semiconductor transistors by additional N ion implantation treatment with atomic force microscope-Raman stress extraction

Abstract

Based on the stress extraction and measurement by atomic force microscope-Raman technique with the nanometer level space resolution, the high compressive stress about 550 MPa on the Si active region (OD) is observed for the current complementary metal-oxide-semiconductor (CMOS) transistor. During the thermal budget for the standard manufacture process of the current CMOS transistor, the difference of thermal expansion coefficients between Si and Shallow Trench Isolation (STI) oxide results in this high compressive stress in Si OD and further degrades the electron carrier mobility seriously. In order to relax this intrinsic processed compressive stress in Si OD and try to recover this performance loss, the novel process is proposed in this work in addition to the usage of one-side pad SiN layer. With this novel process of additional N-ion implantation (IMP) treatment in STI oxide, it can be found that the less compressive stress about 438 MPa in Si OD can be achieved by the smaller difference of thermal expansion coefficients between Si and N-doped SiO2 STI oxide. The formation of Si-N bonding in N-doped SiO2 STI region can be monitored by Fourier transform infrared spectroscopy spectra and thermal expansion coefficients for Si, SiO2, and SiN are 2.6 ppm/K, 0.4 ppm/K, and 2.87 ppm/K, respectively. The effective relaxation of intrinsic processed compressive stress in Si OD about 112 MPa (from 550 MPa to 438 MPa) by this proposed additional N IMP treatment contributes ∼14% electron carrier mobility enhancement/recovery. The experimental electrical data agree well with the theoretical piezoelectricity calculation for the strained-Si theory.