Multiple-valued Logic Research Articles

Energy-Efficient Ternary Arithmetic Logic Unit Design in CNTFET Technology

This article presents the low-power ternary arithmetic logic unit (ALU) design in carbon nanotube field-effect transistor (CNFET) technology. CNFET unique characteristic of geometry-dependent threshold voltage is employed in the multi-valued logic design. The ternary logic benefit of reduced circuit overhead is exploited by embedding multiple modules within a block. The existence of symmetric literals among various single shift and dual shift operators in addition and subtraction operations results in the optimized realization of adder/subtractor modules. The proposed design is based on the notion of multiplexing either arithmetic, logical or miscellaneous operations, depending upon the status of input selection trits. The results obtained by the synopsis HSPICE simulator with the Stanford 32 nm CNFET technology illustrate that the proposed processing modules outperform their counterparts in terms of power consumption, energy consumption and device count. The proposed methodology leads to saving in power consumption and energy consumption (PDP) of 62% and 58%, respectively, on the benchmark circuit of the ALU [full adder/subtractor (FAS)]. Furthermore, for the 2-trit multiplier design, the enhanced performance at the architecture and circuit level is achieved through the optimized designs of various adder and multiplier circuits.

Generalization of the Landauer Principle for Computing Devices Based on Many-Valued Logic

The Landauer principle asserts that “the information is physical”. In its strict meaning, Landauer’s principle states that there is a minimum possible amount of energy required to erase one bit of information, known as the Landauer bound , where T is the temperature of a thermal reservoir used in the process and is Boltzmann’s constant. Modern computers use the binary system in which a number is expressed in the base-2 numeral system. We demonstrate that the Landauer principle remains valid for the physical computing device based on the ternary, and more generally, N-based logic. The energy necessary for erasure of one bit of information (the Landauer bound) remains untouched for the computing devices exploiting a many-valued logic.

AVALANCHE CHARACTERISTICS OF CRYPTOGRAPHIC FUNCTIONS OF TERNARY LOGIC

Context. The development and aplication of cryptographic algorithms based on many-valued logic functions makes it important to research their cryptographic properties and develop effective criteria for the cryptographic quality of their components. The development of efficient methods for the synthesis of high-quality cryptographic primitives based on the functions of many-valued logic is also an important task. The object of this research is the process of improving the efficiency of cryptographic algorithms based on many-valued logic functions. Objective. The purpose of this paper is to generalize the error propagation criterion and the strict avalanche criterion for the case of functions of three-valued logic. Method. The emergence of cryptography based on many-valued logic functions led to the understanding that today’s dominant cryptographic algorithms based on binary algebraic constructions are only a special case of more general trends. Numerous researches show that the use of cryptographic constructions based on many-valued logic functions leads to the creation of cryptoalgorithms that more fully implement the principles of diffusion and confusion. One of the most important cases of many-valued logic functions are 3-functions, which are also used in quantum cryptography. This article is another step towards developing cryptographic constructions based on many-valued logic functions. Results. The definition of the propagation criterion was extended to the case of functions of three-valued logic. On the basis of the propagation criterion for the functions of three-valued logic, the definition of a strict avalanche criterion was introduced, which describes the stability of cryptographic constructions against differential cryptanalysis attacks. We experimentally determined the number of 3-functions of length N=9, satisfying the strict avalanche criterion. A method based on three constructive rules is proposed, which allows to synthesize a complete set of 864 S-boxes of length N=9 satisfying strict avalanche criterion. This set of Sboxes is basic for the application of Kim’s construction, which allows to recurrently increase the length of the S-box to the required value. The paper shows that using Kim’s construction to increase the length preserves the S-box satisfying to a strict avalanche criterion, while allowing to obtain S-boxes with satisfactory non-linearity value as well as small output and input vectors correlation. Conclusions. The most important criterion of cryptographic quality, which shows the stability of the cryptographic algorithm to attacks of differential cryptanalysis is the propagation criterion that was generalized to the case of 3-functions. The existence of 3- functions of length N=9 satisfying the strict avalanche criterion is shown, and their full set is found. On the basis of the proposed constructive method, a complete set of S-boxes of length N=9 that satisfy the strict avalanche criterion was synthesized. It is shown that the Kim scheme can be applied to recurrently increase the length of S-boxes based on many-valued logic functions. As an actual direction for the continuation of the research, the development of regular and constructive methods for th

Nonvolatile Balanced Ternary Memory Based on The Multiferroelectric Material GeSnTe2.

Modern computer technology is based on the binary logic system. However, the slowdown of its development calls for transition to multivalued logic (MVL) systems. MVL can yield a denser logic implementation on the same chip area at low cost. More information can be transmitted with the same digits over fewer interconnections, thereby reducing power dissipation. Here, we suggest a novel nonvolatile balanced ternary memory based on the multiferroelectric material GeSnTe2. Two different directions and quantities of electric polarization are found to be stable in atomic-thick two-dimensional structures. The balanced ternary data set of {-1, 0, +1} can be implemented in the two-dimensional material on the nanometer scale. One-shot read/write processes are suggested.

Real Functions in Stochastic Dependence

Abstract In a fuzzified probability theory, random events are modeled by measurable functions into [0,1] and probability measures are replaced with probability integrals. The transition from Boolean two-valued logic to Lukasiewicz multivalued logic results in an upgraded probability theory in which we define and study asymmetrical stochastic dependence/independence and conditional probability based on stochastic channels and joint experiments so that the classical constructions follow as particular cases. Elementary categorical methods enable us to put the two theories into a perspective.

Multi-valued logic in graph transformation theory and self-adaptive systems

Graph transformation theory uses rules to perform a graph transformation. However, there is no a way to choose between such different transformations in the case where several of them are applicable. A way to get the choice is suggested here based on the comparing of the values of implications which correspond to different transformation variants. The relationship between the topos of bundles, and the set of graphs with the same vertices, is introduced to include logic into graph transformation theory. Thus, one can use the special type of implication and the truth-values set of such a topos to estimate different variants of graph transformations. In this approach, the maximal part of the initial graph towards the terminal one is conserved in the chosen variant. Analysis of self-adaptive systems uses some graph grammars. Self-adaptive systems autonomously perform an adaptation to changes both in user needs and in their operational environments, while still maintaining some desired properties. The suggested way to choose such graph transformation variants may be used to make a choice between different graph grammars in such systems modeling. This approach is illustrated in a model of some business processes, that result in the automated choice of the business process adaptation under the assumption that the process changes are minimal towards the terminal state.

Implementation of All 27 Possible Univariate Ternary Logics With a Single ZnO Memristor

Memristors with small size, fast speed, low power, CMOS compatibility and nonvolatile modulation of device resistance are promising candidates for the next-generation data storage and in-memory logic computing paradigm. In comparison to the binary logics enabled by memristor devices, multi-valued logics can provide higher computation efficiency with simple operation scheme, reduced circuit complexity, and smaller chip area. In this contribution, we demonstrate that all the 27 univariate ternary logic operations can be realized with a single ZnO three-state resistive switching memristor in at most three steps. The nonvolatile modulation characteristics of the memristor allow the read step to be independent of the logic operation and capacitate logic-in-memory applications. The present methodology could be beneficial for constructing future high-performance computation architectures.

Efficient Passive Shielding of MWCNT Interconnects to Reduce Crosstalk Effects in Multiple-Valued Logic Circuits

In this paper, the effectiveness of passive shielding of multiwalled carbon nanotube (MWCNT) bundle interconnects in reducing the crosstalk effects in carbon nanotube FET based ternary circuits is comprehensively investigated. In addition, based on the tighter sublithographic pitch of MWCNTs compared to Cu, we decrease the space between the carbon nanotube (CNT) interconnects to reduce the area overhead, while still having significantly higher effectiveness compared with Cu. The worst-case crosstalk delay and noise for passively shielded MWCNT and Cu wires at 14 nm technology are evaluated using comprehensive HSPICE simulations. The results indicate that the crosstalk delay and noise area in the efficient passively shielded MWCNT bundle interconnects are much smaller than the shielded Cu wires for ternary logic. Furthermore, the impacts of process variation on the crosstalk effects in these interconnects in ternary logic are investigated using Monte Carlo simulations. The results demonstrate the robustness of the passively shielded MWCNT bundles in ternary logic.

From many-valued consequence to many-valued connectives

Given a consequence relation in many-valued logic, what connectives can be defined? For instance, does there always exist a conditional operator internalizing the consequence relation, and which form should it take? In this paper, we pose this question in a multi-premise multi-conclusion setting for the class of so-called intersective mixed consequence relations, which extends the class of Tarskian relations. Using computer-aided methods, we answer extensively for 3-valued and 4-valued logics, focusing not only on conditional operators, but also on what we call Gentzen-regular connectives (including negation, conjunction, and disjunction). For arbitrary N-valued logics, we state necessary and sufficient conditions for the existence of such connectives in a multi-premise multi-conclusion setting. The results show that mixed consequence relations admit all classical connectives, and among them pure consequence relations are those that admit no other Gentzen-regular connectives. Conditionals can also be found for a broader class of intersective mixed consequence relations, but with the exclusion of order-theoretic consequence relations.

Integration of Quantum Dot Gate (QDG) in SWS-FETs for Multi-Bit Logic and QD-NVRAMs for Distributed In-Memory Computing

Compared to multi-valued logic (MVL) with conventional 2-state FETs with a single threshold, MVL computing architectures, based on 4-state SWS (Spatial wavefunction switched) and QDG (quantum dot gate)-FETs having multiple thresholds, results in reduced device count, higher clock (CLK) speed, and lower power consumption. We have experimentally shown multi-state characteristics in SWS-FETs as well as QDG-FETs. This paper presents a novel QDG-SWS-FET that: (1) functions as a multi-bit FET for efficient low-power logic, (2) can be configured as a quantum dot (QD) nonvolatile random access memory (NVRAM), and (3) is suitable for in-memory MVL computing architecture that are compatible with sub-7nm technology nodes. A QDG-SWS-FET with the addition of a control gate dielectric layer functions as a NVRAM cell. Furthermore, it is shown that one single SWS-QD-NVRAM cell gives the functionality of a 1-bit NAND. We have developed circuit/device models and performed quantum simulations for novel multi-layer quantum dot/quantum well FETs and NVRAMs. Our simulations have shown 4-states/2-bit output-input transfer characteristics in SWS-CMOS inverters and NAND gates using two Si/SiGe quantum well channels.

Antiambipolar Transistor: A Newcomer for Future Flexible Electronics

AbstractAn antiambipolar transistor exhibits a steep increase and decrease in drain current within a certain range of gate bias voltage. This unique feature is brought about by a partially stacked pn‐heterointerface formed around the center of the transistor channel. First, this review discusses recent topics related to the antiambipolar transistor, including the constituent materials, operation mechanism, and factors controlling device performance. Then, novel functional applications, such as optoelectronics and multivalued logic circuits, are introduced. The transistor channels of antiambipolar transistors consist largely of 2D atomically thin films or organic semiconductors. These materials are mechanically flexible. Therefore, antiambipolar transistors have the potential to enable advances to be made in the field of flexible electronics.

Multi-digit Binary-to-Quaternary and Quaternary-to-Binary Converters and Their Applications in Nanoelectronics

Using the multi-valued logic causes the reduction in interconnections, thereby leading to the reduction in chip area and interconnection power dissipation. In order to take advantage of the multi-valued logic, the structure of a mixed-radix system using multi-valued and binary logic is more suitable than that of only using the multi-valued logic; so, the design of a multi-digit converter is necessary. In this paper, first, a new efficient quaternary-to-binary converter and a binary-to-quaternary converter based on multi-threshold voltage are designed using carbon nanotube field effect transistor (CNTFET). Then, multi-digit quaternary-to-binary and binary-to-quaternary algorithms are discussed and implemented. Subsequently, these converters are used in a multi-digit quaternary adder. It is shown that, if quaternary numbers are initially converted into binary numbers and then summation is performed (by using multi-digit quaternary-to-binary and binary-to-quaternary converters), the complexity is considerably reduced, as compared with using the quaternary full adders. Also, some other applications of these converters are discussed. The simulation results using the Stanford 32-nm CNTFET model in the HSPICE software at 0.9 V indicate the correct operation and the high performance of the proposed designs.

Quantum Dot Gate FET Based Multi-Value Logic Sequential Circuits

The design of multi value logic sequential circuits based on QG-FET (Quantum dot Gate Field Effect Transistor) is discussed here. The QG-FET produces an intermediate state in between the two stable states(i.e.) ON & OFF, this is happening due to change in the threshold voltage over this range. The design of various sequential circuits using QDGFET which includes ternary D-flipflop and ternary right shift register is discussed. The proposed design of sequential circuits using QDGFET results an improved circuit parameter and less circuit elements in the implantation. The three state QG-FET will increase the bit handling capability of the device due to increase in number of states. So that, with less circuit elements at a time we can handle more number of bits.

Atom/molecular nanoarchitectonics for devices and related applications

Abstract Fusion of nanotechnology with the other science disciplines including organic chemistry, supramolecular chemistry, and biotechnology creates a new conceptual paradigm, nanoarchitectonics. In this review article, we focus on recent contribution of the nanoarchitectonics concept on device fabrication. In these approaches, various materials such as organic semiconductor crystals, carbon nanotubes, graphene, and nanosheets are nanoarchitected by self-assembled monolayer technique, meniscus-driven crystallization, photochemical layer-by-layer process, ice resist lithography, vortex Langmuir-Blodgett method to various devices including atomic switch, artificial synapses, decision-making device, nonvolatile memory, multi-valued logic circuits, organic field-effect transistors, conductive cellulose nanopapers, organic photovoltaics, fuel cells, biocompatible batteries, and microbial biophotovoltaic cells.

A Note on Strong Axiomatization of Gödel Justification Logic

Justification logics are special kinds of modal logics which provide a framework for reasoning about epistemic justifications. For this, they extend classical boolean propositional logic by a family of necessity-style modal operators “t : ”, indexed over t by a corresponding set of justification terms, which thus explicitly encode the justification for the necessity assertion in the syntax. With these operators, one can therefore not only reason about modal effects on propositions but also about dynamics inside the justifications themselves. We replace this classical boolean base with Gödel logic, one of the three most prominent fuzzy logics, i.e. special instances of many-valued logics, taking values in the unit interval [0, 1], which are intended to model inference under vagueness. We extend the canonical possible-world semantics for justification logic to this fuzzy realm by considering fuzzy accessibility- and evaluation-functions evaluated over the minimum t-norm and establish strong completeness theorems for various fuzzy analogies of prominent extensions for basic justification logic.

Approach for MVL design based on armchair graphene nanoribbon field effect transistor and arithmetic circuits design

This paper presents the approach for multiple-valued logic (MVL) design and implementing the arithmetic circuit based on armchair graphene nanoribbon field effect transistors (GNRFETs). For this purpose, the values of the threshold voltages are obtained for GNRFETs for utilizing in MVL. The Id-Vgs curve is drawn for all n-type GNRFETs by Synopsys HSPICE tools. Moreover, the width variations and band gap energy are scrutinized. The value of threshold voltage for range of N ​= ​3p+1 is more than N ​= ​3p. These observations exhibit that variation of the threshold voltages can be utilized for a circuit design based on GNRFET. Furthermore, the sub-threshold swing is obtained. As a proof of the concept, the ternary arithmetic circuits based on GNR are designed with 0.5 ​V supply voltage. The computational results confirm the threshold voltages values as well as the suitable figure of merits of using GNRFETs in multiple-valued logic circuit design.

On MV-Algebraic Versions of the Strong Law of Large Numbers.

Many-valued (MV; the many-valued logics considered by Łukasiewicz)-algebras are algebraic systems that generalize Boolean algebras. The MV-algebraic probability theory involves the notions of the state and observable, which abstract the probability measure and the random variable, both considered in the Kolmogorov probability theory. Within the MV-algebraic probability theory, many important theorems (such as various versions of the central limit theorem or the individual ergodic theorem) have been recently studied and proven. In particular, the counterpart of the Kolmogorov strong law of large numbers (SLLN) for sequences of independent observables has been considered. In this paper, we prove generalized MV-algebraic versions of the SLLN, i.e., counterparts of the Marcinkiewicz–Zygmund and Brunk–Prokhorov SLLN for independent observables, as well as the Korchevsky SLLN, where the independence of observables is not assumed. To this end, we apply the classical probability theory and some measure-theoretic methods. We also analyze examples of applications of the proven theorems. Our results open new directions of development of the MV-algebraic probability theory. They can also be applied to the problem of entropy estimation.

Missing values and dragonfly operations in fuzzy relational compositions

Three-valued logics were found by logicians as an important topic focusing on dealing with truth-values different from the standard True and False values. The variety of such values, including “Irrelevant”, “Non-applicable”, “Indeterminable”, “Incosistent”, “Graded truth” or “Unknown”, generated a wide variety of distinct three-valued logics, each focusing on a distinct type of the third value and the consequent aspects of the related logic. Indeed, there is no single approach that would correctly model all the motivating situations and serve perfectly to all practical problems. Furthermore, one has to keep in mind that these logical or even only purely algebraic approaches serve as a sort of approximation of the modeled real situation. Indeed, some of them might deserve very complex approaches using several other techniques and scientific fields related to the uncertainty theories.However, the logical/algebraic approaches may serve as very appropriate, comprehensible, elegant and efficient way to treat such truth values that are neither True, nor False. Following some of the previous works, we will call such values by the word “undefined” and make a short revision of the three-valued logics dealing with such undefined values. Secondly, we will review some extensions of these three-valued logics to many-valued logics, i.e., in particular partial fuzzy logics, which extend typical, usually [0,1]-valued fuzzy logics by a dummy value ⋆ in order to represent the undefined truth value. Furthermore, we recall that none of them is primarily proposed in order to deal with the missing values in fuzzy relational compositions and thus, the first attempts to deal with such values in fuzzy relational compositions was built on a combination of two algebras for partial fuzzy logics, namely Bochvar and Sobociński. However, it is clear that this combination of two algebras in the definition of fuzzy relational compositions is a sort of higher-level construction of a rather heuristic origin. Therefore, in this paper, we go back one level lower and design a new set of operations for the purpose of dealing with missing values. This algebra employs the lower estimation approach and it is designed in order to preserve as many properties from the residuated lattices as possible. Further properties of the proposed operations are provided and formally proved. Finally, the application potential is demonstrated on a real example of the taxonomical classification of dragonflies. Based on the primary application, we call the proposed algebra of operations as Dragonfly algebra or simply Dragonfly operations.

Two novel inverter-based ternary full adder cells using CNFETs for energy-efficient applications

ABSTRACTCarbon nanotube field effect transistors (CNFETs) exhibit great promise and extensions to silicon MOSFET due to their excellent electronic properties and extremely small size. Implementable CNFET circuits have operational characteristics to approach the advantage of using multiple-valued logic (MVL) in voltage mode. In MVL implementation computation for the system will be faster than the binary system with improved density of digital circuits. This paper presents two novel 1-bit inverter-based ternary full adder cells which second design cell uses only 37 CNFET transistors in its structure. These designs have been proposed using a new definition of Majority-not based full adder, and are compared to the other adders based on power consumption, speed and power-delay product (PDP). Proposed designs are evaluated using simulation run on HSPICE with 32 nm CNFET standard technology under various operational conditions, including different supply voltages, output load variation and different operating temperatures. According to simulation results, all proposed ternary full adder designs in compare to the state of the art circuits in literature have been demonstrated up to 81% and 80%, respectively, improvement in power consumption and PDP.

Novel ternary D-Flip-Flap-Flop and counter based on successor and predecessor in nanotechnology

This paper presents a novel design of ternary circuits using carbon nano-tube transistors (CNTFETs). Using multi-valued logic can reduce chip interconnections, which can have a direct effect on chip area and interconnections power consumption. In this paper, at first, a novel design of ternary successor and predecessor is done with one supply voltage and is compared with the previous design based on CNTFETs. It is shown that this new design provides excellent energy efficiency. Furthermore, a novel structure for the D-Flip-Flap-Flop design is proposed by combining the successor and the predecessor; in this D-Flip-Flap-Flop, the second output is the next level of the first output instead of the invert of that, so this D-F.F.F is easily applicable to the counter design. For the first time, two types of ternary synchronous and asynchronous counters are designed based on CNTFETs, which can be extended to the desired bits using the proposed successor and predecessor on the basis of D-Flip-Flap-Flop. Simulation results using HSPICE software and CNT-32 nm model demonstrate that the proposed ternary circuits (successor, predecessor and D-Flip-Flap-Flop) consume significantly lower power, delay and PDP, as compared with the previous works with one supply voltage; Furthermore, the first designs of ternary synchronous and asynchronous counters based on the CNTFETs can function flawlessly with a high performance.