Multiple-valued Logic Research Articles

ХРОМАТИЧНЕ ЧИСЛО ФУНКЦІЇ

Побудова на досліджуваній множині математичних об'єктів групової структури і використання її властивостей є одним з ефективних методів дослідження. Одним з центральних понять теорії груп є поняття гомоморфізму, яке виявляється дуже корисним при вивченні властивостей груп. Гомоморфізм - це відображення з однієї групи в іншу, яке зберігає групову операцію. У даній статті авторами побудований аналог поняття гомоморфізму на випадок, коли замість групової операції задається довільне, усюди визначене відображення f X X n : → . У статті докладно розглядається випадок, коли n = 2 і X ⊂ R . Дається визначення хроматичного числа цього відображення і наводяться приклади його обчислення. Наведені приклади хроматичних чисел деяких груп з необхідними поясненнями. Введено поняття хроматичного числа дійсної числової функції і показано, що це поняття тісно пов'язане з поняттям R - функції В.Л. Рвачева. Спираючись на відомі раніше результати, показано, що існують числові функції з нескінченними хроматичними числами. Для прикладу наведено хроматичні числа деяких функцій, дані пояснення отриманих результатів. Основним результатом цієї статті є доведення того факту, що лінійна функція двох дійсних змінних f (x, y) =αx + βy +γ ,αβ ≠ 0 не має скінченого хроматичного числа. Аналогічний результат доведений для функції ( ) 2 2 g x, y = x − y двох дійсних змінних. Таким чином, множину R неможна розфарбувати в скінчене число кольорів так, щоб колір значення функції αx + βy +γ , де αβ ≠ 0 однозначно визначався кольором її аргументів. Те ж стосується функцій 2 2 x − y і ax x x b n ... + 1 2 , де n >1, ab ≠ 0 . У термінах R - функцій отриманий результат можна сформулювати наступним чином: функції f (x, y) і g(x, y) (як і функція ax x x b n ... + 1 2 при n >1, ab ≠ 0 ) не можуть бути R - функціями ні при якому виборі супроводжуючих функцій багатозначної логіки. Таким чином, в даній статті введено поняття хроматичного класу і хроматичного числа функції. Знайдено зв'язок між отриманими поняттями і теорією груп. Продемонстровано, що поняття хроматичного числа функції на деякій множині тісно пов'язане з поняттям R - функції В.Л. Рвачева. Відзначено, що для доведення неізоморфності груп можна використовувати той факт, що для ізоморфних груп хроматичні числа і хроматичні класи, до яких вони належать, збігаються.

Novel Ternary Adder and Multiplier Designs Without Using Decoders or Encoders

Multiple-Valued Logic systems present significant improvements in terms of energy consumption over binary logic systems. This paper proposes new ternary combinational digital circuits that reduce energy consumption in low-power nano-scale embedded systems and Internet of Thing (IoT) devices to save their battery consumption. The 32 nm CNTFET-based ternary half adder (THA) and multiplier (TMUL) circuits use novel ternary unary operator circuits and implement two power supplies Vdd and Vdd/2 without using any ternary decoders, basic logic gates, or encoders to minimize the number of used transistors and improve the energy efficiency. Extensive simulations (over 160) of the proposed designs in terms of PVT (Process, Voltage, Temperature) variations, noise effect, and scalability studies, along with several benchmark designs using HSPICE simulator, prove the significance of the proposed circuits to decrease the power-delay product (PDP), improve the robustness to process variations, and the noise tolerance. The obtained results show the superiority of the designs in a reduction between 32% and 74% in transistors count and between 18% and 99% in PDP compared to the most recent works.

Multi-valued logic system: new opportunities from emerging materials and devices

New materials and device approaches to multi-valued logic systems are introduced.

Using the fuzzy logic approach to extract the index of economic sanctions in the Islamic Republic of Iran

Fuzzy logic is one of the most widely used methods for quantifying qualitative studies. Because based on the fuzzy logic method, a wide range of verbal interfaces can be presented quantitatively. Fuzzy logic is a form of multi-valued logic. Quantitative indicators for qualitative events can be defined with its help. Iran has faced the phenomenon of economic sanctions since 1979 and after the victory of the Islamic Revolution. These sanctions have had different types and have affected different sectors of the Iranian economy. However, in most cases, studies on these sanctions have been limited and inefficient. In this study, based on the fuzzy method, an attempt has been made to define a quantitative index for economic sanctions during the years 1979–2019, using the opinions of economics experts on sanctions. This quantitative index can be utilized as a useful time series. Researchers in the field of Iranian economics and the economics of sanctions can help to study the impact of this economic phenomenon on different sectors of the Iranian economy. The results of this study showed the index of sanctions during 2011 and 2012, in which the most sanctions were imposed against Iran. The index was extracted and it was shown that it had the highest value.•In qualitative studies, to quantify the studied trends, the method of fuzzy logic and conversion of verbal propositions into numbers and figures can be used.•The index of economic sanctions is a useful time series for researchers in the field of sanction economics and the Iranian economy.•The index of economic sanctions can determine how each of the economic sanctions against Iran will work.

A revised mechanism of band gap evolution of TMDC nanotubes and its application to Janus TMDC nanotubes: negative electron and hole compressibility

Nested Janus TMDC nanotubes offer an unprecedented playground to realize both the negative electron and negative hole compressibility, permitting emerging applications such as hysteresis-free steep-slope transistors and multivalued logic devices.

Organic-semiconductor nanoarchitectonics for multi-valued logic circuits with ideal transfer characteristics

A nanoarchitectonics approach to high-performance organic multi-valued logic circuits is proposed.

Directed earned value management based on ordered fuzzy numbers

Earned value management is well-known as the most efficient method of project monitoring and control providing relatively reliable information about the project performance. However, this method requires accurate estimates of the progress of project activities, which are always associated with uncertainties that, if ignored or not addressed well, lead to incorrect results. To address this issue, the application of multi-valued logic, in particular fuzzy logic, in earned value management has recently attracted a lot of attention both in practice and research. This paper introduces directed earned value management (DEVM) in which ordered fuzzy numbers are used to express the so-called uncertainties as well as to capture more information about the trend of the project progress. To evaluate the performance of the proposed method, several numerical examples and a case study are presented. The results reveal that compared to the existing methods, DEVM has a lower computational complexity. Also, it doesn’t suffer from the overestimation effect and as a result, it has a higher ability to express project-specific dynamics. In sum, the proposed method allows project managers to make informed decisions that lead to taking preventive and corrective actions promptly and at a lower cost.

Causal Uncertainty in Capital Markets: A Robust Noisy-Or Framework for Portfolio Management

Understanding the causal relations that drive markets is integral to both explaining past events and predicting future developments. Although there are various theories of economic causality, there has not yet been a wide adoption of machine learning–inspired causal frameworks within economics and finance. Causal networks are among the latter and provide one of the most transparent and practical models for representing the relationships between economic causes and effects that are relevant for making investment decisions. Among the various approaches to causal networks, the noisy-or model stands out because it provides the formal means to simplify the calculation of the cumulative impact of more than one cause on an effect. One of the implicit assumptions of the noisy-or model is that the causal probability values posited by model builders are completely reliable. This assumption is unrealistic, however, especially in financial applications in which beliefs about market events are generally supported by significantly less data relative to beliefs about natural phenomena. Moreover, aside from the need to evaluate the reliability of individual beliefs, portfolio managers presumably also need to assess the investment processes that produce those beliefs. To address the foregoing challenges, in this article, a formal, logic-based framework to produce robust, uncertainty-adjusted causal probability assignments within the noisy-or model is proposed. The robust noisy-or framework described provides both a technical enhancement of the basic noisy-or model and a practical solution for addressing the challenge posed by the varying quality of evidence that supports most investment decisions. TOPICS:Big data/machine learning, quantitative methods, statistical methods Key Findings ▪ Causal networks provide an efficient framework for assisting with investment decisions that are supported by both quantitative and qualitative evidence. ▪ Within the formal setting of causal networks, the noisy-or model simplifies the processing of large sets of evidence that support investment views. It does this by assuming that causes act independently of one another in terms of their ability to influence the actualization of effects. ▪ Evidence-based subjective logic is a many-valued logic that provides a way for investors to precisely account for model uncertainty, with regard to both the reliability of their individual causal probability assignments and their overall conviction in their investment process. The logic also provides the means to combine different causal probability assignments on a single belief, each driven by a distinct set of evidential support.

An Extension of the Stable Semantics via Lukasiewicz Logic

Logic Programming and fuzzy logic are active areas of research, and their scopes in terms of applications are growing fast. Fuzzy logic is a branch of many-valued logic based on the paradigm of inference under vagueness. In this work we recall some of the interplay between three 3-valued logics that are relevant in these areas: The Lukasiewicz logic, the intermediate logic G3 and the paraconsistent logic G3′, and we present a contribution to the area of answer sets that consists in extending a definition of stable model based on proof theory in logic G3, to a more general definition that can be based on any of the more expressive logics G3′ or Lukasiewicz. Finally we present and explore a new 4-valued logic that bears relation to G3 and to Lukasiewicz 4-valued logic.

Toward novel designs of reversible ternary 6:2 Compressor using efficient reversible ternary full-adders

Integrated circuits always face with two major challenges including heat caused by energy losses and the area occupied. In recent years, different strategies have been presented to reduce these two major challenges. The implementations of circuits in a reversible manner as well as the use of multiple-valued logic are among the most successful strategies. Reversible circuits reduce energy loss and ultimately eliminate the problem of overheating in circuits. Preferring multiple-valued logic over binary logic can also greatly reduce area occupied of circuits. When switching from binary logic to multiple-valued logic, the dominant thought in binary logic is the basis of designing computational circuits in multiple-valued logic, and disregards the capabilities of multiple-valued logic. This can cause a minimal use of multiple-valued logic capabilities, increase complexity and delay in the multiple-valued computational circuits. In this paper, we first introduce an efficient reversible ternary half-adder. Afterward, using the reversible ternary half-adder, we introduce two reversible versions of traditional and comprehensive reversible ternary full-adders. Finally, using the introduced reversible ternary full-adders, we propose two novel designs of reversible ternary 6:2 Compressor. The results of the comparisons show that although the proposed circuits are similar to or better than previous corresponding designs in terms of criteria number of constant input and number of garbage outputs, they are superior in criterion quantum cost.

Design analysis and applications of all-optical multifunctional logic using a semiconductor optical amplifier-based polarization rotation switch

In this communication, a new semiconductor optical amplifier (SOA)-based module for multi-valued logic units using the cross-polarization modulation effect is proposed and analyzed. The design is simple and compact, consisting of only three SOAs and a few passive optical elements. SOAs have very low switching power (< 1mW), and are very small (< 1 mm) and integrable into modern optical integrated circuits. Being multifunctional, the design is versatile; it can function as a demultiplexer, comparator, half adder, half subtractor, and as basic (OR, AND), universal (NOR, NAND), XOR, and XNOR logic gates. This design follows a tree architecture, operates at very high speed (~ 100Gbit/s), and provides a good Q factor (30 dB or more). The corresponding bit error rate (BER) is very low (~ 10–24). In this work, a relative eye opening as large as 90.4% is calculated. The variations in Q and BER with noise and control power are also investigated.

Tree-Like Proof Systems for Finitely-Many Valued Non-deterministic Consequence Relations

The main goal of this paper is to provide an abstract framework for constructing proof systems for various many-valued logics. Using the framework it is possible to generate strongly complete proof systems with respect to any finitely valued deterministic and non-deterministic logic. I provide a couple of examples of proof systems for well-known many-valued logics and prove the completeness of proof systems generated by the framework.

Correlation immunity of three-valued logic functions

The current stage in the development of cryptography is characterized by attention of researchers to the methods of many-valued logic. Of particular importance are the methods of three-valued logic, which are used in quantum cryptography, as well as in three-valued cryptographic algorithms with an increased level of cryptographic strength, implemented on binary computers. This circumstance leads to the need for further improvement of methods for constructing of high-quality cryptographic primitives. This paper is devoted to the generalization of definition of the correlation immunity of three-valued logic functions in the context of the properties of matrices of correlation coefficients of S-boxes built on their basis. The paper proposes methods for the synthesis of complete classes of 3-functions of length N = 9, the output of which does not depend on the input variable x 1 or x 2, as well as the full set of correlation immune 3-functions. The relationship between the introduced criterion of the correlation immunity of 3-functions and the criterion for the absence of a correlation interconnection between the output and input vectors of S-boxes of length N = 9 is also established.

Low storage power and high noise margin ternary memory cells in nanoelectronics

In recent years, due to the high ability of the multi-valued logic design in nanotechnology, the interest in the design of it has been renewed. Using multi-valued logic can lead to reduction of interconnections in the chip. This study presents two novel designs of a ternary memory cell using carbon nanotube field effect transistors (CNFETs) with only one supply voltage. In the previous works, a ternary latch has been used to store the ternary value, which has a considerably more static power and lower static noise margin in comparison to a binary latch. The proposed memory cells are based on decoding the ternary value to the binary one and saving in two binary latches; in this way, the storage power is sharply decreased and the static noise margin of the proposed ternary memory cell is also increased considerably to get close to that of a binary memory cell. The results of the simulation, using the HSPICE software and the Stanford 32 nm CNFET library with the voltage of 0.9 V, demonstrated that the proposed ternary memory cell achieved significant power saving and static noise margin improvement, as compared to the previous works with the same transistor count, which was expected.

Design of High-Speed Quaternary D Flip-Flop Based on Multiple-valued Current-mode

A new type of quaternary D flip-flop based on multiple-valued current-mode is presented for high-speed sequential circuit in VLSI systems. It employs master-slave mode and dynamic multiple-valued source-coupled logic. A distinguishable multiple-valued interval, fast switch speed and compact structure are obtained by combining source-coupled logic with differential-pair circuit. The performance evaluation is carried out with HSPICE using 0.18μm CMOS process. A performance comparison with those issued in some references is conducted. The delay in our design is about 74% reduced by comparison with the corresponding binary implementation. The circuitry proposed is simplicity, regularity, and modularity, so well suited for VLSI implementation. Quaternary logic seems to be a potential and feasible method of high-performance VLSI systems.

Ordered pair semantics and negation in LP

In this note, I present a modified semantic framework for the multi-valued paraconsistent logic LP, which allows for a straightforward preservation of a significant classical intuition about negation, namely that the negation operator reverses truth-value.

Multi-valued Verification of Strategic Ability

Some multi-agent scenarios call for the possibility of evaluating specifications in a richer domain of truth values. Examples include runtime monitoring of a temporal property over a growing prefix of an infinite path, inconsistency analysis in distributed databases, and verification methods that use incomplete anytime algorithms, such as bounded model checking. In this paper, we present multi-valued alternating-time temporal logic ( mv-ATL → ∗ ), an expressive logic to specify strategic abilities in multi-agent systems. It is well known that, for branchingtime logics, a general method for model-independent translation from multi-valued to two-valued model checking exists. We show that the method cannot be directly extended to mv-ATL → ∗ . We also propose two ways of overcoming the problem. Firstly, we identify constraints on formulas for which the model-independent translation can be suitably adapted. Secondly, we present a model-dependent reduction that can be applied to all formulas of mv-ATL → ∗ . We show that, in all cases, the complexity of verification increases only linearly when new truth values are added to the evaluation domain. We also consider several examples that show possible applications of mv-ATL → ∗ and motivate its use for model checking multi-agent systems.

Classical Logic with n Truth Values as a Symmetric Many-Valued Logic

We introduce Boolean-like algebras of dimension n (n{mathrm {BA}}s) having n constants {{{mathsf {e}}}}_1,ldots ,{{{mathsf {e}}}}_n, and an (n+1)-ary operation q (a “generalised if-then-else”) that induces a decomposition of the algebra into n factors through the so-called n-central elements. Varieties of n{mathrm {BA}}s share many remarkable properties with the variety of Boolean algebras and with primal varieties. The n{mathrm {BA}}s provide the algebraic framework for generalising the classical propositional calculus to the case of n–perfectly symmetric–truth-values. Every finite-valued tabular logic can be embedded into such a n-valued propositional logic, n{mathrm {CL}}, and this embedding preserves validity. We define a confluent and terminating first-order rewriting system for deciding validity in n{mathrm {CL}}, and, via the embeddings, in all the finite tabular logics.

Sequent-Type Calculi for Systems of Nonmonotonic Paraconsistent Logics

Paraconsistent logics constitute an important class of formalisms dealing with non-trivial reasoning from inconsistent premisses. In this paper, we introduce uniform axiomatisations for a family of nonmonotonic paraconsistent logics based on minimal inconsistency in terms of sequent-type proof systems. The latter are prominent and widely-used forms of calculi well-suited for analysing proof search. In particular, we provide sequent-type calculi for Priest's three-valued minimally inconsistent logic of paradox, and for four-valued paraconsistent inference relations due to Arieli and Avron. Our calculi follow the sequent method first introduced in the context of nonmonotonic reasoning by Bonatti and Olivetti, whose distinguishing feature is the use of a so-called rejection calculus for axiomatising invalid formulas. In fact, we present a general method to obtain sequent systems for any many-valued logic based on minimal inconsistency, yielding the calculi for the logics of Priest and of Arieli and Avron as special instances.

A Novel Technique to Produce Logic ‘1’ in Multi-threshold Ternary Circuits Design

Nowadays, due to the high capabilities of nanotechnology in designing multi-valued logic (MVL) circuits, much research has been done to design MVL circuits in nanotechnology. The use of MVL circuits reduces chip interconnections, thereby decreasing the chip area and power consumption. Various methods have been proposed to produce logic ‘1’ in the ternary logic circuits; these include the use of voltage division on VDD and application of two supply voltages. The use of two supply voltages increases the interconnections, which is against one of the multi-valued logic aims, and using voltage division on VDD can cause considerable static power dissipation. In this paper, based on the multi-threshold voltage of CNFET, the circuits are designed to charge a load capacitor to VDD/2 or discharge to VDD/2 in order to produce logic ‘1’ by a novel structure of diode-connected transistors. Thus, with the use of the single-supply voltage, the direct current is eliminated and the static power consumption is dropped sharply. As expected, the simulation results show that the proposed designs have considerably low power consumption with the same delay; thus, they offer a considerably lower PDP in comparison with other single-supply designs with the same noise margin.