Magnetic Tunnel Junction Devices Research Articles

A Task-Schedulable Nonvolatile Spintronic Field-Programmable Gate Array

Despite the vast hardware resources available in field-programmable gate arrays (FPGAs), the implementation of very large and complex designs on these platforms is a challenging problem. One effective solution is to use task scheduling. In this method, the FPGA configuration is changed according to the required task. This requires access to external nonvolatile memory, which significantly reduces system performance. In this letter, the development of a nonvolatile spintronic FPGA structure with task-scheduling capability is described. By using the nonvolatile feature of the magnetic tunnel junction device, the structure can store two different configurations in a nonvolatile way, which eliminates the need for external memory access and significantly enhances system performance.

Calibration and Parameter Extraction of STT-MTJ Device at High Frequency by Using De-Embedding Approach Based on TRL Calibration

Spin-Torque-Transfer Magnetic Tunnel Junction (STT-MTJ) device shows wide applications in many important scenarios, including magnetic random access memory (MRAM), logic design, and high-frequency application. Its characterizations at the high frequency are studied intensively recently. In this article, the high-frequency properties of the STT-MTJ device are investigated thoroughly, including a de-embedding approach followed by an extraction procedure for removing the influences from the environment and the package. The de-embedding approach is performed on the STT-MTJ device operated at a high frequency, which can be used to calibrate its electrical characteristics by eliminating the environmental influence. After the calibration, the equivalent circuit for the MTJ device at high frequency can be set up, followed by the extraction procedure of the parasitic parameters of the high-frequency-equivalent-circuit. Combined with the extracted parameters, the equivalent circuit can be used for the simulation work with the MTJ device involved in the high-frequency operation.

Hybrid Non-Volatile Flip-Flops Using Spin-Orbit-Torque (SOT) Magnetic Tunnel Junction Devices for High Integration and Low Energy Power-Gating Applications

This paper presents two novel hybrid non-volatile flip-flops (NVFFs) comprised of the conventional CMOS flip-flop for static storage in normal operations and Spin-Orbit-Torque Magnetic Tunnel Junction (SOT-MTJ) devices for temporary storage during power gating. The proposed NVFFs re-utilize a part of the standard CMOS flip-flop infrastructure for storing and restoring data onto MTJs for reducing the area. Furthermore, the proposed NVFFs re-use a write current, which is used for storing an MTJ, to write the other MTJ at a time, resulting in 50% storing energy reduction. To reduce the area further, the number of external terminals of an MTJ is reduced by shorting the shorting physical terminals. Removing a terminal using the proposed STT-Like SOT configuration results in fewer transistors to control. The proposed NVFF circuits are evaluated using a compact MTJ model targeting implementation in a 14-nm technology node. Analysis indicates that area overheads are only 10.3% and 6.9% compared to the conventional D flip-flop because three or two minimum-sized NMOS transistors are added for accessing MTJs. Compared to the best previously known NVFFs, the proposed NVFF has an improvement by a factor of 2–8 in terms of the area overhead.

Asymmetric magnetization reversal of the Heusler alloy Co2FeSi as free layer in an CoFeB/MgO/Co2FeSi magnetic tunnel junction

We report the in-plane magnetization reversal behavior of the Co2FeSi Heusler alloy free layer in a bottom-pinned magnetic tunnel junction film with 149% TMR. Using magneto-optic indicator film imaging, we visualize the magnetic domain dynamics of this buried layer integrated within a full magnetic tunnel junction stack. The magnetic domain dynamics reveal anisotropic magnetization reversal within Co2FeSi under applied in-plane magnetic fields. While the reversal behavior under in-plane fields applied perpendicular to the in-plane exchange bias direction indicates smooth, coherent rotation away from the easy axis, asymmetric magnetic reversal behavior is observed along the easy axis. Reversed domains propagate from the interior of the film laterally outward toward the edges as the free layer magnetization switches into parallel alignment with the pinned synthetic antiferromagnetic reference layer (IrMn/CoFe/Ru/CoFeB). On the other hand, domains propagate from the film edges inward for the free layer transition into antiparallel alignment with the reference layer. These results have important implications for Heusler magnetic tunnel junction device performance.

Interplay Bitwise Operation in Emerging MRAM for Efficient In-memory Computing

In order to realize high efficient magnetization switching in magnetic tunnel junction (MTJ), several potential mechanisms have been realized as the interplay effect to MTJ device, such as the interaction between spin orbit torque-spin transfer torque (STT) and voltage-controlled magnetic anisotropy (VCMA)-STT. The interplay mechanisms have been experimentally explored with improved switching energy efficiency comparing with traditional STT method. Considering the requirement of mixed-precision memory, we propose a novel write-only in-memory computing paradigm based on interplay bitwise operation in two terminal or three terminal MRAM bit-cell, which aims to reduce the layout overhead of peripheral computing circuits, as well as to eliminate read decision failure in the procedure of in-memory computing. Specifically, the proposed write-only bitwise in-memory computing is demonstrated with OR, AND, XOR, full adder operations. Four nonvolatile approximate full adders (AxFAs) are proposed and implemented in different MRAM bit-cells. The AxFAs can be easily reconfigured into memory units with simple connections. Image processing applications are used to demonstrate the in-memory computing, include FA, XOR operation. Comparing with traditional sensing based approach, more than 80% energy reduction is obtained using the proposed interplay writing-only in memory computing with approximation setup. A 61.4% energy reduction is achieved using VCMA mechanism interaction based XOR functions.

High-Throughput/Low-Energy MTJ-Based True Random Number Generator Using a Multi-Voltage/Current Converter

This article introduces high-throughput/low-energy true random number generators (TRNGs) based on CMOS and three-terminal magnetic tunnel junction (MTJ) devices. MTJs are fast and probabilistic switching devices, which can be used as random number sources for TRNGs. However, as the switching probability is quite sensitive to the write current given to MTJs, precise closed-loop control is necessary. Thus, a high-complexity current control circuit is required, such as high precision digital-to-analog converters (DACs), occupying large area and causing large energy dissipation. In order to address the issue, we propose a multi-voltage/current ( $V/I$ ) converter capable of multilevel coarse current switching and fine adjusting within each level. The fine adjusting can be done by DACs with fewer bits, resulting in much smaller size and energy dissipation than a conventional single- $V/I$ converter. In addition, a multiple-writing scheme for three-terminal MTJs is proposed for increasing the throughput while maintaining the write power. The proposed TRNGs are designed using TSMC 65-nm CMOS and a three-terminal MTJ model that achieves a throughput of 333 Mb/s, an energy dissipation of 0.66 pJ/bit and an area of $2040~\mu {\rm m^{2}}$ . This result exhibits a $5\times $ throughput, a 93% energy reduction and an 86% area reduction in comparison with a conventional CMOS/MTJ-based TRNG.

Magnetic Modulation of Terahertz Waves via Spin-Polarized Electron Tunneling Based on Magnetic Tunnel Junctions

Magnetic tunnel junctions (MTJs) are a key technology in modern spintronics because they are the basis of read-heads of modern hard disk drives, nonvolatile magnetic random access memories, and sensor applications. In this paper, we demonstrate that tunneling magnetoresistance can influence terahertz (THz) wave propagation through a MTJ. In particular, various magnetic configurations between parallel state and antiparallel state of the magnetizations of the ferromagnetic layers in the MTJ have the effect of changing the conductivity, making a functional modulation of the propagating THz electromagnetic fields. Operating in the THz frequency range, a maximal modulation depth of 60% is reached for the parallel state of the MTJ with a thickness of 77.45 nm, using a magnetic field as low as 30 mT. The THz conductivity spectrum of the MTJ is governed by spin-dependent electron tunneling. It is anticipated that the MTJ device and its tunability scheme will have many potential applications in THz magnetic modulators, filtering, and sensing.

RETRACTED ARTICLE: Modeling and design of Magnetic Tunneling Junction using MoS2/graphene quantum dots/MoS2 approach

Spintronics is a novel field of research technique used to control the electron spin on the spin-dependent current. From that the Magnetic Tunneling Junction (MTJ) based spintronics plays a significant role because of its extensive application, namely, great scalability, high write speed, and huge relative magnetoresistance. Nevertheless, there is a problem in the fabrication of spintronics-based MTJ devices. Hence, in this paper, a novel efficient approach of MTJ structure is designed to meet the objective of the devices. Therefore, molybdenum disulfide (MoS2)/graphene quantum dots (GQDs)/MoS2 based MTJ structure design is developed for better efficiency with low power consumption. The two-dimensional MoS2 acts as ferromagnetic electrodes in MTJ due to its magnetic properties, and GQD acts as a barrier. Furthermore, the current vs. voltage characteristics for both parallel (P) and anti-parallel (AP) MTJ junctions are estimated; as a result, the MTJ tunnel magnetoresistance (TMR) design is achieved at 1450 % at zero bias voltage. Besides, the effects of spin relaxation and magnetization relaxation are also investigated for expanding the lifetime of the spin. Thus, the stimulated setup outcome shows the effectiveness of the proposed MTJ structure for spintronics, and the results are compared with existing MTJ designs.

Three terminal nano-oscillator based on domain wall pinning by track defect and anisotropy control

The proper understanding of the dynamical properties of magnetization collective modes is a cornerstone for future applications in spintronic devices based on the domain wall (DW) motion. In this work, through micromagnetic simulations and analytical calculations, we study the rotation of a DW pinned by a T-shaped defect on an anisotropic magnetic nanostripe. We show that the competition between the torques produced by the magnetostatic field generated by the T-shaped defect and the applied electric current makes the DW stop at a specific position along the track, and start to turn around the in-plane direction with a specific rotation frequency depending on anisotropy and current density. It is also shown that the distance between the DW position and the T-shaped structure position depends on the anisotropy constant of the nanostripe. Finally, it is proposed as an experimental setting considering that the DW rotation mode can be used to induce the rotation of magnetization of a magnetic nanodisc by a magnetic tunnel junction device. We have then shown that this experimental arrangement can be considered as a three-terminal nano-oscillator.

Thermally Assisted Skyrmion Memory (TA-SKM)

A novel thermally assisted skyrmion memory (TA-SKM) has been proposed and studied for the first time. Unidirectional current-induced spin transfer torque (STT) and Joule heating effect are used to induce the magnetization switching between uniform and skyrmion states in the free layer of a magnetic tunnel junction device. Physics-based simulations suggest that TA-SKM offers advantages including unipolar switching feature for cross-point memory integration, better TMR design as compared to STT-MRAM, and improved operation temperature range as compared to TA-MRAM.

Monitoring Aging Defects in STT-MRAMs

Identifying manufacturing defects in magnetic tunnel junction (MTJ) device is crucial for the yield and reliability of spin-torque-transfer (STT) magnetic random-access memory (MRAM) arrays. Several of the MTJ defects result inparametric deviations of the device that deteriorate over time. In this article, we present the design-for-testability (DFT) scheme for monitoring the electrical parameter deviations occurring due to the defect formation over time. A programmable DFT scheme was implemented for a subarray in 65-nm CMOS technology to evaluate the feasibility of the test scheme. The scheme utilizes the read sense path to compare the bit-cell electrical parameters against known DFT cell’s characteristics. Built-in-self-test (BIST) methodology is utilized to trigger the onset of the fault once the device parameter crosses a threshold value. We demonstrate the operation and evaluate the accuracy of detection with the proposed scheme. The DFT scheme can be exploited for monitoring aging defects, modeling their behavior and optimization of the fabrication process.

Study of precessional switching speed control in voltage-controlled perpendicular magnetic tunnel junction

We study the characteristics of the precessional switching induced by voltage control of magnetic anisotropy (VCMA) in back-end-of-line (BEOL)-compatible perpendicular magnetic tunnel junction devices. Using micromagnetic simulation, we find three operation regimes differentiated by zero excess energy, lower boundary, zero energy barrier, and upper boundary. Experimentally, the switching speed (fs) is characterized by two phases: non-precession and acceleration. Non-precession is a thermal mediated phase, where fs cannot be deduced, while in acceleration, both the higher electric field (EF) and in-plane field (Bx) increase fs progressively. We find that the intrinsic thresholds can be retrieved by linear extrapolation of fs as a function of EF. Those thresholds and experimental results are in good agreement with the simulation. In addition, we numerically calculate the characteristic switching speed of 2γ*mz*Bx and verify it experimentally. This work provides insights into the VCMA-induced precessional switching, including detailed understandings of the switching mechanism and modeling of switching speed for reliable write duration control for practical applications.

Nonvolatile Low-Cost Approximate Spintronic Full Adders for Computing in Memory Architectures

In this article, four novel approximate full-adder (AXFA) circuits based on the emerging magnetic tunnel junction (MTJ) device is proposed. The proposed magnetic FAs (MFAs) offer full nonvolatility, low area, and considerably lower energy consumption than their previous counterparts. Also, two of the proposed MFAs have the advantage of single event upset (SEU) tolerance. Simulation results reveal that the proposed designs offer over 50% energy efficiency in comparison with the considered previous fully nonvolatile MFAs. Using the proposed adders in the design of an approximate Gaussian filter, we showed that the filtered noisy images have almost the same results as the accurate Gaussian filter. The proposed MFAs have an accurate carry-out output and an approximate sum output with an error distance of 2.

Defect and Fault Modeling Framework for STT-MRAM Testing

STT-MRAM mass production is around the corner as major foundries worldwide invest heavily on its commercialization. To ensure high-quality STT-MRAM products, effective yet cost-efficient test solutions are of great importance. This article presents a systematic device-aware defect and fault modeling framework for STT-MRAM to derive accurate fault models which reflect the physical defects appropriately, and thereafter optimal and high-quality test solutions. An overview and classification of manufacturing defects in STT-MRAMs are provided with an emphasis on those related to the fabrication of magnetic tunnel junction (MTJ) devices, i.e., the data-storing elements. Defects in MTJ devices need to be modeled by adjusting the affected technology parameters and subsequent electrical parameters to fully capture the defect impact on both the device's electrical and magnetic properties, whereas defects in interconnects can be modeled as linear resistors. In addition, a complete single-cell fault space and nomenclature are defined, and a systematic fault analysis methodology is proposed. To demonstrate the use of the proposed framework, resistive defects in interconnect and pinhole defects in MTJ devices are analyzed for a single 1T-1MTJ memory cell. Test solutions for detecting these defects are also discussed.

Single-shot dynamics of spin-orbit torque and spin transfer torque switching in three-terminal magnetic tunnel junctions.

Current-induced spin-transfer torques (STT) and spin-orbit torques (SOT) enable the electrical switching of magnetic tunnel junctions (MTJs) in non-volatile magnetic random access memories. To develop faster memory devices, an improvement in the timescales that underlie the current-driven magnetization dynamics is required. Here we report all-electrical time-resolved measurements of magnetization reversal driven by SOT in a three-terminal MTJ device. Single-shot measurements of the MTJ resistance during current injection reveal that SOT switching involves a stochastic two-step process that consists of a domain nucleation time and propagation time, which have different genesis, timescales and statistical distributions compared to STT switching. We further show that the combination of SOT, STT and the voltage control of magnetic anisotropy leads to reproducible subnanosecond switching with the spread of the cumulative switching time smaller than 0.2 ns. Our measurements unravel the combined impact of SOT, STT and the voltage control of magnetic anisotropy in determining the switching speed and efficiency of MTJ devices.

Energy-efficient magnetic 5:2 compressors based on SHE-assisted hybrid MTJ/FinFET logic

Energy dissipation in integrated circuits has become a matter of grave concern. Various approaches at different levels of abstraction such as logic-in-memory structures based on magnetic tunnel junction (MTJ) devices and approximate computing can be employed to reduce energy consumption. Efficient hybrid MTJ/FinFET designs for exact and approximate 5:2 compressors are proposed herein. The proposed designs use the spin Hall effect (SHE)-assisted writing method to store data in MTJs, which significantly improves the energy efficiency of the MTJ switching as compared with the conventional spin transfer torque (STT) method. The circuits are simulated in HSPICE using 7-nm FinFET and SHE perpendicular MTJ models. The results indicate that the proposed approximate designs provide significant improvements in terms of energy consumption and device count compared with their exact counterpart. The first and second proposed approximate designs improve the power consumption by 51%, read delay by 16% and 26%, and transistor count by 63% and 70%, respectively, as compared with the exact design. The second approximate compressor offers a significantly lower error rate (27% versus 48%) in comparison with the first approximate design, as well as better performance parameters. The imprecise 5:2 compressors are used in image processing applications to assess their accuracy metrics. Comprehensive MATLAB simulations indicate that the proposed approach provides great capabilities for image processing applications considering various accuracy and quality metrics.

A Low-Cost Highly Reliable Spintronic True Random Number Generator Circuit for Secure Cryptography

Generation of random numbers is one of the most important steps in cryptographic algorithms. High endurance, high performance and low energy consumption are the attractive features offered by the Magnetic Tunnel Junction (MTJ) devices. Therefore, they have been considered as one of the promising candidates for next-generation digital integrated circuits. In this paper, a new circuit design for true random number generation using MTJs is proposed. Our proposed circuit offers a high speed, low power and a truly random number generation. In our design, we employed two MTJs that are configured in special states. Generated random bit at the output of the proposed circuit is returned to the write circuit to be written in the relevant cell for the next random generation. In a random bitstream, all bits must have the same chance of being “0”or “1”. We have proposed a new XOR-based method in this paper to resolve this issue in multiple random generators that produce truly random numbers with a different number of ones and zeros in the output stream. The simulation results using a 45[Formula: see text]nm CMOS technology with a special model of MTJ validated the advantages offered by the proposed circuit.

NVRH-LUT: A nonvolatile radiation-hardened hybrid MTJ/CMOS-basedlook-up table for ultralow power and highly reliable FPGA designs

Complementary metal oxide semiconductor (CMOS) downscaling leads to various challenges, such as high leakage current and increase in radiation sensitivity. To solve such challenges, hybrid MTJ/CMOS technology-based design has been considered as a very promising approach thanks to the high speed, low power, good scalability, and full compatibility of magnetic tunnel junction (MTJ) devices with CMOS technology. One important application of MTJs is the efficient utilization in building nonvolatile look-up tables (NV-LUTs) used in reconfigurable logic. However, NV-LUTs face severe reliability issues in nanotechnology due to the increasing process variations, reduced supply voltage, and high energetic particle strike at sensitive nodes of CMOS circuits. This paper proposes a nonvolatile radiation-hardened look-up table (NVRH-LUT) for advanced reconfigurable logic. Compared with previous works, the proposed NVRH-LUT is fully robust against single-event upsets and also single-event double-node upsets that are among the main reliability-challenging issues for NV-LUTs. Results have shown that NVRH-LUT not only provides increasing reliability and reduced bit error rate but also offers low delay and low energy consumption.

Tunnelling magnetoresistance and spin filtration effect in functionalized graphene sheet with CrO2 as electrode: An ab-initio study

Spin-dependent transport behavior of functionalized graphene sheet with CrO2 as half-metallic magnet (HMM) electrodes are explored using DFT (density functional theory) in a combination with non-equilibrium Green’s function formalism (NEGF). Functionalized graphene sheet with Hydrogen and Fluorine atoms are examined as ultra-thin tunnel barriers in the magnetic tunnel junction devices. Computations based on the DFT for functionalization of graphene sheet with H and F atoms show opening of the band gap in the graphene sheet. A band gap opening of 3.53 eV, 3.16 eV, and 2.64 eV have been observed when Graphene sheet is functionalized with H atoms on both sides, F atoms on both sides, and both F and H atoms on each side of the graphene sheet respectively. The results of all the three functionalized graphene sheet configurations have been compared. On comparison of the results for the three configurations, it is observed that a large value of tunneling magnetoresistance (TMR) around 344 × 103% is obtained for the H-Graphene-F device configuration. This suggests that the H-Graphene-F device configuration acts as a perfect ultra-thin insulating barrier for the spin-based devices. Negative differential resistance (NDR) behavior have been observed for F-Graphene-F and H-Graphene-F device configurations in parallel magnetization (PM) case. All the three configurations show perfect spin filtration efficiency of around 100%. Applied voltage dependent transmission spectrum have been plotted for all the three device configurations to validate the current-voltage behaviour. These unique and interesting nature of all the three devices suggest their applications in spintronics domain.

Reduced Exchange Interactions in Magnetic Tunnel Junction Free Layers with Insertion Layers

Perpendicularly magnetized CoFeB layers with ultra-thin non-magnetic insertion layers are very widely used as the electrodes in magnetic tunnel junctions for spin transfer magnetic random access memory devices. Exchange interactions play a critical role in determining the thermal stability of magnetic states in such devices and their spin torque switching efficiency. Here the exchange constant of free layers incorporated in full magnetic tunnel junction layer stacks, specifically CoFeB free layers with W insertion layers is determined by magnetization measurements in a broad temperature range. A significant finding is that the exchange constant decreases significantly and abruptly with W insertion layer thickness. The perpendicular magnetic anisotropy shows the opposite trend; it initially increases with W insertion layer thickness and shows a broad maximum for approximately one monolayer (0.3 nm) of W. These results highlight the interdependencies of magnetic characteristics required to optimize the performance of magnetic tunnel junction devices.