In this paper, we propose and simulate a novel structure of a double source and U-shaped gate tunnel field effect transistor (DS-UTFET) with an n buffer layer and n+ SiGe pocket. In order to reduce the OFF-state current, there is an n buffer layer under the n+ SiGe pocket in a sandwich stack; moreover, we use a source region overlap in both the vertical and lateral directions to enhance the electric field; as a result, considerable ON-state current and a high Ion/Ioff ratio are realized in the proposed structure. In our simulation, the DS-UTFET shows better performance than the UTFET, and the simulation results indicate that the ON-state currents of the DS-UTFET with and without an n buffer layer increase up to 2.52 × 10−4 A/μm and 2.47 × 10−4 A/μm, respectively, and the average subthreshold swing of the DS-UTFET with and without an n buffer layer is 35.0 mV/dec and 52.7 mV/dec, respectively, which ensures that the DS-UTFET has a fine analog and logic feature for applications; moreover, the maximum gm of the DS-UTFET with and without an n buffer layer is 519 µS/μm and 493 µS/μm at 1.4 V drain-to-source voltage (Vds). In addition, the RF performance of devices depends on the cut-off frequency (fT) and gain bandwidth (GBW), and the DS-UTFET with and without an n buffer layer could achieve a maximum fT of 25.7 GHz and 22.5 GHz, respectively. Meanwhile, the DS-UTFET with and without an n buffer layer could achieve a maximum GBW of 3.56 GHz and 3.06 GHz, respectively.