Abstract
In this paper, a Gate-Stacked Tunnel Field Effect Transistors (GS-TFET) with Gate-All-Around (GAA) nanowire structure has been proposed. It has been designed with an objective to reduce leakage current and to maintain high Ion/Ioff ratio. The simulations were carried out for Double Gate TFET (DG-TFET), GAA-TFET, and GS-GAA-TFET on basis of which comparison of Ion/Ioff ratio has been drawn. The operation of the device is studied by the means of three-dimensional computer simulations on TCAD. The dielectric value of the material used to form gate oxide is an imperative factor to regulate the performance measure of Ion/Ioff ratio. In the proposed architecture, nitride has been stacked on silicon dioxide as the dielectric material. Nitride is easier to develop as stack on silicon dioxide as compared to other high-k dielectric materials. The design has yield good results and the value of OFF state current has been significantly reduced to the order of atto-amperes per micrometer (10−18 A/µm). A minimum point sub-threshold slope of 10 mV/decade has been achieved by this device. For a channel length of 30 nm, an improved Ion/Ioff ratio has been observed which is of the order 1012. Results emphasized that TFET can be used to replace MOSFETs in low power high-speed switching circuits.
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