GaAs Field-effect Transistors Research Articles

A comparison of the trap properties and locations within GaAs field effect transistors measured under different bias conditions

The activation energy and capture cross section of traps found in GaAs field effect transistors (GaAs FETs) have been measured with both ohmic channel and current saturation bias using a variety of transient, frequency dispersion, and noise spectroscopy techniques. With current saturation bias these effects have been seen in both the transconductance and the output conductance. The results for all methods and bias conditions are compared with those found by others. The relative sensitivity of the techniques and the location of the traps are discussed.

Measurements of time-domain voltage/current waveforms at RF and microwave frequencies based on the use of a vector network analyzer for the characterization of nonlinear devices-application to high-efficiency power amplifiers and frequency-multipliers optimization

A new time-domain waveform measurement system based on the combination of an harmonic source and load-pull setup with a modified vector network analyzer (VNA) is presented. It allows the visualization, the measurement, and the optimization of high-frequency currents and voltages at both ports of nonlinear microwave devices. Measurements of GaAs field effect transistor (FET's) and GaInP/GaAs heterojunction bipolar transistor (HBT's) at L-band were performed to demonstrate the great capabilities of the system. On one hand, voltage and current waveforms at both ports of transistors, working as power amplifiers, were optimized for maximum power-added efficiency. On the other hand, time-domain waveforms of transistors operating as frequency multipliers were optimized for maximum conversion gain. Such results prove the capabilities offered by this new nonlinear time-domain measurement system to aid in designing optimized power amplifiers or frequency multipliers. They also provide valuable information for nonlinear transistor model validation.

Novel low-cost, low-power modulator/demodulator using a single GaAs field effect transistor

A novel type of transponder circuit for localisation and identification purposes is presented. The complete circuit contains only one semiconductor device, a ‘cold’ field effect transistor, which performs both the modulator and the demodulator functions. This makes possible the realisation of a low-cost, low-power, high-performance 10 GHz transponder in miniature format. The design of the circuit makes use of simple and reliable methods for the modulator function. The demodulator is a FET detector, which exploits the nonlinear channel resistance of the transistor instead of the Schottky barrier. A theory of this type of detector is given.

Broad-band power amplifier using dielectric photonic bandgap structure

Two class AB GaAs field-effect transistor (FET) power amplifiers have been designed and fabricated in the 4.4-4.8 GHz range. In the first case, a dielectric PBG line was incorporated in the design to tune the second harmonic. In the second case, a 50-/spl Omega/ line is used with no harmonic tuning. The PBG structure allows broad-band harmonic tuning and is inexpensive to fabricate. A 5% improvement in power-added efficiency was achieved at the design frequency of 4.5 GHz, in both simulation and measurement.

A single-chip 2.4-Gb/s CMOS optical receiver IC with low substrate cross-talk preamplifier

A single-chip 2.4-Gb/s CMOS optical-receiver IC has been realized for the first time using 0.15-/spl mu/m gate bulk CMOS. The chip integrates a preamplifier, an automatic gain control, a phase-locked loop, and a 1:8 demultiplexer. This circuit has achieved a low power consumption of 104 mW (at 2.4 Gb/s, V/sub D/D=2 V), which is much smaller than that of conventional GaAs field-effect transistors and Si bipolar IC's. The design methodology to reduce digital-to-analog substrate cross-talk noise is discussed. Using this methodology, a low-cross-talk sensitive preamplifier circuit with a 5.9 GHz bandwidth and a 59-dB/spl Omega/ gain has been developed and integrated into a single-chip receiver IC.

A new extraction method to determine bias-dependent source series resistance in GaAs FET's

A new method is proposed to determine bias-dependent source resistances for GaAs field-effect transistors (FET's). This method, which is a cold-FET measurement technique, utilizes the relations between the real part of the two-port impedances transformed from the measured S-parameters and their algebraic derivatives. It is based on the fact that the algebraic derivatives of the two-port resistances result in the simple form at the normal cold-FET condition. A bias-independent gate resistance is extracted at the pinched-off cold-FET condition to fulfill necessary and sufficient conditions in extraction. The proposed method is a direct measurement because only algebraic calculation is required, and it is general enough to need only one assumption of the laterally symmetric channel-doping profile. The deleterious results of dispersion (frequency dependence) and negative value in source resistances at the pinched-off cold-FET condition are explained by the effects of the leakage current and the on-wafer pad parasitics, respectively. The problem of deviation of /spl alpha//sub 21/ and /spl alpha//sub 12/ from 0.5 at the normal cold-FET condition is also resolved by deembedding the on-wafer pad parasitics. This method allows one to extract bias-dependent source resistances for GaAs FET's.

A design approach for mass producible high-bit-rate MMIC transimpedance amplifiers

A full design approach for developing very highspeed transimpedance amplifier (TIA) monolithic microwave integrated circuits (MMICs) to be economically produced in large quantities is described. As an application example, the letter reports design, experimental performances, yield, and size data for a 5-Gb/s MMIC TIA using a low-cost 0.5-μm GaAs field-effect transistor (FET) technology, showing outstanding experimental performances and optimized for a large-volume industrial production.

Pd–Ge–Au Based Hybrid Ohmic Contacts to High-Low Doped GaAs Field-Effect Transistor

Effects of an intermediate layer, such as Mo or Ti, have been studied for developing Pd–Ge–Au based hybrid ohmic contacts in a high-low doped GaAs metal-semiconductor field-effect transistor (MESFET). The Pd–Ge–Au contact without the intermediate layer produces an alloyed AuGe contact at a high annealing temperature above 400° C. When Mo is added between Pd/Ge and Au, nonspiking Pd/Ge contact is formed at a low annealing temperature of 300° C. The addition of Ti, however, results in an ohmic contact with a low resistance of 0.43 Ω· mm in a wide annealing temperature ranging from 340 to 420° C. Auger depth profile and X-ray diffraction results suggest that the low resistance of the Pd/Ge/Ti/Au ohmic contact is due to formation both the Pd/Ge contact and AuGe contact through the appropriate control of Au indiffusion by Ti. The MESFET with the Pd/Ge/Ti/Au contact displays good DC characteristics. This supports that the Pd/Ge/Ti/Au contact is well suitable for application to high-low doped GaAs MESFETs due to its low-resistance and wide-process-window.

High Responsivity in an Optically Controlled Field-Effect Transistor Using the Direct Wafer Bonding Technique

An optically controlled field-effect transistor (FET) in which the GaAs FET region and the GaInAs/InP light absorption region were directly bonded is demonstrated. This device offers high optical- to-electrical conversion efficiency. In this work, we report the electrical and optical characteristics of this device based on the direct wafer bonding technique. The bonding temperature dependence on the device characteristics and responsivity characteristics were also measured. As a result, we achieved a high responsivity of more than 150 A/W.

High-efficiency power amplifier integrated with antenna

Two class B GaAs field-effect transistor (FET) power amplifiers integrated with patch antennas have been designed and fabricated at 2.48 GHz. Both amplifiers are integrated with patch antennas, which serve as load and radiator. In one case, a standard patch design was used with random harmonic termination. In another case, a modified patch design was used, which allows the tuning of the second harmonic. In this case the antenna has an additional function of a filter. An increase of 7% in the power-added efficiency (PAE) and 0.5 dB in the output power was achieved through the second harmonic tuning.

Depletion mode optoelectronic modulation spectroscopy

The depletion mode of opto-electronic modulation spectroscopy (OEMS), spectroscopically senses the electrical response to wavelength modulated monochromatic illumination as trap states in the depletion region of a semiconductor device are cyclically excited. The method is demonstrated using metal–Si3N4–GaAs field-effect transistors in which the charge in the gate depletion region is detected through its effect on the channel current. The optical transition energies of trap levels were revealed and the charge exchange mechanisms identified unambiguously by examining the phase of the detected signal with reference to the phase of the photon energy variation. In-phase responses originate from electron trap states while responses of opposite sign derive from hole traps. Many of the states corresponded closely in energy with ones previously reported in vapor-phase-epitaxy GaAs materials. Charge exchange with energetically discrete and continuously distributed traps is theoretically described when they are excited by photons having periodic energy modulation. The results indicate that the magnitude and phase of the OEMS response spectra are determined by the relative thermal and optical emission rates of trapped charges. Deep level transient spectroscopy (DLTS) measurements made on the same samples could not reveal the responses of bulk levels that the OEMS technique showed were present; this was because the DLTS spectra were dominated by the interface continuum response. This illustrates clearly an important advantage of the technique. The method is equally applicable to other devices in which a space-charge region regulates the channel current.

The effect of traps at the free surface of GaAs field effect transistors

In a GaAs field effect transistor there are ungated sections of the channel between the gate and the source/drain. The static characteristics and the transients which occur in various parameters after a change in the bias voltages can be shown to be affected by the surface potential in this region. A model is proposed for these effects which involves a surface region with lower effective energy gap. The gate current leakage characteristics and conductance deep level transient spectroscopy measurements on single and dual gate devices are consistent with this model.

A low-resistance Pd/Ge/Ti/Au ohmic contact to a high-low doped GaAs field-effect transistor

Pd/Ge/Ti/Au ohmic contacts have been studied for application to high-low doped GaAs metal-semiconductor field-effect transistors (MESFETs). The interfacial reaction of the Pd/Ge/Ti/Au contact is investigated using X-ray diffraction, Auger depth profile, and transmission electron microscopy. The good Pd/Ge/Ti/Au ohmic contact with the lowest contact resistivity of 2.8 × 10 −6 Ωcm 2 is obtained after annealing at 340 °C, which is two times lower than that of the Pd/Ge contact. This is due to formation of AuGa through fast in-diffusion of Au toward the GaAs substrate. The AuGa compound enhances creation of more Ga vacancies, followed by incorporation of Ge into the Ga vacancies, and it allows the contact to be formed directly on the buried high-doped GaAs layer. The MESFET with the Pd/Ge/Ti/Au ohmic contact displays good d.c. characteristics. This supports the fact that the Pd/Ge/Ti/Au ohmic contact is well suitable for application to high-low doped GaAs MESFETs due to its low-resistance characteristics and good surface morphology.

Low-temperature grown GaAs insulators for GaAs FET applications

Low-temperature (LT) grown GaAs in either an as-grown or annealed condition has been used as a gate dielectric for GaAs field effect transistors (FET). It was found that both types of LT GaAs layers can effectively passivate the device surface states, eliminate hysteresis and light induced effects, and dramatically increase the breakdown voltage, , between source and drain contacts of the FETs. was found to increase on cooling the as-grown LT GaAs FET with a low activation energy, typically for the corresponding reverse bias gate current. However, for the annealed LT GaAs FET, decreased with decreasing temperature and the fixed reverse bias gate current showed a large activation energy . A large gate-lag and kink effect was observed from the annealed LT GaAs FETs, but was insignificant for the as-grown LT GaAs FETs. The superior performance of the as-grown LT GaAs FETs is attributed to the high degree of hopping conductivity found, and the high breakdown characteristic of the as-grown LT GaAs. The high density of defects and the trap-like nature of the As/GaAs clusters in annealed LT GaAs layer are believed to be responsible for the transient behaviour and large values of activation energy found in the annealed LT GaAs FETs.

Comparative Study of C–V and Transconductance of a Si δ-Doped GaAs FET Structure

Anomalous peaks/dips have been found in the transconductance vs gate voltage characteristics of a Si δ-doped GaAs FET (Field Effect Transistor) at 4.2 K. Comparing the characteristics with the C-V concentration as a function of the gate voltage, the origin of the oscillatory behaviour is attributed to the intersubband scattering in the δ-doped layer.

Performance comparison between multiple-quantum-well modulator-based and vertical-cavity-surface-emitting laser-based smart pixels

We compared multiple-quantum-well modulator-based smart pixels and vertical-cavity-surface-emitting laser (VCSEL) based smart pixels in terms of optical switching power, switching speed, and electric-power consumption. Optoelectronic circuits integrating GaAs field-effect transistors are designed for smart pixels of both types under the condition that each pixel has an optical threshold and gain. It is shown that both types perform maximum throughput of ~3 Tbps/cm(2). In regard to design flexibility, the modulator type is advantageous because switching time can be reduced by supplying large electric power, whereas switching time and electric-power consumption are limited to larger than certain values in the VCSEL type. In contrast, in regard to optical implementation, the VCSEL type is advantageous because it does not need an external bias-light source, whereas the modulator type needs bias-light arrays that must be precisely located because the small modulator diameter, <10 µm, is essential to high-speed operation. A bias-light source that increases the total power consumption of the system may offset the advantages of the modulator type.

Analytical method for determining equivalent circuit parameters of GaAs FETs

An analytical method has been developed that gives a simple and practical means of extracting small-signal equivalent circuit parameters (ECPs) of GaAs FETs with negligibly small bond-pad capacitances. Only the S-parameter measurement of the pinched-off cold field-effect transistor (FET) is enough to determine the extrinsic FET ECPs. The intrinsic FET ECPs of a medium-power Ku-band GaAs FET chip with a total gate width of 800 /spl mu/m have been analytically extracted for two types of eight-element intrinsic FET models; Model 1 (Curtice model) and Model 2 that differ in the control voltage (V/sub G/) definition. Model 2 with V/sub G/ defined across the gate-source capacitance is found more appropriate judging from the smaller frequency dependence of the ECPs and a better agreement between the calculated and measured S-parameters over 2-20 GHz.

Investigation of the electron transfer characteristics in multi-δ-doped GaAs FET's

GaAs field-effect transistors (FET's) utilizing multiple /spl delta/-doping profiles to generate different shape of equivalent channels were demonstrated. The proposed structures containing three different triple-/spl delta/-doping profiles were grown by low-pressure metalorganic chemical vapor deposition (LP-MOCVD). The theoretical and experimental results in the triple-/spl delta/-doped GaAs structures exhibit much superior device performance than that of conventional uniform-doped GaAs structure. Besides, the proposed structures with graded-like /spl delta/-doping profiles show significantly improved linearity of transfer characteristics when compared to that without graded-like triple-/spl delta/-doping structure. The structure also revealed an extrinsic transconductance as high as 180 mS/mm for a gate length of 2 /spl mu/m.

Effects of irradiation on the Noise and DC performance of transistors and preamplifiers based on GaAs technology

We report measurement results with single GaAs field effect transistors and monolithic CHFET based operational amplifiers in GaAs technology. All the devices have been exposed to neutron irradiation (1MeV) with a total fluence of 10 15 n/cm 2 . The amplifiers considered here had already been irradiated either with photons from a 60 Co souce for a 100 Mrad dose or with 10 14 n/cm 2 neutrons. All devices remain fully functional after irradiation. We compare their amplification and noise parameters before and after the (additional) exposure of 10 15 n/cm 2 .

Effects of irradiation on the noise and DC performance of transistors and preamplifiers based on GaAs technology

We report measurement results with single GaAs field effect transistors and monolithic CHFET based operational amplifiers in GaAs technology. All the devices have been exposed to neutron irradiation (1MeV) with a total fluence of 10 15 n/cm 2 . The amplifiers considered here had already been irradiated either with photons from a 60 Co souce for a 100 Mrad dose or with 10 14 n/cm 2 neutrons. All devices remain fully functional after irradiation. We compare their amplification and noise parameters before and after the (additional) exposure of 10 15 n/cm 2 .