Electron Beam Exposure System Research Articles

Reduced aberrations in an electron matrix lens through the use of offset apertures

A design method for a low aberration matrix lens is developed. The matrix lens consists of an electrostatic lens array and beam limiting aperture array located outside of the lens array. It is shown that off‐axial aberrations, which are dominant in the outer lenses, can be reduced by shifting the aperture from the optical axis of each lens to its optimum position. Using this aperture shift effect, a low aberration matrix lens consisting of einzel lenses is designed for submicron electron beam exposure systems. An aberration of 0.1 μm is predicted for a 40 mm2 matrix lens with a beam half‐angle of 5 mrad.

Grating lenses for the semiconductor laser wavelength

Off-axis grating lenses and astigmatic grating lenses, designed for semiconductor laser wavelengths, have been fabricated by an electron-beam (EB) exposure system. High N.A. off-axis grating lenses with near-diffraction-limited operation were obtained. Grating lenses with a complex function, such as astigmatic lenses, are also available by EB lithography.

Fabrication of x-ray zone plates with a minimum zone width smaller than 100nm by electron beam lithography

A partial transmission Fresnel zone plate (PT-FZP), a new kind of modified zone plate, in which part of the normally transparent zones is transparent, is proposed. The resolution of PT-FZP is shown to be nearly the same to that of the normal zone plate. In PT-FZP, the distance between transparent zones can be set large so that a zone plate with very high resolution can be fabricated by electron beam lithography because the proximity effect due to electron scattering in a resist layer can be reduced. Part of the PT-FZP pattern of 100nm thick gold with a zone width of 25nm can be obtained by a 50keV electron beam exposure system.

A comprehensive sequence for the electron beam exposure system: Terrence E. Zavecz Solid St. Technol., 106 (February 1982)

A comprehensive sequence for the electron beam exposure system: Terrence E. Zavecz Solid St. Technol., 106 (February 1982)

A high-speed, high-precision electron beam lithography system (electron optics)

A variably shaped electron beam exposure system HL‐600 has been developed for both direct wafer writing and mask making. It was designed as a high‐throughput tool to cover lithography requirements down to a 0.5 μm linewidth. To achieve this high‐throughput capability, many newly developed techniques were adopted in the electron optics and in the control electronic circuits. The simplified electron beam column consists of only four magnetic lenses. The magnetic deflection for main field scanning was enlarged so as to reach up to 6.5 mm sq in order to reduce the overhead time associated with work stage movement. In addition, the design of an objective lens system with a small aberration, and an algorithm for deflection aberration correction were developed. Automatic measurement of defocusing and astigmatism aberrations at a number of sample points were performed by taking through focusing, and the third order polynomial correction function of deflection was determined. As a result, the edge resolution for the 2 μm sq beam was less than 0.2 μm over a 6.5 mm sq field. The column uses a flat‐top‐type LaB6 electron gun with high brightness and large emittance. Although the maximum beam size and current density were limited by Coulomb blurring, the gun realizes a 6.4 μm sq size and 10 A/cm2 density at the same time. It typically has a 5000 h lifetime. This HL‐600 is capable of writing more than ten 4 in. wafers per hour on the average. In addition to a summary of the HL‐600 system, this paper describes details concerning the novel techniques in optics and some exposure results.

Waveguide grating lenses for optical couplers

New waveguide grating lenses for coupling a guided wave to a spherical wave, focusing in the air, have been designed. The lenses have the advantages. of high efficiency and high practicability for fabrication. Chirped and curved grating lenses were fabricated on PMMA waveguides by an electron beam exposure system.

High‐precision automatic ellipsometer and whereby evaluation of a very thin silicon‐oxide layer

AbstractTo measure automatically both the thickness and the refraction of films of several tens of angstroms, e.g., a barrier oxide for MNOS memory with high precision, a high‐speed automatic ellipsometer has been developed which can measure accurately the extinction positions of polarizer and analyzer. Hence, the polarizer/analyzer extinction positioning accuracy of 1 × 10−4 degrees has been obtained in the repeatability test during the same sample measurements. By aligning and calibrating many optical components, a perfect extinction has been obtained in crossed Nicols with a quarterwave plate (PCA). For the position detection, the optical encoder scales drawn by electron beam exposure system are read by a laser beam detector, resulting in positioning accuracy of 10−4 degrees. Next, an example is shown where the thickness of a native oxide formed on a silicon wafer is measured by this system. the possibility is shown of evaluating the oxide surface roughness with the standard deviation around the average thickness from the polarizer/analyzer extinction curve, the measured extinction factor, and the deduced value from the oxide model.

Fabrication of large area masks by photocomposition

Photomasks are fabricated using different methods starting from rubylith coordinatography to electron beam exposure systems. Masks are used for different kinds of devices with different tolerances and requirements. Therefore, certain methods are preferred over others for specific devices. In this paper, a method of photomask fabrication is discussed in which a step-and-repeat camera is used to compose an accurate mask geometry containing long fine lines by using several very simple reticles. The procedure along with the different options available have been described. The main advantage here is that butting and overlap errors can be reduced substantially.

Fabrication of ECL gate arrays on quick turn-around line

A quick turn-around line (QTL) technology, including a high-speed on-line data system, electron-beam direct writing, and dry process technologies are described in this paper. Electron-beam pattern data is converted by a VAX 11/780 and transmitted to the electron-beam exposure system (EBES) through a communication controller at the speeds of 1 Mbits/s. After various data manipulations, patterns are quickly written directly on wafers. The first metal layer using an Al-Si-Cu alloy is etched in a reactive ion beam etcher with carbon tetrachloride (CCl 4 ). In order to avoid the charge-up phenomenon of the electron beam, the surface of the silicon nitride (SiN) interlevel insulation layer is coated with a thin conductive layer of TiW. TiW/SiN layers are successively etched by the reactive ion etching (RIE) with CF 4 + O 2 (2%). The damage induced by electron-beam irradiation on the device is perfectly annealed out with a 450°C anneal. Bias-temperature tests have been performed on various logic circuits used in a main frame computer.

Technologies for electron beam direct writing

Development time of semiconductor devices which have a large volume of pattern data and fine feature size can be remarkably reduced by a high speed on-line system and an erase electron beam direct writing technology. Pattern data which is performed by a CAD system is converted by a VAX/780 and transmitted to an electron beam exposure system (EBES) through a communication controller at the speed of 1 Mbit/sec. Overlay accuracy less than 0.2 μm is obtained by scanning the alignment marks located at the periphery of a silicon wafer. The marks are fabricated by etching the silicon substrate to 2 μm depth. Radiation effects induced by electron beam irradiation is examined by Monte Carlo simulation. In production of ECL (emitter coupled logic) gate arrays using electron beam direct writing technology, the surface of the silicon nitride (SiN) interlevel insulation layer is coated with a thin conductive layer of TiW in order to avoid the charging phenomenon and the radiation damage caused by electron beam irradiation.

A large angle electrostatic deflection, variable shaped, electron beam exposure system

In electron beam direct writing, a capability of ‘‘one chip within one deflection field’’ can reduce time wasted in stage moving, and eliminate field stitching errors in a chip. These advantages lead to high throughput and high overlay accuracy for successful VLSI fabrications. A large angle electrostatic deflection, variable shaped, electron beam exposure system (EB57) has been developed to achieve this capability. The key EB57 technologies are a large angle electrostatic deflection and high speed deflection control. Newly developed multiple electrostatic deflectors were designed using an in‐lens, dual channel deflection method. In this method, two types of field and subfield deflectors are equipped inside a projection lens. Deflectors free of third and fifth θ components can provide a large angle of deflection with a 10 mm2 field. 18‐bit digital‐to‐analog converters, and ±800 V amplifiers effect this large field deflection. The high breakdown voltage for the amplifiers is attained by connecting vertical power MOSFETs in series. The settling time of the amplifiers is less than 10 μs at 1/64 full scale. Amplifiers for subfield scanning and beam shaping have a 250 ns settling time at full scale. To correct chip distortions, deflection distortions, and stage positioning errors, a new data correction method that takes rounding off errors into consideration has been applied to a high speed arithmetic unit. This EB57 system can write from 7 to 10 4‐in. wafers per hour with 0.5 μm lithography.

A comprehensive test sequence for the electron beam exposure system : Terrence E. Zavecz. Solid St. Technol., 106 (February 1982)

A comprehensive test sequence for the electron beam exposure system : Terrence E. Zavecz. Solid St. Technol., 106 (February 1982)

Mask fabrication for VLSI using an electron beam exposure system

This study describes the results of feature size distribution, pattern location accuracy, and level-to-level registration error on chrome master masks fabricated by an Ee−BES-40 electron beam exposure system. The system has the capability of high speed electron beam blanking at 40 MHz, the capacity for large size masks (with 6 in. mask cassettes), and an automatic cassette handling system. OEBR-100 (PGMA), as the electron beam negative resist, is used for 5 and 6 in. chrome masks. Both wet processing and dry plasma technology are used for chrome etching. Test patterns and 64 K DRAM TEG, as the practical pattern, are used in this study. More than 40 measurements are taken, uniformly distributed over 96 and 112 mm squares, and the feature size distribution is measured by a laser interferometer x–y measuring system. Pattern location accuracy and level-to-level registration error are obtained using the Ee−BES-40 quality assurance programs called market and plotmarket. market operates by scanning over the resist image of the test pattern, utilizing the normal fiducial mark location hardware. The following results are obtained: (1) Feature size distribution within the 6 in. mask: ±0.1 μm, (2) Level-to-level registration error: less than 0.1 μm. High quality masks with about 0.02 defects/cm2, and rapid throughput of ten masks in 6 h using the automatic ten cassette handling system are obtained.

Electron-beam lithography three-mark silicon automatic registration and its capabilities for process distortion compensation

Submicron e-beam lithography requires that successive levels be accurately registered to each previously processed pattern on a wafer. Using a Perkin–Elmer manufacturing electron-beam exposure system (MEBES)R, we estimate the ability of an automated three-mark registration system to correct for distortion created by typical silicon processing. The results show that this registration system is capable of tracking process-induced distortions typically to within 0.15 μm everywhere on 64-mm-diam silicon wafers.

The effect of extra doses at the pattern edges on negative electron resist profiles

Theoretical and experimental studies have been performed to improve a quality of negative electron resist patterning of an infinite array of 1, 2, and 3 μm lines and spaces. We examined the effect of extra doses at the line pattern edges on their cross sectional profiles. Experiments were carried out using a PGMA resist with an electron beam exposure system of EBMG-40 at 10 keV. The cross sections were observed with a scanning electron microscope. It was found that a horned shape at the edges produced by extra doses had a favorable effect on the profiles during O2 plasma treatment to remove scum. It kept the edges from rounding due to a faster etching rate. The results showed some improvement in both the linewidth and the edge slope. An analysis of experimental cross sections has also been performed based on the so-called contrast curve. From a comparison between theory and experiment we found that the patterns seemed to shrink by 30% to 50% in the lateral direction, depending on the linewidth. A theoretical approach is useful for investigations into the characteristics of negative electron resists.

Advanced pattern data processing technique for a raster scan electron beam exposure system

With the increasing complexity and integration in recent LSI designs, the amount of data to be processed in EB exposure systems tends to increase steadily. This increase in data may lead to degradation in the systems’ throughputs. An overall technique associated with both software and hardware presents a realistic solution to this problem. Parallel processors combined with a simplified data format have provided efficient data manipulation. A compaction method working on smaller stripe areas is easily realized in hardware, yet can achieve significant data reduction. The data edit function, operating asynchronously with the data preparation procedure, eliminates repeated processing of identical chip patterns or chip element patterns. The feasibility of the technique thus featured has been proven on EB-105, a raster scan electron beam exposure system.

Variably shaped electron beam lithography system, EB55: II Electron optics

A variably shaped electron beam exposure system (EB55) with a high exposure rate is developed for direct beam lithography of 0.5 μm patterns. The electron beam column consists of seven magnetic lenses. The projection lens is specially designed to minimize deflection aberations and beam landing angle deviation on the wafer. The column design facilitates a shortened distance between the object and its image plane. Accelerating voltage is 30 kV due to decreased Coulomb interaction and proximity effect. In a shaped beam system, the electron gun should have a wide emission angle, high brightness, and large crossover size. A square rod type LaB6 cathode is developed for this purpose. The shaped beam is vector scanned by electrostatic deflection plates and electromagnetic coils. The scanning area is 2.6 mm square and the maximum beam size is 5.10 μm square. The size change unit is 0.02 μm. A beam current density higher than 10 A/cm2 is obtained with a small beam covergence angle. A shape edge slope smaller than 0.2 μm is obtained. Experimental and theoretical results of the column’s optical properties are presented. Edge slope dependence on variation of the shaped beam size is also discussed. The system has been successfully used to write submicron patterns on silicon wafers.

Variably shaped electron beam lithography system, EB55: I. System design

The precision electron beam exposure system EB55 has been developed for direct wafer writing of submicron patterns. This paper describes the system architecture, design approach, and system specifications. The system utilizes a variably shaped beam column with a spot size ranging from 0.5 to 5.1 μm square, which is adjustable in 0.02 μm increments. Pattern data, compressed by a pattern data preparation software, is supplied to the high-speed digital control unit, where it is expanded to provide control data at a 320 ns shot rate to an analog unit. The analog unit provides deflection current and voltage to the electrostatic deflection plates and magnetic deflection coils with 0.02 μm resolution. Pattern accuracy is maintained by deflection distortion correction and overlay techniques. The deflection error is measured within 0.02 μm accuracy over a 2.6 mm square field with a mark detector and laser position sensor and corrected by a digital correction unit. Overlay accuracy is assured by registering to fiducial marks on the wafer and measuring wafer deformation to determine field adjustments. The exposure time per wafer is about 41 min with 0.5 μm minimum linewidth and ±0.1 μm overlay accuracy (3σ) using 20 μC/cm2 resist sensitivity and 8×108 shots per wafer. In this case, the writing time, the registration time, and the stage move time are 32, 3, and 6 min, respectively.

A new type pattern generator applied to the electron-beam exposure system

This paper describes a new type pattern generator, used in the scanning e-beam system suitable to generate smooth skewed vector with given slope. The initial coordinate of the vector is defined by two 16 BIT DACs, each equipped with a fixed reference source, and the components of the vector are given by other two 12 BIT DACs, each equipped with a variable reference source digitally controlled by a common triangular wave generator. Digital controlled period of the triangular wave ranges from 1 μs to 10 s. A high speed dynamic zero-correction deflection amplifier is applied to the pattern generator. The deflection amplifier and coil system are optimized to give a flat frequency response to 5 or 10 Mc, and the output current ±0.5 to ±5 A. Experimental exposure has been practiced in the 20×20 mm2 scanning field with smooth skewed vectors, location accuracy 0.03%. Scanning speed is equivalent to 100 kc to 10 Mc of the digital point–to–point scanning e-beam system.

E-beam fabrication of 1.25 micron 4 K static memory

Fast, high density 4 K-bit static RAM’s (SRAM’s) have been fabricated utilizing electron beam direct slice writing and dry etch processes to demonstrate 1.25 μ VLSI MOS device technology. Access times of 15 ns were obtained for these scaled memories with channel lengths of 1.0 μ on a chip size of only 6 K mil2 vs the standard production 4 K SRAM with 35–45 ns access times, a 2.5 μ channel length and a chip size of 20 K mil2. All levels were patterned using a vector-scanned electron-beam exposure system with a capability of 1 μ resolution, ±0.2 μ level-to-level registration, and automatic chip-by-chip alignment. High speed, high resolution positive and negative electron beam resists were used for all patterning steps. All implanted, 250 Å gate oxide, scaled MOS processes with dry etching techniques for Si, SiO2, and Si3N4 were used to realize these static memories functional over full temperature.