Abstract

Fast, high density 4 K-bit static RAM’s (SRAM’s) have been fabricated utilizing electron beam direct slice writing and dry etch processes to demonstrate 1.25 μ VLSI MOS device technology. Access times of 15 ns were obtained for these scaled memories with channel lengths of 1.0 μ on a chip size of only 6 K mil2 vs the standard production 4 K SRAM with 35–45 ns access times, a 2.5 μ channel length and a chip size of 20 K mil2. All levels were patterned using a vector-scanned electron-beam exposure system with a capability of 1 μ resolution, ±0.2 μ level-to-level registration, and automatic chip-by-chip alignment. High speed, high resolution positive and negative electron beam resists were used for all patterning steps. All implanted, 250 Å gate oxide, scaled MOS processes with dry etching techniques for Si, SiO2, and Si3N4 were used to realize these static memories functional over full temperature.

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