Circuit Substrate Research Articles

Flip chip microassembly of a silicon triaxial force sensor on flexible substrates

Miniaturization of microelectromechanical systems (MEMS) based devices can be achieved by flip chip assembly directly onto a flexible circuit substrate. The main goal of this work was the selection of a suitable bonding material and process to enable scaling down of MEMS sensorized devices for biomedical applications. Finally, the heat bondable anisotropic conductive film 5552R (3M) allowed mechanical robust and low resistance electrical bondings together with a short process cycle time.

Investigation of electrical contact resistance for nonconductive film functionalized with π-conjugated self-assembled molecules

Nonconductive adhesive/nonconductive film (NCA/NCF) bonding technology has attracted increasing research interests as lead-free interconnect. During bonding, heat and pressure are applied and the direct physical contacts between the two surfaces of integrated circuit bump and substrate bond pad can be achieved. The electrical contact resistance of a NCA/NCF joint is controlled by the pressure, roughness and NCA/NCF material properties. An accurate prediction of contact resistance can help guide experiment setup towards improving the electrical performance of NCA/NCF. In this study, a model is developed and correlated to experiments. The effects of NCA/NCF material properties on electrical contact resistance are investigated.

Finite element analysis of fleXBGA reliability

Purpose – To provide an approach to fleXBGA design and reliability analysis.Design/methodology/approach – A two‐dimensional (2D) plane strain finite element analysis model is established to simulate the thermo‐mechanical behaviour of fleXBGAs which are subjected to thermo‐cyclic loading under different temperature cycling conditions. The model has been used to consider the effects of printed circuit board (PCB) thickness, die size, package size, ball count, pitch and substrate configuration. The Anand constitutive model is adopted to simulate creep and plastic deformation of the solder joints. A fatigue life prediction model based on plastic shear strain range is then applied to predict the fatigue life of different kinds of fleXBGA.Findings – Comparison of fatigue life predictions and experiments show that the maximum prediction errors are mostly within ±50 per cent, and it can be concluded that a smaller die size, a thinner PCB, a smaller solder ball diameter, more balls, a smaller temperature range and...

Surface integrity of silicon wafers in ultra precision machining

Silicon wafers are the most extensively used material for integrated circuit (IC) substrates. Before taking the form of a wafer, a single crystal silicon ingot must go through a series of machining processes, including slicing, lapping, surface grinding, edge profiling, and polishing. A key requirement of the processes is to produce extremely flat surfaces on work pieces up to 350 mm in diameter. A total thickness variation (TTV) of less than 15 μm is strictly demanded by the industry for an 0.18 μm IC process. Furthermore, the surfaces should be smooth (Ra<10 nm) and have minimum subsurface damage (<10 μm) before the final etching and polishing. The end product should have crack-free mirror surfaces with a micro-roughness less than 1.8 Å. In this paper, experiments are conducted to investigate the effects of various parameters on the subsurface damage of ground silicon wafers.

A multichannel, wireless telemetric microsystem for small animal studies

Conventional means of collecting biophysiological parameters in small animals often involve cumbersome direct wiring and/or restraint of the animal. At present, there is no system for very small animals that can provide multichannel monitoring of biopotentials without restraining the animal or small enough in size or light enough in weight for studies with smaller animals. For larger animals, such as monkeys or larger rodents, systems have been proposed where the transmitter of the system has dimensions such as 2.5/spl times/2.5/spl times/1.3 cm/sup 3/ and the weight is 9 g; this is far too high for smaller animals. Also, the battery life of that system is relatively short (/spl sim/10 h). In this study, a multichannel wireless telemetric microsystem for biopotential monitoring in small animals, such as mice or rats, has been designed, fabricated, and evaluated. This microsystem has four input channels with one calibration channel. There are 8 channels on the chip, of which five, the four electroencephalogram (EEG)/electromyogram (EMG) channels, and the calibration channel, are now in use. The system can also be expanded to more than eight input channels, if desired. In that case, a larger ASIC chip and larger circuit substrate might be required, depending on the type of biopotentials being measured. The amount of ASIC and circuit substrate space consumption is larger for biopotentials such as EEG or EMG than for others such as temperature or pressure. However, the same clocking-demodulation system could be retained up to /spl sim/128 channels. The multichannel telemetric chip for the present embodiment is approximately 2/spl times/2 mm, and the overall size of the microsystem is approximately 10/spl times/10/spl times/5 mm, including the enclosure package and battery, with a total weight of 1 g. The power consumed by this four-channel version, where two channels are EEG and two are EMG, is /spl sim/0.41 mW, and the fabrication process is AMI/spl I.bar/ABN. There is a magnetic on/off provision. The microsystem has been used to monitor EEG, Theta activity, and nuchal EMG in mice with excellent results. This wireless telemetric microsystem can be effectively used to record multiple biopotentials from freely moving small animals. This platform microsystem can be extended to include other physiological parameters, such as temperature, pressure, and biological parameters.

Thermal Shock Testing of Ceramics for Circuit Substrates

Thermal shock resistances of commercially available aluminum nitride and alumina ceramics as used for the circuit substrate were evaluated by infrared radiation heating (IRH) technique. Thermal shock fracture toughness, R2c of these materials was estimated experimentally and theoretically using IRH technique at various ambient temperatures. Temperature dependence of thermal properties of the materials was taken into account for the temperature and the thermal stress analysis. Experimental values of thermal shock fracture toughness were in good agreement with the calculated values. Thermal shock fracture toughness decreased with elevated ambient temperature in both ceramics.

Laser direct exposure of photodefinable polymer masks using shaped-beam optics

In this paper, we explore laser direct-write photolithography and ablation processes to finely pattern polymer resists, enabling the creation of densely patterned circuit substrates. The exposure dynamics are first modeled followed by presentation of data. For the exposure experiments, a tripled-YAG ultraviolet (UV) laser drilling system with highly attenuated output was used to directly expose a photodefinable resist followed by chemical developing. To improve the exposure process, special beam-shaping optics were utilized which convert the normal Gaussian beam output to a "top hat" flat exposure, ideal for even exposure of the photoresist across the beam aperture. To further improve the exposure process, a square-shaped aperture was used to compensate for the spatial average fluence variation across the scanned imaged line. For the ablation experiments, the square-shaped beam was used at higher fluence to directly ablate the resist without subsequent developing. Laser direct patterning is presented as an alternative to mask-imaging photolithography to produce fine-line traces (50 /spl mu/m or smaller) for flex circuits, circuit boards, and other interconnect substrates.

Cure shrinkage measurement of nonconductive adhesives by means of a thermomechanical analyzer

The conductivity of a nonconductive adhesive (NCA) flip chip interconnect is completely dependent on the direct mechanical contact between the integrated circuit (IC) bump and substrate pad. Cure shrinkage of NCA is critical for the formation of the final contact force in the contacts. However, measurement of the cure shrinkage during cross-linking reaction is fairly difficult. This paper introduces a new, yet simple, approach to measure cure shrinkage of adhesives using a thermo-mechanical analyzer. Isothermal studies of shrinkage change as a function of curing show four distinct regions. First, the thickness of the epoxy decreases due to decreasing viscosity and applied load, followed by a stage where the dimension change is constant as the cross-linking reaction is yet to set in. Once cross-linking begins, the shrinkage reaches a maximum followed by a plateau where the cross-linking reaction has completed. Sharp changes of the slope of cure shrinkage versus degree of cure were observed to coincide with gelation and vitrification. After gelation, a linear relationship between the cure shrinkage and degree of cure was observed to extend until the occurrence of vitrification, which quenches the cross-linking reaction. Applied load in the range of 0.05 N was found to be optimal to minimize measurement errors.

Monolithically integrated HgCdTe focal plane arrays

The cost and performance of hybrid HgCdTe infrared (IR) focal plane arrays are constrained by the necessity of fabricating the detector arrays on a CdZnTe substrate. These substrates are expensive, fragile, available only in small rectangular formats, and are not a good thermal expansion match to the silicon readout integrated circuit. We discuss in this paper an IR sensor technology based on monolithically integrated IR focal plane arrays that could replace the conventional hybrid focal plane array technology. We have investigated the critical issues related to the growth of HgCdTe on Si read-out integrated circuits and the fabrication of monolithic focal plane arrays: (1) the design of Si read-out integrated circuits and focal plane array layouts; (2) the low-temperature cleaning of Si(001) wafers; (3) the growth of CdTe and HgCdTe layers on read-out integrated circuits; (4) diode creation, delineation, electrical, and interconnection; and (4) demonstration of high yield photovoltaic operation without limitation from earlier preprocessing such as substrate cleaning, molecular beam epitaxy (MBE) growth, and device fabrication. Crystallographic, optical, and electrical properties of the grown layers will be presented. Electrical properties for diodes fabricated on misoriented Si and readout integrated circuit (ROIC) substrates will be discussed. The fabrication of arrays with demonstrated I-V properties show that monolithic integration of HgCdTe-based IR focal plane arrays on Si read-out integrated circuits is feasible and could be implemented in the third generation of IR systems.

New design formulas for microstrip transmission lines using high‐dielectric substrate

PurposeCharacterisation and use of dielectric materials with high permittivity are one of the most developed areas of research in microwave circuit simulation. This is mainly because of their various applications in VHF/UHF and microwave frequencies (correlators, instrumentation systems, …). The primary virtue of high‐dielectric substrates for microwave circuits is the reduced size. Since the high dielectric microstrip line also exhibit low loss and useful impedance range, this class of circuits will undoubtedly find wide applications in microwave integrated circuitry.Design/methodology/approachOwing to the complexity of the electromagnetic problem, numerical methods become an indispensable tool for analysis and modeling of electromagnetic structures. They are the basis to set‐up computer‐aided design (CAD) packages. These models must be accurate, reliable, easily extracted and need limited computational requirements. Since there was a demand for a model able to describe these parameters accurately, an extension of the spectral domain approach (SDA) is proposed for microstrip lines with high permittivity. The analysis is based on the solution of a system of algebraic equations, which are derived from Galerkin's technique in the spectral domain.FindingsAnalytical expressions are deduced by curve‐fitting techniques. These expressions can be easily implemented in a CAD simulation tool to design wireless communication components. In this paper, we have developed accurate and suitable general expressions for characteristic parameters for a wide range ofεrbetween 1 and 500. The computed results were compared to those available in the literature when possible. In order to validate our models for high values of dielectric constant (128 &lt; εr&lt;500), neural models were generated for the characteristic impedance and effective permittivity. A very good agreement is demonstrated.Originality/valueThe originality of this paper consists on the development of design formulas to characterise the microstrip lines with high dielectric constant substrate. Closed form equations are almost non‐existent in the technical literature since the available design formulas have been developed only for dielectric media valueεrnot exceed 128.

Micro-machined ultrasonic transducer (MUT) substrate that limits the lateral propagation of acoustic energy

A micro-machined ultrasonic transducer (MUT) substrate that reduces or eliminates the lateral propagation of acoustic energy includes holes, commonly referred to as vias, formed in the substrate and proximate to a MUT element. The vias in the MUT substrate reduce or eliminate the propagation of acoustic energy traveling laterally in the MUT substrate. The vias can be doped to provide an electrical connection between the MUT element and circuitry present on the surface of an integrated circuit substrate over which the MUT substrate is attached.

Precise microwave characterization of MgO substrates for HTS circuits with superconductingpost dielectric resonator

Accurate data of complex permittivity of dielectric substrates are needed for efficient designof HTS microwave planar circuits. We have tested MgO substrates from three differentmanufacturing batches using a dielectric resonator with superconducting partsrecently developed for precise microwave characterization of laminar dielectrics atcryogenic temperatures. The measurement fixture has been fabricated using aSrLaAlO3 post dielectricresonator with DyBa2Cu3O7 end plates and silver-plated copper sidewalls to achieve the resolution of loss tangent measurementsof 2 × 10−6. The tested MgO substrates exhibited the average relative permittivity of 9.63 andtanδ from 3.7 × 10−7 to 2 × 10−5 at frequency of 10.5 GHz in the temperature range from 14 to 80 K.

Understanding AlN sintering through computational thermodynamics combined with experimental investigation

Aluminum nitride (AlN) has attracted large interest recently as a suitable material for hybrid integrated circuit substrates because of its high thermal conductivity, high flexural strength, good dielectric properties, thermal expansion coefficient matches that of Si and non-toxic nature. Yttria (Y 2O 3) is the best additive for AlN sintering. Binary diagrams of Al 2O 3–Y 2O 3, AlN–Al 2O 3, and AlN–Y 2O 3 were thermodynamically modelled. The obtained Gibbs free energies of components, stoichiometric phases and solution parameters were used to build a thermodynamic database of AlN–Al 2O 3–Y 2O 3 system. Liquid-phase sintering of AlN with Y 2O 3 as an additive has been studied and compared with the thermodynamic results. Sintering was performed in the temperature range of 1750–1950 °C for upto 4 h under a N 2 atmosphere to optimise the sintering conditions for each composition. The relative density exceeded 95% for all the compositions sintered at 1850 °C and full densification was achieved for all four compositions sintered at 1900 °C. The microstructure and assemblage of the secondary phase have a significant effect on the final thermal conductivity of the sintered AlN. Thermodynamic modelling of AlN–Al 2O 3–Y 2O 3 system provided an important basis for understanding the sintering behaviour and interpreting the experimental results.

The reliability assessment of flip chip components

Flip chip technology involves the attachment of active side of the silicon chip onto printed circuit board or substrate. The interconnections are provided by solder bumps, which are arranged in the area under the chip. Encapsulation helps reduce the impact of the thermal stress that results from the mismatch in the coefficient of thermal expansion between the silicon chip and the substrate. The adhesion of the encapsulant to the chip and the board coating are essential to the reliability of the package. This paper studies the adhesion characteristics of an encapsulant to a flip chip package. The quality of the encapsulation was inspected using a scanning acoustic microscope. The electrical continuity of the assemblies was tested during the liquid‐to‐liquid thermal shock testing. The various delamination mechanisms were then studied. Delamination was found predominantly at the interface between the passivation layer and the encapsulant material. Comparisons were made between samples assembled by different materials used, such as chip passivation layer, encapsulant materials, and fluxes. Finally, the best material combination was determined.

Design of an ultra‐low‐noise 1.75‐GHz VCO using InGaP/GaAs HBT technology

AbstractAn integrated voltage‐controlled oscillator (VCO) operating at 1.75 GHz is designed using the InGaP/GaAs HBT process. The proposed noise‐removal circuit and FR‐4 substrate structure in this paper show an improved characteristic of phase noise and a smaller VCO dimension, respectively. The frequency‐tuning range of the VCO is about 200 MHz and the phase noise at 120‐KHz offset is −119.3 dBc/Hz. The power consumption of the VCO core is 11.2 mW at 2.8‐V supply voltage and the output power is −2 dBm. The calculated figure of merit (FOM) is 191.7, which shows the best performance, as compared with the previous FET or HBT VCOs. © 2004 Wiley Periodicals, Inc. Microwave Opt Technol Lett 41: 196–198, 2004; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.20090

Tether- and post-enabled flip-chip assembly for manufacturable RF-MEMS

This work demonstrates a cost-effective technology for integrating microelectromechanical systems (MEMS) devices with other RF components on a substrate. We have designed, fabricated and tested a new variable capacitor with a two-dimensional (2-D) array of capacitor plates. The MEMS devices were fabricated in a surface-micromachined foundry process, multiple user MEMS processes (PolyMUMPs) and then flip-chip transferred to a RF circuit substrate. With tethers, the MEMS could be released before the flip-chip assembly. Such pre-assembly release is critical in integrating hundreds of MEMS with other components on the same substrate. With the consideration of necking configuration, mechanical stops and placement, we have achieved 100% yield for the flip-chip assembly and device transfer. The precise gap between the MEMS and the RF substrate could be achieved with posts even with large bump height variations in the flip-chip assembly. Such a precise gap is critical to assure repeatable digital capacitance performance and to allow the use of compliant couplings to reduce thermal mismatch effects. We have developed 43 different plate/post configurations for 15 different gaps with a 0.25 μm increment. The 2-D variable capacitor assembled showed excellent RF performance. Its Q-factor was above 350 at 0.97 GHz with a capacitance ratio of 4.7:1 for a tuning range of 171 MHz in a resonator circuit.

A cryogenic post dielectric resonator for precise microwave characterization of planardielectric materials for superconducting circuits

A novel dielectric resonator operating at cryogenic temperatures (14–85 K)at a frequency of 10 GHz for measurements of permittivity and loss tangentof dielectric substrates for HTS microwave circuits is presented. We havefabricated a prototype post dielectric resonator, with superconducting(DyBa2Cu3O7) end plates and silver-plated copper sidewalls to improve the sensitivity andresolution of loss tangent measurements. Also a numerical technique forcalculations of permittivity and loss tangent from the resonant frequency and theQ-factor is presented in the paper. For verification of the technique, measurements of the realpart of the permittivity of a single crystal quartz substrate have been performed and a verygood agreement with published data using the whispering gallery mode technique has beenobtained.

Adhesion between an underfill and the passivation layer in flip-chip packaging

An underfill is used to fill the gap between the integrated circuit chip and substrate to improve the solder joint fatigue life in flip-chip packaging. The influence of aging in an environment with a high temperature and a high humidity on the adhesion performance of an underfill material (epoxy cured with acid anhydride) to the passivation layer in flip-chip packaging is discussed. Adhesion of the underfill to all passivation materials investigated degrades after aging in a high temperature and high humidity environment. The extent of this degradation is dependent on the hydrophilicity of the passivation layer surface. Hydrophilic passivation layer surfaces, such as silicon dioxide (SiO2) and silicon nitride (Si3N4), show much more severe adhesion degradation than hydrophobic passivation layer surfaces, such as benzocyclobutene (BCB) and polyimide (PI). The mobility of both the absorbed water and polymer chains is studied with solid state nuclear magnetic resonance (NMR) spectroscopy. Higher mobility of both the absorbed water and polymer chains in the rubbery state of polymers contributes to faster adhesion degradation during high temperature and high humidity aging. The adhesion stability of hydrophilic passivation layers can be successfully improved by use of a silane coupling agent that introduces a stable chemical bond at the interface. A flow micro-calorimeter is used to study the adsorption of silane coupling agents onto glass surface. The difference in adhesion retention improvement between aminosilane and epoxysilane is discussed.

Preparation and characterization of polycrystalline CdZnTe films for large-area, high-sensitivity X-ray detectors

This article reviews the preparation and characterization of polycrystalline CdTe and CdZnTe films to be used in large-area, high-sensitivity X-ray panel detectors intended for medical diagnostics. The films, deposited by closed-spaced sublimation, are expected to exhibit excellent efficiency at low X-ray doses because of their high sensitivity. The detectors constructed using these films incorporated a novel hybrid technique, in which zinc-doped CdTe was pre-deposited onto a ceramic substrate and then connected to a TFT circuit substrate. The sensor substrate material was specially selected to avoid both incident X-ray attenuation in the substrate and micro-cracks in the film. Zinc doping, which was used to grow the CdTe film, also served to form the heterojunction diode structure that suppressed leakage current. Moreover, the quality of a polycrystalline CdZnTe film deposited on a 9″×9″ substrate was characterized, revealing its applicability to large-area X-ray detectors. Further investigation and improvements are in progress.

The Effect of Interactions Between Water and Polishing Pads on Chemical Mechanical Polishing Removal Rates

The elastic properties of polishing pads critically affect polishing results during chemical mechanical polishing (CMP) of integrated circuit substrates. The ability of water to plasticize polishing pads and the resulting effects on pad performance were investigated. Water is hypothesized to penetrate the surface of the polishing pads, disrupting hydrogen bonds between adjacent polymer molecules within the pads and altering the pad elastic modulus. Infrared spectra obtained using an attenuated total reflection technique were used to confirm the effect of water on the polishing pad structure. Contact with deionized water reduced the pad elastic modulus due to the formation of a hypothesized soft layer on the pad surface. Removal of the soft layer from the pad, as occurs during conditioning, increased observed CMP removal rates. Experiments on a commercial dual-axis polisher using a noncommercial process showed decreased oxide removal rates as the duration of the pad exposure to water increased. A pad asperity-wafer contact model was developed. This model indicates that if the surface of the pad asperities is softened by the penetration of water compared to the bulk pad, then the asperities will deform to a greater degree under the applied load than in the absence of the softening. As a result, the effective pad-wafer contact area for a given applied load will increase and the average pad-wafer separation will decrease, causing the applied load to be carried by a larger number of asperity-wafer contacts and reducing the local load on the wafer surface. The reduced local loads will contribute to reduced polishing rates, consistent with experimental observation. The maximum depth of penetration of water into the pad surface was estimated to be ∼20 μm. © 2002 The Electrochemical Society. All rights reserved.