Abstract
Flip chip technology involves the attachment of active side of the silicon chip onto printed circuit board or substrate. The interconnections are provided by solder bumps, which are arranged in the area under the chip. Encapsulation helps reduce the impact of the thermal stress that results from the mismatch in the coefficient of thermal expansion between the silicon chip and the substrate. The adhesion of the encapsulant to the chip and the board coating are essential to the reliability of the package. This paper studies the adhesion characteristics of an encapsulant to a flip chip package. The quality of the encapsulation was inspected using a scanning acoustic microscope. The electrical continuity of the assemblies was tested during the liquid‐to‐liquid thermal shock testing. The various delamination mechanisms were then studied. Delamination was found predominantly at the interface between the passivation layer and the encapsulant material. Comparisons were made between samples assembled by different materials used, such as chip passivation layer, encapsulant materials, and fluxes. Finally, the best material combination was determined.
Published Version
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