300-mm Wafer Research Articles

Phi-scatterometry for integrated linewidth and process control in DRAM manufacturing

A cost-effective scatterometry method is presented that is suited for integrated pattern and process control and is valuable as a supplement to conventional scanning electron microscopes. The phi-scatterometry procedure is carried out directly on periodic functional patterns instead of using additional test structures. Time-consuming simulations of diffraction effects are not required. The measurement results are evaluated by neural networks performing classifications of pattern and process parameters. Thereby, fast fault detection and immediate process control are achieved. The measurements were performed on a 300-mm wafer with systematically varied focus and exposure as well as on production lots, both with DRAM patterns featuring trenches in two dimensions. A phi-scatterometry prototype was built which is suited for flexible mobile metrology in 300-mm production environments.

X-ray characterization of crystal perfection and surface contamination in large-diameter silicon wafers

This paper reviews recent development of X-ray techniques, which cover laboratory experiments and synchrotron radiation (SR) applications, to detect crystal imperfections and surface contamination in large-diameter Czochralski-grown silicon (CZ-Si) wafers. While process-induced defects can be easily detected by a large-sized Lang camera, it is difficult to observe grown-in microdefects and slight impurity-inhomogeneity even when the double-crystal method is applied. SR plane-wave X-ray topography has overcome this difficulty, except for observing void defects, with the help of its high strain sensitivity although it cannot be directly applied to large Si wafers because of their warpage. Recently, SR X-ray topography using a 300-mm-wide monochromatic beam has been employed for measuring the warpage of 200- and 300-mm wafers as well as inspecting surface damage caused by various steps of wafer-manufacturing. Although energy-dispersive total-reflection X-ray fluorescence analysis using a rotating-anode X-ray generator is now widely used for detecting traces of metallic impurities on the surface of 300-mm Si wafers, the requirement of a large scale integrated circuit miniaturization has promoted the combination of a vapor-phase decomposition technique and the TXRF for lowering the lower-limit of detection (LLD). SR-TXRF using an ED solid-state detector is effective in nondestructive and low LLD features, while newly developed wavelength-dispersive (WD) SR-TXRF in good energy resolution. The combined use of the laboratory and SR experiments leads to precise information about crystal perfection and surface contamination in large-diameter Si wafers.

Low energy plasma enhanced chemical vapor deposition

We present a state-of-the-art growth technique, introduced recently for SiGe heteroepitaxy. At present, its most important application is the fast fabrication of high-quality relaxed SiGe buffer layers. The process is based on chemical vapor deposition (CVD), enhanced by a high intensity, low energy plasma, which is why we call it ‘low energy plasma enhanced CVD’ (LEPECVD). The key features of the process are a wide range of epitaxial growth rates (<1 Å s −1 up to at least 10 nm s −1), independent of the substrate temperature in the range of 500–750 °C and easy control of film composition, governed solely by the mixture of the precursor gases (SiH 4 and GeH 4). Possible applications of LEPECVD include electronic devices, such as modulation doped SiGe FETs (SiGe-MODFETs) or strained-layer SiGe MOSFETs, all based on relaxed buffer layers and targeting the fast-growing RF device market. Another field of applications is high-performance SiGe solar cells. For economic production, all these devices rely on fast, high-quality epitaxy, which is the strength of LEPECVD. The process, developed on the experimental system for 4-inch wafers, is now being transferred to a 300-mm single wafer reactor for production.

Detection and analysis of crystal defects in silicon by scanning infrared depolarization and photoluminescence heterodyne techniques

The coupling of photoelasticity and photoluminescence measurement techniques represents a powerful tool for non-destructive defect monitoring in silicon wafers. By rapid scanning the infrared depolarization (SIRD) allows the detection of crystal defects in 300-mm wafers in a process related time scale of 3 min by full wafer imaging of the local crystal distortions. Coordinate transfer and local investigation by photoluminescence heterodyne reveal the change of the electrical properties of the wafer due to the crystal defects. Crystal defects such as sliplines, boat marks or support related glide bands are investigated after repeated high temperature processing. The defects are caused by local temperature gradients and possess a potential influence for degradation in subsequent thermal treatment.

VEHICLE ANAGEMENT OF AMHS IN 300MM WAFER FAB

ABSTRACT In this paper, a vehicle management framework for connecting transport of automated material handling system (AMHS) in 300mm wafer fab, which integrates the interbay and intrabay systems, is proposed. Based on operational area of vehicles, we extend our previous study and propose “vehicle type” concept for vehicle management in the AMHS. Three types of vehicle management scheme are analysed and discussed, in order to assign vehicles flexibly and improve performance of transport environment. These include 1) fixed vehicle type, 2) virtual vehicle type, and 3) dynamic vehicle type.

Trace analysis for 300 mm wafers and processes with total reflection X-ray fluorescence

Total reflection X-ray fluorescence (TXRF) is essential for 300-mm silicon wafer production and fabrication of semiconductor devices. The 300-mm TXRF enables non-destructive contamination analysis on wafers for process development and process control. The TXRF system shows a very stable continuous operation, which allows accurate trace and ultra trace analysis on the silicon surface. It is equipped with two excitation sources covering the requirements of very sensitive measurement and wide element range. The TXRF is a key technology for contamination control during wafer reclaim. For this purpose we show that the system is able to examine the wafers during different processing states of reclaim. The system sensitivity is influenced by the surface of the wafer. For important processing steps, e.g. double side polishing, the sensitivity is as good as for measurements on hazefree polished wafers. We show with TXRF that cross-contamination with copper during double side polishing is suppressed.

Focus on Semiconductor Technology

Focus on Semiconductor Technology

Evaluations of 300 mm Si wafer performances for giga ULSI device processes

Selete evaluated more than 130 tools for 300-mm wafer processes from FEOL to BEOL since November 1996. According to Selete prediction, the middle of the year 2001 is the launch time for the large-scale volume production of devices using 300-mm wafers. Previous to the evaluation of 300-mm tools and wafers, Selete has made specifications of tools and wafers, which meet the requirements for fabrication of 0.18 μm device. Based on these specifications Selete carried out evaluations on basic process performance, productivity, and electrical properties of wafers. Process tools are divided into 23 categories. Basic strategy is to evaluate at least two tools for each category. Selete evaluated eight Si supplier’s wafers, including polished and epitaxial wafers, as of March 2000. The evaluation will be continued based on 0.13 μm device target rules until March 2003. This paper describes Selete’s activities on equipment and materials evaluation, and provides an overview of the latest outcome.

Comparison of silicon epitaxial growth on the 200- and 300-mm wafers from trichlorosilane in Centura reactors

A detailed modeling of CVD of silicon epilayers from trichlorosilane (TCS) on the 200- and 300-mm wafers in the Centura reactors is carried out using a quasi-thermodynamic model of surface kinetics. The flow patterns, the temperature and species distributions in the reactors, and the growth rate distributions over the wafers are studied. The growth rate distribution over the 300-mm wafer is shown to be less uniform and symmetric compared to that over the 200-mm wafer under typical growth conditions. An essential smoothing effect of the susceptor rotation and of a higher flow rate is revealed and found to be much stronger for the 300-mm wafer.

Applications of plasma immersion ion implantation in microelectronics — a brief review

Recent advances in plasma immersion ion implantation (PIII) are progressing at a rapid pace. PIII was originally envisioned as a conformal ion implantation technology for the surface modification of materials. PIII also offers the advantages of high dose rates, even at low energy, and single wafer implants over large areas. Such advantages are becoming very important for semiconductor manufacturing, particularly for 300-mm wafers and flat panel displays. Applications of PIII in microelectronics introduce new considerations. Conformal implantation is not required, and is unwanted in most semiconductor processes, except for trench doping-type applications. In various implant applications, there are often radically different requirements of plasma physics and chemistry. For example, the formation of shallow junctions requires extremely low energy implantation, and a precise implant range may not be necessary or ideal. In this application, PIII becomes the concept of plasma doping, where a wafer under either a DC or pulse bias is directly exposed to the plasma. On the other hand, hydrogen PIII for layer transfer requires extremely precise implant ranges, straggles and sample temperature, but the exact dose may not be critical. In this paper, two important application areas that have attracted much attention and research in the past 2 years, hydrogen PIII and the fabrication of low- k materials, are reviewed.

Issues for Construction of 300-mm Fab

The cost of constructing and tooling a semiconductor facility, which is currently more than $1 billion, is expected to double by the year 2000, driving semiconductor chip manufacturers to adopt strategies to minimize cost to maximize the return on investment. What seems to be an inevitable transition to the larger, 300-mm wafer will have a widespread impact with massive economic implications. Preliminary tool designs and process approach standards suggest increased automation of material handling and storage systems, increases in utility consumption, tool height and weight requirements, and schedule compression. Moreover, the contamination sensitivity of the 300-mm wafer might require modification in the fab construction protocol, which in turn could affect labor productivity. Such changes will have a significant impact on construction methods, materials, and management techniques. This paper discusses the key areas in which research is necessary, focusing mainly on issues that have the maximum impact on design and construction of 300-mm fabs. While not providing solutions, this paper is intended to act as a catalyst for further research as 300-mm technology moves closer to becoming a reality.

Reducing airborne molecular contamination by efficient purging of FOUPs for 300-mm wafers-the influence of materials properties

The control of airborne molecular contamination (AMC) plays an increasing role in semiconductor manufacturing processes. A method to reduce AMC is purging of wafer boxes with inert gas. In this study, data on the practicability and optimization of purging a front opening unified pod (FOUP), a wafer box for 300-mm wafers, are presented. Different parameters for the purge process are evaluated experimentally. Key values for the assessment of efficiency are the time-dependent content of oxygen and humidity in the FOUP. The increase in the key values after the purge was measured and the construction of the FOUP was modified in order to obtain sufficient tightness. Spatially resolved measurements reveal the homogeneity of the purge. Experimental data are compared to data obtained by a simulation using a computational fluid dynamics program. Values for oxygen are in agreement with the calculated curves. In contrast to this, an additional, long-lasting contribution that was not taken into account in the simulations makes depletion of humidity slower than expected. This contribution is explained with the desorption and permeation of humidity through the plastic walls of the FOUP. The presence of both effects, desorption and permeation, is proved and quantified. Materials properties turn out to heavily affect purge effectiveness and the postpurge ingress of certain contaminants in a wafer box.

In-line monitoring of 300 mm silicon epitaxial and CZ wafers using surface charge profiler

The surface charge profiler (SCP) offering non-contact electrical characterization of the near-surface region of silicon wafers is discussed. The system permits fully automatic handling of 300- and 200-mm wafers. The SCP method, based on a low intensity illumination a.c. surface photo-voltage principle, does not require any surface preparation. It allows for a fast (600 points/min), high-resolution mapping of the active doping concentration in the near-surface region as well as surface recombination lifetime. The capabilities of the SCP method for process monitoring and development are illustrated with 200- and 300-mm wafers, focusing on the effects of epi growth conditions on the layer uniformity and its resistivity.

SOPRA SE300: a new tool for high accuracy characterization of multilayer structures

In order to characterize 300-mm wafers at different stages of the IC manufacturing, a new tool based on spectroscopic ellipsometry has been recently developed at SOPRA. This new instrument called SE-300 has some important new features compared to the other ellipsometers of SOPRA or of the competition. First the optical setup allows to obtained very small measurement spots down to 35×45 μm in polychromatic light to be able to work from deep UV 190 nm to near infrared; second the combined monochromator/spectrometer is directly setup on the analyser arm and allows both multichannel and scanning measurements on the same spot. Scanning measurement made with a real double monochromator including prism and grating allows very accurate measurement that can be used to extract optical indices and solve complex multilayer structures. Multichannel measurements are made through a prism/grating spectrometer with quasi-linear dispersion in wavelength. All the elements (robotics, prealigner, XYZ mapping, pattern recognition) are fully compatible with the new generation of 300-mm wafers. Practical results obtained in a realistic environment (I300I acceptance tests and MEDEA project) are presented.

Three hundred-mm wafers: a technological and an economical challenge

For the transition from 200- to 300-mm wafers, in addition to the technological challenges, there is the equivalent cost challenge to be met. The ultimate target is cost parity per unit area of silicon between 200 and 300 mm. The major blocking point to be cleared appears to be crystal pulling. The question of cost of crystal pulling is mainly related to the large crystal weights (>300 kg) and to the issue of crystal defects (crystal originated pits (COPs); voids in the Si crystal) generated by crystal pulling. An alternative route to address the defect problem is to use epitaxy to create a defect-free layer of Si for the active device regions. Close co-operation between wafer manufacturers and users is absolutely necessary to address these key issues. Furthermore, to contain cost, wafer makers and device manufacturers have to work together intensively to implement standardisation wherever possible and to avoid cost driving overspecifications (e.g. for front and backside particles or flatness).

An industrial SR-TXRF facility at ESRF

A TXRF industrial facility for the mapping of trace impurities on the surface of 300-mm Silicon wafers is presently in the construction phase and will start the commissioning phase at the end of 1998. The elements to be detected range from Na to Hg with a target routine detection limit of 108 at/cm2 and the capability of mapping the surface of 300-mm wafer with a resolution of 500 pixels and a throughput of three wafers/h.

Advanced manufacturing equipment: a vertical batch furnace for 300-mm wafer processing

Production of 300-mm diameter wafers will begin in the next few years. To keep costs low and throughput high, manufacturers must design new equipment such as the furnace system presented here, rather than simply upscaling existing 200-mm equipment.

A simulation study of long throw sputtering for diffusion barrier deposition into high aspect vias and contacts

Modified sputtering techniques, such as long throw sputtering, collimation, and ionized sputtering, have been proposed to improve VLSI topography bottom coverage by narrowing the angular distribution of the sputter flux at the substrate and reducing subsequent flux shadowing at the bottom of topography. This paper first investigates a number of unique aspects involved in the simulation of long throw sputter systems. In particular, time importance of inhomogeneous film density and nonunity sticking coefficients are addressed. The second part of the paper presents a simulation study of long throw sputtering, providing a comparison to and sputtering systems. The simulations are performed using the SIMSPUD/SIMBAD ballistic deposition tool. SIMSPUD is used to study film uniformity over a 300-mm wafer and to generate angular distributions at the center and edge of the wafer. The ability of SIMBAD to simulate directed sputtering systems is verified by direct comparison to Ti films deposited into oxide trenches. The importance of modeling the film microstructure is demonstrated by comparison between cross-sectional SEM's micrograph for evaporation and modeling results, such as long throw sputtering with a variety of substrate/target spacings, typical standard as well as collimated systems. SEM's of overhang structures and simulations are also presented to demonstrate nonunity sticking during the co-sputtering of TiW.

MODELING OF SILICON WAFER VIBRATION IN SEMICONDUCTOR PROCESS TOOLS

An investigation of the behavior of bare, unprocessed silicon wafers during their loading and transport in wafer cassettes is documented. Semiconductor process tools can generate sufficient vibration to cause the current 200-mm diameter wafers to vibrate inside the cassettes leading to particle generation, mechanical misalignment, and wafer walking. The cassettes feature chamfered slots into which the wafers are inserted. In the interest of minimizing particle generation in the cleanroom environment, the wafers slide loosely into the slots. As a result, the wafers show distinct pitching and rattling behavior under certain excitation conditions. A study of the wafer dynamics, when positioned in the cassette slots, shows that the wafers make a transition to instability under repeatable conditions of excitation frequency and amplitude. The development of two models of the wafer behavior is included, as well as an experimental verification of the model's results for 200-mm wafers. The model is expected to predict the behavior of future wafer sizes including the 300-mm wafers now under development.

The environment [Technology 1998 analysis and forecast

Advances by top-tier chip-makers in 300-mm wafer technology are picking up in speed. As technology, competition, and customer demands for ICs keep on growing and the cost of new 300-mm wafer fabrication facilities reaches US $2 billion to $3 billion, concern about environmental impact is counting for much more in business success. Use of 300-mm technology will push industry to exploit resources such as chemicals, energy, and water with greater efficiency and will lay even greater demands on the semiconductor designers in the areas of product, process, and equipment. Three areas with the potential for marked environmental improvement in the industry are isolation technology and mini-environments, perfluorinated compound reductions, and fusion barrier technology. These issues are discussed as well as product takeback, electromagnetic fields, CFCs and appliances, and design for the environment.