Zone Melting Recrystallization Research Articles

Strain analysis of silicon-on-insulator films produced by zone melting recrystallization

Silicon-on-Insulator (SOI) wafers produced by the Zone-Melting-Recrystallization (ZMR) method were evaluated to determine the level of built-in strain. Micromechanical strain measurement structures were produced by surface micromachining the thin film silicon epitaxial layer. A variety of test structures and a new tensile strain measurement device were used to determine the level of strain in the material. Results indicated that the maximum strain in the ZMR material is less than 2/spl times/10/sup -4/ and that there is a significant orientation dependence. >

High-efficient operation of large-area (100 cm2) thin film polycrystalline silicon solar cell based on SOI structure

High-efficient operation of a large-area thin film polycrystalline Si solar cell with a novel structure based on a silicon on insulator (SOI) structure prepared by zone-melting recrystallization (ZMR) is reported. The (100) crystal orientation area over 90% has successfully been obtained by controlling the ZMR conditions, which allowed to form a uniform random pyramidal structure at the cell surface. The effect of hydrogen passivation has also been investigated for further improvement of the cell characteristics. By employing a light trapping structure (textured surface) and hydrogen passivation, an efficiency of 14.22% was obtained for a practical 100 cm 2 size.

Thermal parameters affecting low temperature zone-melting recrystallization of films

An experimental study and numerical simulation of low temperature (m.p.<800 °C) zone-melting recrystallization (ZMR) were conducted to identify the critical thermal processing parameters. Results were compared to previous studies of high temperature ZMR of silicon. The critical thermal processing parameters for low temperature ZMR were found to be the conductive heat flux from the strip heater through the gas and to the film, the radiative heat transfer from the strip heater, the susceptor temperature, the effects of phase change on material properties, the scanning speed, and the material’s latent heat of fusion. Thermal effects of these parameters are studied and discussed. In contrast to high temperature ZMR, in which the thermal radiation is the main mode of heat transfer, low temperature ZMR processing relies heavily on the conductive heat flux from the line heater. The dominance of the conductive heat flux makes melting ‘‘explosive.’’

Electrical trimming of ion-beam-sputtered polysilicon resistors by high current pulses

Phosphorus doped polysilicon resistors have been fabricated from microcrystalline silicon films which were deposited by ion beam sputtering using an argon ion beam of diameter 3 cm, energy 1 keV and current density 7mA/cm/sup 2/, with a deposition rate of 100-120 /spl Aring//min. The resistors, having a sheet resistance of 70 /spl Omega//square and a carrier concentration of 7.5/spl times/10/sup 19/ cm/sup -3/, were stressed with current pulses of width 10 /spl mu/s and duty cycle 0.6% for 5 min. There was a steady decrease of resistance with increasing pulse current density above a threshold value 5/spl times/10/sup 5/ A/cm/sup 2/. A maximum fall of 27% was observed for a 95 /spl mu/m long resistor. The current-voltage characteristics were also recorded during the trimming process. The trimming characteristics were simulated using a small-signal resistivity model of Lu et al. (1983). and the I-V characteristics by a large-bias conduction model. A close fitting of the experimental data with the theoretical values needed an adjustment of some grain boundary parameters for the different pulse current densities used for stressing. The nature of variation of the grain boundary parameters indicates that the rapid Joule heating of the grain boundaries due to current pulses passivates the grain boundary interfaces, at lower currents above the threshold, and then, at higher values of currents, causes zone melting and gradual recrystallization of the disordered boundary layers and subsequent dopant segregation. It confirms the mechanism suggested in the physical model of Kato et al. (1982). The role played by the field-enhanced diffusivity and electromigration of dopant ions, due to the high instantaneous temperature of the grain boundaries, has also been discussed. The pulse trimming technique is simple and does not cause damage to the adjacent components on a monolithic chip.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

High efficiency thin film silicon solar cells prepared by zone-melting recrystallization

A new type of silicon solar cell is demonstrated using chemical vapor deposited silicon thin films on a silicon dioxide layer. In order to improve the crystal quality of the thin films, zone-melting recrystallization (ZMR) is applied and grain boundaries of polycrystalline Si films are passivated with H+. It is found that H+ passivation is quite effective for thin film Si solar cells and ZMR conditions to provide dominant (100) orientation is essential for achieving higher conversion efficiency. This (100) nature is also favorable for making effective light confinement scheme with pyramidal textured surface using anisotropic chemical etching. The conversion efficiency as high as 14.2% for a practical size of 10×10 cm2 is achieved. This is the highest for large area thin film polycrystalline Si solar cells so far.

Thermal analysis on zone-melting recrystallization of silicon-on-insulator films using a finite difference method

The effects of important parameters on the zone-melting recrystallization process with a linear heat source were investigated numerically. In order to describe undercooling effects and the presence of a mixed phase during the melting and solidification process, an enthalpy formulation of the Stefan problem was chosen. The initial-boundary-value problem for the determination of the temperature field and for the phase fraction is solved by a finite difference method.

Radiation response of silicon on diamond (SOD) devices

Field effect transistors have been fabricated on two types of silicon-on-diamond (SOD) structures. The radiation response of the transistors has been studied. The results are compared with the radiation response of simultaneously fabricated SIMOX (separation by implantation of oxygen) devices. The extreme radiation hardness of CVD (chemical vapor deposited) diamond films is established by using an MIS capacitor structure and the ZMRSOD (zone melting recrystallization SOD) quick turn-around back channel MISFET structure. The feasibility of fabricating BESOD (bond and etchback SOD) FETs has been demonstrated, but the radiation hardness of the buried diamond in the BESOD structure could not be proven due to the excessive electrical conductivity of the buried diamond film.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Recrystallization of amorphous silicon on insulator

The structure and morphology as well as the etch velocity of silicon on silicon nitride are studied prior to and after zone melting recrystallization by observing the transmission electron micrographs and diffraction patterns. It is found that the experimental results depend on the presence of a channel as a starting area of recrystallization, and monocrystals of good quality are obtained using a channel width of 0.3 mm. The etch velocity of such silicon layer is 1150 Å min −1, which is the lowest in comparison with results obtained using other channel widths.

Reactive Ion Etching of SOI (SIMOX and ZMR) Silicon in Nitrogen Containing CF 4 + O 2 and SF 6 + O 2 Plasmas

The effects of addition on the etch rate of bulk‐silicon and silicon‐on‐insulator (SOI) separation by implantation of oxygen (SIMOX) and zone melting recrystallization (ZMR) samples using and plasmas; as well as the damage assessment of the plasma are reported. In plasma, the additive reduces the etch rate of the masking oxide [chemical vapor deposited (CVD)] while significantly increasing the silicon etch rate and, thus, increasing the selectivity by 44–64%. In plasma, the silicon etch rate is increased due to the addition. However, the increase in selectivity is about 16–45%. The etch rate of SOI silicon especially in plasma is higher than that of bulk‐silicon samples. The higher etch rate of SOI samples appears related to the higher defect density of the SOI silicon. The damage assessment studied through Schottky diode and metal oxide semiconductor (MOS) capacitor samples indicates that plasma with additive introduces less damage as compared to without additive. Furthermore, postmetal annealing at 250°C for 15 min in ambient improves the characteristics of both Schottky diode and MOS capacitor devices. Thus the addition of improves the etch rate, and selectivity in some cases, and at the same time decreases the damage.

Integration of CMOS-electronics and particle detector diodes in high-resistivity silicon-on-insulator wafers

A new approach to monolithic pixel detectors, based on silicon on insulator (SOI) wafers with high resistivity substrate, is being pursued by the CERN RD19 collaboration. The fabrication methods and the results of the electrical evaluation of the SOI-MOSFET devices and of the detector structures fabricated in the bulk are reported. The leakage current of the high-resistivity PIN-diodes is kept of the order of 5 to 10 nA/cm/sup 2/. The SOI preparation processes employed-SIMOX (separation by implantation of oxygen) and ZMR (zone melting recrystallization)-produce working electronic circuits, and appear to be compatible with the fabrication of detectors of suitable quality.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Stress in Thin Micro-Zone-Molten Crystalline Silicon Films on Solid Substrates

Thin crystalline silicon films supported by a substrate can be obtained by zone melting recrystallization. In this study a model for the stress generated in the substrate during this process and for the final stress in the thin silicon film is presented. For a given structure the stress is determined by the preheating temperature only. In the substrate compressive stress is induced by the localized heating inherent to the ZMR process. The moving heater introduces a tensile stress component in the final SOI film. If a line shaped heat source is used, this tensile stress is non-equi-axed. The presented model can account for a wide variety of reported experimental results.

Piezoresistivity of silicon-on-insulator films by zone-melting recrystallization

The authors report the results of measurement of the piezoresistance of silicon-on-insulator (SOI) films produced using the zone-melting-recrystallization (ZMR) process. Silicon on insulator piezoresistors were fabricated on SOI wafers which were diced to form 0.5" by 1.5" beams. These beams were clamped at one end and deflected at the other, varying the stress in the piezoresistors. Measurements were conducted at dopant densities ranging from 5*1017 cm-3 to 1.8*1019 cm-3 while varying the temperature from 25 degrees C to 150 degrees C. The data were analysed to determine the gauge factor and its temperature coefficient. These results are compared with published data on the piezoresistance of diffused resistors fabricated in single-crystalline silicon. It has been determined that piezoresistors fabricated using ZMR have gauge factors equivalent to single-crystalline silicon but differ somewhat in the temperature coefficients of gauge factor and resistance.

Residual stress effect on electron mobility in ZMR-SOI

N-channel enhancement-mode MOSFETs have been fabricated in silicon-on-insulator (SOI) films prepared by both infra-red and laser zone-melting recrystallisation (ZMR). The SOI films are subjected to a lateral tensile stress due to the thermal expansion coefficient difference between silicon and silicon dioxide. The devices in the stressed films exhibit higher surface electron mobilities than those in bulk single crystal silicon. This phenomenon has been attributed to the influence of the stress through the change of the band structure as well as redistribution of carriers in k space.

Low frequency noise investigations for evaluation of silicon-on-insulator films obtained by zone-melting recrystallization

Low frequency noise measurements and the characterization of bipolar transistors were used for the evaluation of silicon-on-insulator (SOI) films obtained by zone-melting recrystallization (ZMR) and epitaxial Si layers grown on them with regard to bipolar complementary metal-oxide-semiconductor (BICMOS) application. In particular, noise investigations had been found to be a promising method for characterizing SOI material and the interface properties. Electrical measurements were completed by crystallographic investigation using cross-section transmission electron microscopy. The investigated noise characterization, the estimated generation-recombination properties and the crystallographic characterization demonstrate the good quality of the SOI as well as of the epitaxial layer and they indicate that the thick SOI films generated by ZMR are suitable for BICMOS technology.

The effects of natural convection and conduction in a zone-melting-recrystallization chamber

Zone-melting recrystallization (ZMR) with a graphite strip heater is used to improve the material quality of thin film structures for microelectronic applications. The process takes place in a sealed chamber filled with an inert gas such as argon or helium. The effect of natural convection and conduction at the interface between the gas and film structure was studied both numerically and experimentally. Numerical simulations of the temperature profile in the film structure, and the flow pattern and temperature field in the gas were developed. Experimental observations in a scaled setup using a liquid medium verified the flow patterns calculated from the numerical model of the gas flow in the chamber. Results indicated that the gas is stagnant in the region below the strip heater; consequently, conduction from the strip heater to the wafer is prevalent. Outside the stagnant region, natural convection cools the film structure. These two effects combine to create a steeper thermal gradient across the entire wafer which can increase the thermal stresses in the film. The magnitude of this thermal gradient depends strongly on the thermal diffusivity of the gas. The configuration of the strip heater may significantly affect the amount of heat conduction in the stagnant region.

A Comparative Study Between high and low Temperature Thermally Controlled Crystallization of thin films

ABSTRACTNumerical simulation of zone-Melting recrystallization (ZMR) was conducted to determine the heat transfer dynamics over a wide range of temperatures. ZMR is a thermal processing technique used to recrystallize Materials. Therefore, the thermal effects induced by the ZMR process critically affect the crystallization dynamics. Parametric studies indicated that the conductive heat flux from the heat source through the gas accounted for at least 15% of the total energy heating the film for materials with melting points less than 800°C. The influence of this conductive heating has been neglected in past analyses. Also, Materials with higher melting points are less sensitive to changes in the heat flux from the heat source. Slight variations of thermal gradients in the film can lead to different qualities of crystal, so care must be taken when processing materials with lower melting points, since they are more sensitive to temperature variation. This paper analyzes the dominant modes of heat transfer in ZMR over a wide range of temperatures that influence the recrystallization dynamics.

Solidification front stability during zone-melting recrystallization of thin silicon films

The effects of constitutional supercooling and scanning speed on the stability of the solidification front during zone-melting recrystallization of thin silicon films were investigated. We found that constitutional supercooling did not effect the stability of the solid/liquid interface for typical concentrations of oxygen, nitrogen, and carbon found in zone-melting recrystallized films. Interface growth was stable for scanning speeds less than 250 μm/s. The critical impurity concentration for which unstable growth is induced for scanning speeds smaller than 250 μm/s was identified. Carbon and nitrogen diffused into the silicon film seem more likely to cause unstable solidification than oxygen.

Thermal analysis of incandescent lamp zone-melting recrystallization of thin silicon films

A two-dimensional numerical simulation of incandescent lamp zone-melting recrystallization was developed to investigate the critical thermal processing parameters. Parametric studies examined the thermal effects of lamp intensity profile, susceptor emissive power, and the ambient reflectivity of the system, on the melt zone. Results, presented in graphical form, indicate that the melt width increases nonlinearly with peak intensity due to an increase in reflectivity of silicon upon melting. Melt width increases linearly with susceptor emissive power due to an increase in emissive-dominated effects. Moreover, the ambient reflectivity of the system (often overlooked in thermal analyses) is found to have a significant effect on the process.

Zone Melting Recrystallization for Dielectrically Isolated Bipolar Transistors

Dielectrically isolated wafers with small warpage were obtained by zone melting recrystallization. A poly‐Si layer deposited in oxide basins was recrystallized by zone melting with a movable strip heater. Seeding is achieved using single‐crystal Si regions which surround the basins and are exposed by polishing. After filling the basins with epitaxially grown Si, dielectrically isolated Si islands were formed by polishing. Bipolar transistors were fabricated on 40 μm basins formed in the Si substrate. The buried oxide dielectrically isolated the transistors from each other. Bipolar transistors with low leakage currents were obtained.

Bipolar Transistors on Si / MgO · Al2 O 3 / Si

SOI‐bipolar transistors were fabricated by Si epitaxial layers on epitaxial layers grown on Si wafers. Leakage current increased due to crystalline defects on the Si layer. By using solid‐phase epitaxy (SPE) or seedless zone melting recrystallization (ZMR), crystalline defects were reduced. Stacking faults were reduced from 108/cm2 to less than 102/cm2 by solid‐phase epitaxial growth of the amorphous Si layer. The leakage current of a bipolar transistor fabricated on a defect‐reduced Si layer was less than 1 nA at 10 V. Both stacking faults and dislocations were reduced by ZMR of the Si layer epitaxially grown on . Dielectrically isolated bipolar transistors with low‐leakage current were obtained.