Spin-torque Transfer Magnetic Random Access Research Articles

Deep-Learning-Based Adaptive Error-Correction Decoding for Spin-Torque Transfer Magnetic Random Access Memory (STT-MRAM)

Spin-torque transfer magnetic random access memory (STT-MRAM) is a promising emerging non-volatile memory (NVM) technology with wide applications. However, the data recovery of STT-MRAM is affected by the diversity of channel raw bit error rate (BER) across different dies caused by process variations, as well as the unknown resistance offset due to temperature change. Therefore, it is critical to develop effective decoding algorithms of error correction codes for STT-MRAM. In this paper, we first propose a neural bit-flipping (BF) decoding algorithm, which can share the same trellis representation as the state-of-the-art neural decoding algorithms, such as the neural belief propagation (NBP) and neural offset min-sum (NOMS) algorithm. Hence a neural network (NN) decoder with a uniform architecture but different NN parameters can realize all these neural decoding algorithms. Based on such a unified NN decoder architecture, we further propose a novel deep learning (DL)-based adaptive decoding algorithm whose decoding complexity can be adjusted according to the change of the channel conditions of STT-MRAM. Extensive experimental evaluation results demonstrate that the proposed neural decoders can greatly improve the performance over the standard decoders, with similar decoding latency and energy consumption. Moreover, the DL-based adaptive decoder can work well over different channel conditions of STT-MRAM irrespective of the unknown resistance offset, with a 50% reduction of the decoding latency and energy consumption compared to the fixed decoder.

Sparse Code With Minimum Hamming Distance of Three for Spin-Torque Transfer Magnetic Random Access Memory

Sparse Code With Minimum Hamming Distance of Three for Spin-Torque Transfer Magnetic Random Access Memory

Polar Code and Symbol Mapping Design for Multi-Level Cell Spin-Torque Transfer Magnetic Random Access Memory

Multi-level-cell (MLC) spin-torque transfer magnetic random access memory (STT-MRAM) suffers from reliability issues due to the highly asymmetric error rates of its hard and soft domains. In this communication, we have proposed to include a symbol mapper prior to writing bits to the MRAM and have jointly optimized the mapping and polar codes with iterative, soft-cancellation (SCAN) decoder. Specifically, we perform code search and symbol mapping based on the extrinsic information transfer curves of <i>a posteriori</i> probability demapper and the SCAN decoder. We identify a number of variations of Gray code-based mappings, each promising best waterfall, convergence, and/or error-floor performances. In particular, our simulation results demonstrate that one of our proposed mapping achieves a bit-error-rate which is nearly three orders of magnitude lower than that of the conventional binary mapping and outperforms other Gray-code variants at a resistance spread up to 18&#x0025; and hard bit write errors up to multiples of 10^&#x2212;3.

Union Bound Analysis for Spin-Torque Transfer Magnetic Random Access Memory (STT-MRAM) With Channel Quantization

As an emerging non-volatile memory (NVM) technology, spin-torque transfer magnetic random access memory (STT-MRAM) has received great attention in recent years since it combines the features of low switching energy, fast write/read speed, and high scalability. However, process variation and thermal fluctuation severely affect the data integrity of STT-MRAM, resulting in both write errors and read errors. Therefore, effective error correction codes (ECCs) are necessary for correcting memory cell errors. Meanwhile, the design of channel quantizer plays a critical role in supporting error correction coding for STT-MRAM. In this work, we propose a union bound analysis which can accurately predict the word error rates (WERs) of ECCs with maximum-likelihood (ML) decoding over the quantized STT-MRAM channel. The derived bound provides a theoretical tool for comparing the performance of ECCs with different quantization schemes at very low error rate levels without resorting to lengthy computer simulations. Moreover, we also propose a new criterion to design the channel quantizer by minimizing the WERs of ECC decoding that are obtained from the union bound analysis. Numerical results show that the proposed union-bound-optimized (UBO) quantizer can achieve better error rate performance than the state-of-art quantizers for STT-MRAM.

Deep Learning-Based Decoding of Linear Block Codes for Spin-Torque Transfer Magnetic Random Access Memory

Thanks to its superior features of fast read/write speed and low power consumption, spin-torque transfer magnetic random access memory (STT-MRAM) has become a promising non-volatile memory (NVM) technology that is suitable for many applications. However, the reliability of STT-MRAM is seriously affected by the variation of the memory fabrication process and the working temperature, and the later will lead to an unknown offset of the channel. Hence, there is a pressing need to develop more effective error correction coding techniques to tackle these imperfections and improve the reliability of STT-MRAM. In this work, we propose, for the first time, the application of deep-learning (DL)-based algorithms and techniques to improve the decoding performance of linear block codes with short codeword lengths for STT-MRAM. We formulate the belief propagation (BP) decoding of linear block code as a neural network (NN) and propose a novel neural normalized-offset reliability-based min-sum (RB-MS) (NNORB-MS) decoding algorithm. We successfully apply our proposed decoding algorithm to the STT-MRAM channel through channel symmetrization to overcome the channel asymmetry. We also propose an NN-based soft information generation method (SIGM) to take into account the unknown offset of the channel. Simulation results demonstrate that our proposed NNORB-MS decoding algorithm can achieve significant performance gain over both the hard-decision decoding (HDD) and the regular RB-MS decoding algorithm, for cases without and with the unknown channel offset. Moreover, the decoder structure and time complexity of the NNORB-MS algorithm remain similar to those of the regular RB-MS algorithm.

On Channel Quantization for Spin-Torque Transfer Magnetic Random Access Memory

As emerging memories such as spin-torque transfer magnetic random access memory (STT-MRAM) suffer from reliability issues caused by process variations and thermal fluctuations, the design of channel quantizer with the minimum number of quantization bits is critical to support effective error correction coding for ensuring high-density and high-speed memory data storage. In this paper, we first propose a quantized channel model for STT-MRAM. Based on the quantized channel model, we derive various information theoretic bounds, including the mutual information, cutoff rate, and the Polyanskiy-Poor-Verdu (PPV) finite-length performance bound. By using these bounds as design criteria, we optimize the quantizer design for the polar-coded STT-MRAM channel. Moreover, we also propose a polar-code-specific quantization design with the successive cancellation decoding algorithm, by using the block error probability bound obtained from density evolution (DE). Simulation results show that all our proposed quantizers generally outperform the prior art greedy merging quantizer. In addition, both the cutoff rate and PPV bound based quantizers outperform the most widely applied mutual information based quantizer for short-length polar codes with 2-bit quantization. Furthermore, the DE quantizer designed specifically for polar codes achieves the best performance among all the proposed quantizers.

A Study of Read Margin Enhancement for 3T2R Nonvolatile TCAM Using Adaptive Bias Training

In this paper, we propose an adaptive-bias-training circuit for enhancing the read reliability of ternary content-addressable memory (TCAM), which is implemented with resistive nonvolatile memories such as spin–torque transfer magnetic random access memory (STT-MRAM) and PRAM. The 3T2R nonvolatile-based TCAM (nvTCAM) is area-efficient, yet vulnerable to the process variation with fixed bias condition that affects the sensing margin. With adaptive bias training, the 3T2R nvTCAM cell can maintain a sufficient sensing margin when combined with a high-performance STT-MRAM with a resistance ratio (R-ratio) as low as 3.0. The foreground train followed by the on-the-fly track compensates for variations in the resistances of memory cells, threshold voltage, and substrate temperature. We evaluated the proposed bias technique using the 180-nm CMOS process with 1.8 V of VDD. The search speed is enhanced by 50% at a 64-bit word length, and the sensing margin is improved by 20%. Using our proposed bias technique, the read error rate induced by the variability is estimated to be contained below 1 ppb at an R-ratio of 2, indicating the decent productivity of gigabit density nvTCAM with STT-MRAM.

Design of Rate-Compatible Protograph LDPC Codes for Spin-Torque Transfer Magnetic Random Access Memory (STT-MRAM)

Thanks to its superior features of non-volatility, fast read/write speed, high endurance, and low power consumption, spin-torque transfer magnetic random access memory (STT-MRAM) has become a promising candidate for the next generation non-volatile memories (NVMs) and storage class memories (SCMs). However, it has been found that the write errors and read errors caused by thermal fluctuation and process variation severely degrade the reliability of STT-MRAM. Moreover, process imperfection also causes a diversity of the raw bit error rate (BER) among different dies of STT-MRAM. In this paper, we propose the design of novel rate-compatible protograph low-density parity-check (RCP-LDPC) codes to correct memory cell errors and mitigate the raw BER diversity of STT-MRAM. In particular, to deal with the asymmetric property of the STT-MRAM channel, we first apply an independent and identically distributed (i.i.d.) channel adapter to symmetrize the STT-MRAM channel. We then present a modified protograph extrinsic information transfer (P-EXIT) algorithm for the symmetrized STT-MRAM channel. We further propose a combined guideline, including the modified P-EXIT algorithm, the asymptotic weight enumerator (AWE) analysis, as well as the actual error rate performance, for designing protograph LDPC codes with short information word lengths for STT-MRAM. By further applying a code extension approach, we design novel RCP-LDPC codes that can work with a single encoder/decoder. Simulation results show that our proposed RCP-LDPC codes outperform the well-known rate-compatible AR4JA protograph codes as well as the fixed-rate quasi-cyclic (QC) LDPC codes in terms of both the error rate performance and the convergence speed over the STT-MRAM channel.

Polar Codes for Spin-Torque Transfer Magnetic Random Access Memory

Spin-torque transfer magnetic random access memory (STT-MRAM) is a promising non-volatile memory (NVM) technology due to its superior performance in terms of power consumption, write/read speed, endurance, and scalability. However, the reliability of STT-MRAM is affected by the process variation and thermal fluctuation, leading to both the write errors and read errors. Hence, it is important to develop error correction coding schemes to correct the memory cell errors and improve the system reliability. In this paper, we propose, for the first time, the design and optimization of polar codes for the STT-MRAM channel. In particular, as the STT-MRAM channel is asymmetric by nature, we first adopt an approach to symmetrize the channel so as to facilitate the design of effective polar codes. We then apply the density evolution method to construct polar codes and optimize their performance for the STT-MRAM channel. Furthermore, in order to mitigate the raw bit error rate diversity of STT-MRAM cells caused by process variations, we propose a rate-adaptive polar coding scheme in conjunction with an adaptive decoding algorithm. Simulation results and the decoder complexity analysis show that the constructed polar codes outperform both the Bose–Chaudhuri–Hoquenghem codes and low-density parity-check codes with lower decoding complexity, thus demonstrating the great potential of polar codes for improving the reliability of emerging NVMs.

Dynamic Threshold Detection Based on Pearson Distance Detection

We consider the transmission and storage of encoded strings of symbols over a noisy channel, where dynamic threshold detection is proposed for achieving resilience against unknown scaling and offset of the received signal. We derive simple rules for dynamically estimating the unknown scale (gain) and offset. The estimates of the actual gain and offset so obtained are used to adjust the threshold levels or to re-scale the received signal within its regular range. Then, the re-scaled signal, brought into its standard range, can be forwarded to the final detection/decoding system, where optimum use can be made of the distance properties of the code by applying, for example, the Chase algorithm. A worked example of a spin-torque transfer magnetic random access memory with an application to an extended (72, 64) Hamming code is described, where the retrieved signal is perturbed by additive Gaussian noise and unknown gain or offset.

Cascaded Channel Model, Analysis, and Hybrid Decoding for Spin-Torque Transfer Magnetic Random Access Memory

Spin-torque transfer magnetic random access memory (STT-MRAM) is a promising non-volatile memory technology widely considered to replace dynamic random access memory (DRAM). However, there still exist critical technical challenges to be tackled. For example, process variation and thermal fluctuation may lead to both write errors and read errors, severely affecting the reliability of the memory array. In this paper, we first propose a novel cascaded channel model for STT-MRAM that facilitates fast error rate simulations and more importantly the theoretical design and analysis of memory sensing and channel coding schemes. We analyze the raw bit error rate and probabilities of dominant error events, and derive the maximum likelihood decision criterion and the log-likelihood ratio of the cascaded channel. Based on these works, we further propose a two-stage hybrid decoding algorithm for extended Hamming codes for STT-MRAM. Simulation results demonstrate the effectiveness of the proposed hybrid decoding algorithm for improving the reliability of STT-MRAM in the presence of both write errors and read errors and supporting its potential applications, such as replacing DRAM.

Self‐adjusting sensing circuit without speed penalty for reliable STT‐MRAM

A self-adjusting sensing circuit spin-torque transfer magnetic random access memory (STT-MRAM) is proposed. STT-MRAM is considered to be the most promising candidate among the new emerging memories. However, read performance has emerged as a new bottleneck, because of its low tunnelling magneto-resistance ratio (TMR) and low read current. The proposed self-adjusting sensing circuit shows an improved sensing margin, overcoming the weaknesses of the STT-MRAM. The proposed circuit using Verilog-A model, a 65 nm complementary metal–oxide–semiconductor process also evaluated, and Monte Carlo analysis. The results of analysis show that the proposed circuit ensures a certain sensing margin, which is more than 200 mV in TMR 150% and about 50 mV in TMR 100%.

An Information Theory Perspective for the Binary STT-MRAM Cell Operation Channel

Spin-torque transfer magnetic random access memory (STT-MRAM) has emerged as a promising nonvolatile memory technology, with advantages, such as scalability, speed, endurance, and power consumption. This paper presents an STT-MRAM cell operation channel model with write and read operations for information theorists and error correction code designers. This model considers the effects of process variations and thermal fluctuations and considers all principle flaws during the fabrication and operation processes. With this model, evaluations are not only made for the write channel, the read channel, but also the write and read channel with metrics, such as operation failure rate, bit error rate, channel ergodic capacity, and channel outage probability at certain outage capacity. Moreover, it is proved that the distributions of written-in bit states are not uniformly distributed and are proportional to their respective write success probabilities. Finally, simulation results show that practical code rates and code block lengths can guarantee reliable performances only if the operation success rate difference between state 1 and state 0 is small enough.

Normally-off type nonvolatile static random access memory with perpendicular spin torque transfer-magnetic random access memory cells and smallest number of transistors

In this paper, we present a novel nonvolatile-random access memory (RAM) cell design based on a “normally-off memory architecture” using a perpendicular spin torque transfer-magnetic random access memory (STT-MRAM) based on a four-transistors static random access memory (SRAM) in order to reduce the operating power of mobile processors. After the cell design concept and basic operation are proposed, a stable and reliable operation for read/write is confirmed by circuit simulation.

Channel Capacity and Soft-Decision Decoding of LDPC Codes for Spin-Torque Transfer Magnetic Random Access Memory (STT-MRAM)

Spin-torque transfer magnetic random access memory (STT-MRAM) has emerged as a promising non-volatile memory (NVM) technology, featuring compelling advantages in scalability, speed, endurance, and power consumption. In this paper, we focus on large-capacity stand-alone STT-MRAM, and investigate the channel capacity and the viability of applying low-density parity-check (LDPC) codes with soft-decision decoding to correct the memory cell errors and improve the storage density of STT-MRAM. We propose to use LDPC codes with short codeword lengths, with the reliability-based min-sum (RB-MS) algorithm for decoding. Furthermore, we propose to use the capacity-maximization criterion to design the quantizer and minimize the number of quantization bits. Simulation results demonstrate the potential of applying short-block-length LDPC codes with soft-decision decoding to improve the yield and push the scaling limitation of STT-MRAM.

Design Methodologies for STT-MRAM (Spin-Torque Transfer Magnetic Random Access Memory) Sensing Circuits

Spin-torque transfer magnetic random access memory (STT-MRAM) is a promising technology for next generation nonvolatile universal memory because it reduces the high write current required by conventional MRAM and enables write current scaling as technology becomes smaller in size. However, the sensing margin is not improved in STT-MRAM and tends to decrease with technology scaling due to the lowered supply voltage and increased process variation. Moreover, read disturbance, which is an unwanted write in a read operation, can occur in STT-MRAM because its read and write operations use the same path. To overcome these problems, we present a load-line analysis method, which is useful for systematically analyzing the impacts of transistor size and gate voltage of MOSFETs on the sensing margin, and also propose an optimization procedure for the commonly applicable MRAM sensing circuits. This methodology constitutes an effective means to optimize the transistor size and gate voltage of MOSFETs and thus maximizes the sensing margin without causing read disturbance.