Slow-wave Transmission Lines Research Articles

Synthesis of slow-wave structures based on capacitive-loaded lines through aggressive space mapping (ASM)

This article is focused on the automated synthesis of slow-wave structures based on microstrip lines loaded with patch capacitors. Thanks to the presence of the shunt capacitors, the effective capacitance of the line is enhanced, and the phase velocity of the structure can be made significantly smaller than the one of the unloaded line. The target is to achieve the layout of the slow-wave structure able to provide the required slow-wave ratio, characteristic Bloch impedance and electrical length i.e., the usual specifications in the design of slow-wave transmission lines. To this end, a two-step synthesis method, based on the aggressive space mapping ASM algorithm, is proposed for the first time. Through the first ASM algorithm, the circuit schematic providing the target specifications is determined. Then, the second ASM optimizer is used to generate the layout of the structure. To illustrate the potential of the proposed synthesis method, three application examples are successfully reported. The two-step ASM algorithm is able to provide the layout of the considered structures from the required specifications, without the need of an external aid in the process. © 2015 Wiley Periodicals, Inc. Int J RF and Microwave CAE 25:629-638, 2015.

High-Speed Silicon Modulator With Slow-Wave Electrodes and Fully Independent Differential Drive

We demonstrate a fully independent differential-drive capable of traveling-wave modulator in silicon using slow-wave transmission line electrode. The reported 3.5-mm device achieves a bandwidth of 27 GHz at $-$ 1 V bias with 7.8-V small signal $V_\pi$ and 50- $\Omega$ impedance. Raising the impedance to this extent requires effectively expanding the RF mode size and radically changes the RF phase velocity, but we show that this can be done with minimal crosstalk effects between the two arms and overall velocity mismatch, and thus, with a high EO bandwidth achieved. 40-Gb/s operation is demonstrated with 1.6-Vpp differential-drive, and performance comparisons to Lithium Niobate modulators are made.

An X-Band Slow-Wave T/R Switch in 0.25-$\mu\hbox{m}$ SiGe BiCMOS

This brief presents a fully integrated X-band transmit/receive (T/R) switch using slow-wave transmission lines for X-band phased-array radar applications. The T/R switch was fabricated in a 0.25- <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex Notation="TeX">$\mu\hbox{m}$</tex></formula> SiGe bipolar CMOS (BiCMOS) process and occupies 0.73- <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\hbox{mm}^{2}$</tex></formula> chip area, excluding pads. The switch is based on shunt–shunt topology and employs isolated n-channel (NMOS) transistors and slow-wave microstrip lines. Additionally, resistive body floating and dc biasing are employed to improve the power-handling capability <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$({P}_{1\, {\rm dB}})$</tex></formula> of the switch. The T/R switch resulted in a measured insertion loss of 2.1–2.9 dB and isolation of 39–42 dB from 8 to 12 GHz. The input referred <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">${P}_{1\, {\rm dB}}$</tex></formula> is 27.6 dBm at 10 GHz. To our knowledge, this brief presents the utilization of slow-wave transmission lines in T/R switches for the first time. Furthermore, it can simultaneously satisfy stringent isolation, insertion loss, and power-handling capability requirements for implementing a fully integrated SiGe T/R module.

Compact and Broadband Millimeter-Wave Electrically Tunable Phase Shifter Combining Slow-Wave Effect With Liquid Crystal Technology

Based on a CMOS slow-wave coplanar-waveguide transmission-line topology, a novel compact millimeter-wave phase shifter is presented. The tunability is accomplished by using a liquid crystal (LC) material as a tunable dielectric between the coplanar signal strip and the shielding plane of the slow-wave transmission line. The device tunability is considerably enhanced by moving the free-standing signal strip with the application of a bias voltage. Combining the miniaturizing benefits of the slow-wave effect with the continuous tuning of LC material, the proposed device occupies only 0.38 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and exhibits high performance. The phase shifter was characterized up to 45 GHz for a maximum bias voltage of 20 V without significant power consumption. The reproducible measurements show a figure-of-merit (ratio between the maximum phase shift and the maximum insertion loss) of 51°/dB at 45 GHz.

Compact CMOS branch-line coupler using high-Q slow-wave transmission lines

This article presents a miniaturized 90° coupler incorporating slotted conductor-backed coplanar waveguide (S-CBCPW) transmission lines (TLs) and four shunt capacitors. The periodically slotted ground achieves higher slow-wave factor (SWF) or effective permittivity (εeff), and lower attenuation constant. Electrical characteristics of the S-CBCPW TLs are investigated by different slotted ground layers. Moreover, trade-offs among SWF, characteristic impedance, and electrical length for the design are also discussed. Finally, the measured 24-GHz coupler not only features smallest normalized chip area among previously reported CMOS couplers but also demonstrates excellent results which are comparable to the designs at 60 GHz. © 2013 Wiley Periodicals, Inc. Microwave Opt Technol Lett 55:1174–1178, 2013; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.27525

A Lossy Circuit Model Based on Physical Interpretation for Integrated Shielded Slow-Wave CMOS Coplanar Waveguide Structures

This paper presents a new physical model for shielded slow-wave coplanar waveguide structures. This lossy electrical model is based on physical behavior of the transmission lines. It allows a better understanding of the losses distribution along the structure. The ohmic losses in the coplanar strips, as well as the ohmic losses and the eddy current losses in the floating shield strips are studied for transmission lines having different geometrical dimensions and hence electrical characteristics. The model is then validated on different CMOS technologies and leads to the efficient optimization of the slow-wave transmission lines, especially concerning the floating shield dimensions.

Phase Compensation of Cascaded Conductor-Backed CPW Periodic Cells

Several unit cells of conductor-backed coplanar waveguides with and without loading using thin-film ceramic technology are investigated. The frequency-dependent lumped equivalent circuit values of the cells are extracted from the full-wave electromagnetic analysis. Slow-wave periodic transmission lines and end-coupling bandpass filters (BPFs) are designed, fabricated, and measured. Size reductions of 23% and 27% for the loaded filters and several times increase of inverter values for the coupling inverters are achieved compared to that for the unloaded ones. A systematic design method by using cell cascading with compensation is proposed for the designs of the lines and filters. It is also demonstrated that “finite ground,” used in conductor-backed coplanar waveguides in the literature, is no longer suitable for the end-coupling BPFs due to the leakages. The leakages of finite ground deteriorate the stopband rejection of filters as much as up to 32 dB compared with that of “via ground”.

A Mixed-Lattice Slow-Wave Transmission Line

Besides the slow-wave factor and attenuation, the dispersion characteristic is another important factor for evaluating the quality of the slow-wave transmission line. A novel slow-wave structure based on this mixed lattice topology is proposed. Due to the complementary dispersions of the lattice and pi-shaped topology, the phase characteristic of the proposed structure can be well controlled by varying the proportional ratio of lattice to pi-shaped part. As a result, the proposed structure exhibits not only a low insertion loss, a larger slow-wave factor, but also a linear phase response.

HIGH PERFORMANCE V-BAND GAAS LOW NOISE AMPLIFIER WITH MODIFIED COPLANAR WAVEGUIDE EBG TRANSMISSION LINES TECHNOLOGY

This paper presents an integrated millimeter-wave (mmW) low noise amplifler (LNA) which is implemented by using 0.15-m baseline GaAs pHEMT technology. The design utilized mod- ifled co-planar waveguide (CPW) to perform a slow wave transmission line (TLine) with electromagnetic band gap (EBG) ground structures for the input/output matching networks. The low noise V-band LNA chip size was hence reduced by adopting the new EBG transmission lines. The developed amplifler exhibited a noise flgure of 6.21dB, and a peak gain of 17.3dB at 66GHz. Additionally, the amplifler has linear characteristics and its measured third-order intercept (IIP3) point is greater than i0:5dBm under a dc power consumption of 75mW.

Enhanced performance of a 60-GHz power amplifier by using slow-wave transmission lines in 40 nm CMOS technology

This paper shows the contribution of slow-wave coplanar waveguides on the performance of power amplifiers operating at millimeter-wave frequencies in CMOS-integrated technologies. These transmission lines present a quality factor Q two to three times higher than that of the conventional microstrip lines at the same characteristic impedance. To demonstrate the contribution of the slow-wave transmission lines on integrated millimeter-wave amplifiers performance, two Class-A single-stage power amplifiers (PA) operating at 60 GHz were designed in standard 40 nm CMOS technology. One of the power amplifiers incorporates only the microstrip lines, whereas slow-wave coplanar transmission lines are considered in the other one. Both amplifiers are biased in Class-A operation, drawing, respectively, 22 and 23 mA from 1.2 V supply. Compared to the power amplifier using conventional microstrip transmission lines, the one implemented with slow-wave transmission lines shows improved performances in terms of gain (5.6 dB against 3.3 dB), 1 dB output compression point (OCP1dB: 7 dBm against 5 dBm), saturated output power (Psat: &gt;10 and 8 dBm, respectively), power-added efficiency (PAE: 16% instead of 6%), and die area without pads (Sdie: 0.059 mm2 against 0.069 mm2).

Development of a slow-wave MEMS phase shifter on CMOS technology for millimeter wave frequencies

We propose a slow-wave MEMS phase shifter that can be fabricated using the CMOS back-end and an additional maskless post-process etch. The tunable phase shifter concept is formed by a conventional slow-wave transmission line. The metallic ribbons that form the patterned floating shield of this type of structure are released to allow motion when a control voltage is applied, which changes the characteristic impedance and the phase velocity. For this device a quality factor greater than 40 can be maintained, resulting in a figure of merit on the order of 0.7dB/360° and a total area smaller than 0.14mm2 for a 60-GHz working frequency.

Wireless Temperature Sensing with BST-Based Chipless Transponder Utilizing a Passive Phase Modulation Scheme

A passive wireless temperature sensor with identification capabilities based on a phase modulation scheme is discussed in this paper. The approach presented utilizes a pulse backscatter technique based on slow wave (metamaterial) transmission lines. The focus of the work are the material engineering for the temperature-sensitive element and the integration of this element into a passive phase modulation circuit and the entire sensor tag. The approach makes use of temperature-sensitive bariumstrontium-titanate thick film capacitances. The discussed principle has been experimentally verified with a prototype.

100 GHz Parametric CMOS Frequency Doubler

A parametric MOS varactor-based integrated frequency doubler is reported. The circuit is implemented in 130 nm CMOS but uses a conservative 0.35 μm gate length and produces an output between 94 and 108 GHz with a minimum measured conversion loss of 14.5 dB and a maximum output power of -7.5 dBm. Slow-wave transmission line filters are employed to reduce circuit loss and the area required by the chip.

Impact of technology dispersion on slow-wave high performance shielded CPW transmission lines characteristics

Shielded coplanar waveguides are promising candidates for the development of high quality factor transmission lines in millimeter-wave frequency bands. In this article, state-of-the-art experimental results carried out on a CMOS 0.35 μm low-cost technology are presented. This letter especially deals with the benchmark of slow-wave transmission lines in focusing on the impact of technology dispersion on the measurement results. Eight dies have been measured, each from a different wafer, showing a robust design versus the technology. These results open new possibilities for the development of miniaturized low-loss compact passive devices. © 2010 Wiley Periodicals, Inc. Microwave Opt Technol Lett 52:2786–2789, 2010; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.25598

Metamaterial-based wideband rat-race hybrid coupler using slow wave lines

Based on derived convenient design equations for slow wave transmission lines and metamaterial line, a very compact and wideband rat-race hybrid coupler is proposed using three -90° slow wave lines and one -90° metamaterial line. The closed-form solutions for circuit parameters based on both phase and phase slope matching conditions are derived. At the design frequency of 2 GHz, the size of the proposed coupler is about 2.0 × 2.0 cm, which is a 85% reduction compared with the conventional one. In addition, the phase balance bandwidths based on ∠ S 21 -∠ S 31 (0±10°) and ∠ S 24 -∠ S 34 (180±10°) have been found to be 150 and 125%, which are 1.8 and 3.0 times improvements compared with those of the conventional one. The measured results are in reasonable agreement with the circuit- and EM-simulated ones.

High-Performance Slow-Wave Transmission Lines With Optimized Slot-Type Floating Shields

A novel slow-wave transmission line with optimized slot-type floating shields in advanced CMOS technology is presented. Periodical slot-type floating shields are inserted beneath the transmission line to provide substrate shielding and to shorten the electromagnetic (EM) propagation wavelength. This is the first study that demonstrates how the wavelength, attenuation loss, and characteristic impedance can be adjusted by changing the strip length (SL), strip spacing (SS), and metal layer position of the slot-type floating shields. Wavelength shortening needs to be achieved with a tradeoff between slow-wave effect and attenuation loss. The slot-type floating shields with different SLs, SSs and metal layer positions are analyzed. It is concluded that minimum SL provides the most optimal result. A design guideline can be established to enable circuit designers to reach the most appropriate slot-type floating shields for optimal circuit performance. Transmission line test structures were fabricated by using 45-nm CMOS process technology. Both measurement and EM waves simulation were performed up to 50 GHz. Transmission lines are frequently used at a length of half- or quarter-wavelength. With a shortened wavelength, a saving in silicon area of more than 67% can be achieved by using optimized slot-type floating shields. Experimental results demonstrated a higher effective relative permittivity value, which is improved by a factor of more than 9, and a better quality factor, which is improved by a factor of more than 6, as compared to conventional transmission lines.

Compact Modeling and Comparative Analysis of Silicon-Chip Slow-Wave Transmission Lines With Slotted Bottom Metal Ground Planes

A compact modeling approach for silicon-chip slow-wave transmission lines with slotted bottom metal ground planes is studied and its limitations are presented. The modeling approach facilitates the calculation of the slow-wave transmission line parameters based upon the corresponding coplanar and grounded coplanar transmission-line parameters. The described analysis method is used for a comparative study of the slow-wave structures versus their coplanar and grounded coplanar reference structures. Floating bottom shield slow-wave transmission lines are then compared with their grounded bottom shield counterparts. The theoretical results are supported by electromagnetic simulations and by measurements up to 30 and 50 GHz.

Compact Rat-Race Hybrid Coupler Using Slow Wave and Left-Handed Transmission Lines

Based on provided convenient design equations for slow wave transmission lines and metamaterial line, a very compact rat-race hybrid coupler is proposed using three slow wave lines and one metamaterial line. At the design frequency of 2GHz, the size of the proposed coupler is 2.3cm × 2.7cm, which is a 74% reduction compared with the conventional one. Despite the considerable size reduction, the theoretical bandwidths based on |S11|, |S31|, ∠S21-∠S31, and ∠S24-∠S34, have been improved by 9%, 7%, 31%, and 59%, respectively. The measured performances are in reasonable agreement with the theoretical ones.

MMICs Using SiGe BiCMOS for Ubiquitous Wireless Network

Recent progress in circuit design techniques for SiGe BiCMOS MMICs in microwave and millimeter-wave region are presented. The effectiveness of low-power MMIC design techniques and slow-wave transmission line design technique were confirmed through the measurements using fabricated chips.

Analysis of On-Chip Asymmetric Coaxial Waveguide Structure for Chip Area Reduction

Chip areas can be efficiently utilized when transmission lines designed for slow-wave propagation are used. Running two-dimensional simulations of a coplanar waveguide (CPW) and a simple floating-shield, slow-wave structure (S-CPW) demonstrate the limitations of the inductive and capacitive quality factors of transmission lines. This establishes a method of engineering the line inductance and capacitance to realize an asymmetric coaxial waveguide (ACW). The ACW is realized on-chip using ground metal placed around a center conductor. The ground metal include slotted top metal, which are normally used for pads, that caps the structure. Measurements show that the increased phase constant of the ACW, which determines the reduced physical length corresponding to the wavelength, is 3.3 times higher than that of the CPW and the microstrip line. Measurements are also shown for the slow-wave transmission line (SWTL) for comparison. All structures have been fabricated using a 90 nm complementary metal oxide semiconductor (CMOS) process for frequencies up to 110 GHz.