Silicon Carrier Research Articles

Effects of tantalum penetration through hafnium oxide layer on carrier generation rate in silicon substrate and carrier mobility degradation

This letter presents the effects of tantalum penetration through hafnium oxide on bulk carrier generation rates and carrier mobility degradation. The penetration of Ta atoms degraded the bulk carrier lifetime in the Si substrate. Surface nitrogen incorporation can be useful to mitigate Ta penetration into the Si substrate. The incorporated Ta in the dielectric was found to have no effect on the effective κ value. On the other hand, it increased pre-existing traps and interface states. Thus, mobility degradation for tantalum nitride gate devices was primarily caused by pre-existing traps and interface states of the high-k dielectrics.

Influence of SiC and FeSi addition on the characteristics of gray cast iron melts poured at different temperatures

The influence of silicon carbide and ferrosilicon as silicon carriers on the cooling curve characteristics, fluidity, microstructure, chill depth and hardness of hypoeutectic gray cast irons poured at different temperatures has been investigated. It has been found that the addition of SiC instead of FeSi as a silicon carrier resulted in variations in the thermal analysis characteristics and microstructure together with increasing fluidity as well as decreasing chill depth for the whole range of pouring temperatures explored. Microstructural studies revealed that SiC addition resulted in the maximum amount of A-typed graphite with a more uniform distribution. The finest microstructure (i.e. refined eutectic cells) was also obtained with SiC addition. These observations were attributed to the pre-inoculation behavior of SiC in gray cast iron with a slow fading tendency within the melt during solidification.

Influence of inoculant and/or SiC addition on characteristics of grey cast iron

The influence of inoculant additions on the cooling curve characteristics, microstructure and chill depth of hypoeutectic grey cast iron melts treated with FeSi or SiC as silicon carriers has been investigated. The effect of SiC content, when used simultaneously with FeSi as a silicon carrier, on the solidification behaviour of melts with an identical carbon equivalent has also been studied. It has been found that the addition of SiC instead of FeSi as a silicon carrier resulted in variations in the thermal analysis characteristics and microstructure together with decreasing chill depth. These effects were more pronounced for inoculated melts. It was also observed that the maximum amount of A-type graphite, the finest microstructure and the minimum chill depth were obtained with 1.6–2.0 wt-%SiC additions, for grey cast iron melts (treated with SiC and FeSi) having carbon equivalents of 4.2%.

Polymer encapsulated miniature Nd:YAG lasers

A continuation of the previously introduced microstructured silicon carrier concept for diode-pumped solid-state lasers is presented, using novel heat-conducting polymers as a carrier. The most prominent features of the silicon carrier concept are maintained, adding to the mass production possibilities of the inexpensive polymers. The first experiments, using a continuous wave Nd:YAG microchip laser, have given an output power of 2 W at 1064 nm, showing the potential of this new approach.

Temperature dependence of silicon carrier effective masses with application to femtosecond reflectivity measurements

The conductivity effective masses of electrons and holes in Si are calculated for carrier temperatures from 1 to 3000 K. The temperature dependence of the electron mass is calculated by use of a phenomenological model of conduction-band nonparabolicity that has been fitted to experimental measurements of the dependence of the electron conductivity effective mass on carrier concentration. The hole mass is investigated by tight-binding calculations of the valence bands, which have been adjusted to match experimental values of the valence-band curvature parameters at the top of the valence band. The calculations are in excellent agreement with femtosecond-laser reflectivity measurements of the change in optical effective mass as hot carriers cool from 1550 to 300 K.

Low temperature passivation of silicon surfaces by polymer films

A novel surface passivation method for silicon carrier lifetime measurements and solar cells using a polymer film is introduced. It is easy to apply, no special pre-treatment, e.g. no hydrofluoric acid (HF)-treatment, is necessary. The surfaces to be passivated are covered with the polymer solution, dried at 90°C and encapsulated. Surface recombination velocities ( S) as low as S=30 cm/s for various doping concentrations have been observed, nearly independent of the bulk injection level. The passivation is stable for at least 6 h. For a polymer-passivated rear contact solar cell the same open circuit voltage is achieved as for a cell with thermally grown oxide.

Improved performance in silicon enzyme microreactors obtained by homogeneous porous silicon carrier matrix

The catalytic performance of porous silicon (PS) micro enzyme reactors (μIMER) is strongly dependent on the PS matrix morphology for enzyme immobilisation. PS was achieved in the μIMER by anodisation in a HF–ethanol mixture. PS etching of structured silicon surfaces commonly results in an inhomogeneous pore formation. The deep channel microreactors described herein have previously suffered from these phenomena, yielding non-optimised μIMERs. In order to obtain a homogeneous PS layer on the deep microreactor channel walls, different reactor geometries (channel wall thicknesses of 50 and 75 μm) were anodised at 10 and 50 mA cm −2 for anodisation times ranging between 0 and 50 min. The μIMERs were evaluated by immobilising two types of enzymes, glucose oxidase (GOx) and trypsin, and the resulting catalytic turnover was monitored by a colorimetric assay. It was found that reactors with a homogeneous PS matrix displayed improved performance. The trypsin μIMERs were used to digest a protein, β-casein, in an on-line format and the digest was analysed by MALDI-TOF MS. The importance of tailoring the μIMER geometry and the PS-matrix is crucial for the protein digestion. Successful protein identification after only 12 s. digestion was demonstrated for the best reactor, 75 μm channel wall, 25 μm channel width, anodised at 50 mA cm −2 for 10 min.

Ciba Specialty Chemicals buys inorganic oxygen absorbers from BP Amoco

Oxygen scavengers which are based on oxidation of iron powder dispersed in a polymer matrix are established in the packaging industry. They protect foods from oxygen. The iron particles have a diameter of several micrometers, which is too high to allow thin layers in multilayer film structures. A promising alternative is a developed nanoscale oxygen scavenger which is subject of this study. The aim of this study was to evaluate the oxygen absorption rate and the oxygen absorption capacity of nanoscale iron at 100% relative humidity and at dry conditions.Nanoscale oxygen scavengers (zero valent iron particles) were synthesized. Their reactivity was tested. Furthermore, they were blended with a silicone matrix. The nanoscale oxygen scavenger absorbed oxygen in wet (100% relative humidity) and dry conditions. At 100% relative humidity the reaction rate of the powder was two to three times higher compared to non-nanoscale iron powder. The absorption rate of the nanoscale iron dispersed in a silicon carrier was at least ten times higher at 100% relative humidity compared to a commercially available iron based oxygen scavenger in a polyethylene or polypropylene polymer matrix.

Extensive monitoring during auditory brainstem implant surgery.

In patients with reduced auditory nerve function, for example due to tumour removal or an accident, hearing rehabilitation can be elicited by an auditory brainstem implant (ABI). The electrode array of the ABI manufactured by Cochlear Ltd., Sydney, consists of 21 circled contacts in a silicon carrier. This is inserted in the lateral recess of the fourth ventricle. Since 1996, in Hannover eight patients have been implanted with a cochlear ABI Nucleus 21 + 1. All of them were profoundly deaf on both sides due to neurofibromatosis type 2 (NF2). To find the optimal electrode position during surgery, a multimodal monitoring by auditory evoked potentials (AEP), electromyography (EMG) and somatosensory evoked potentials (SEP) was performed. When monitoring AEPs, the function of the implant can be checked first by the stimulus artefact. By analysing the AEPs in more detail, the optimal positioning of the electrode on the cochlear nucleus can be found. If systems other than the auditory system are stimulated this will be revealed in one or more of the AEP, EMG and SEP recordings. According to the literature, AEPs stimulated by an ABI consist of three vertex positive peaks with latencies shorter than 4 ms. Typical AEPs are correlated with good post-operative hearing sensation. Comparing these AEPs with AEPs stimulated acoustically or electrically at different sites of the auditory system, it can be assumed that the first peak corresponds to J3, the second to J4 and the last to J5. From this comparison it can also be concluded that no potentials should occur later than 5 ms. This corresponds to our findings. Post-operatively, side-effects occurred when areas of the electrode array were stimulated that showed potentials with latencies longer than 5 ms intra-operatively. Our results indicate that monitoring is an essential aid for the surgeon in finding the optimal electrode position. Positioning solely with reference to anatomical landmarks may not be enough to find the optimal functional position.

Substrate integrated packaging for RF‐applications

In this paper, Substrate Integrated Packaging (SIP) based on thin film multilayer technology is presented. Coplanar waveguide feedthroughs calculated with 3D‐Finite Differential Methods were manufactured using a ceramic or silicon carrier, gold conductors and polyimide as dielectric. The substrate integrated packages were realized with metallic frames and lids mounted on the thin film circuitry. S‐parameter measurements show the superior quality of the feedthroughs. To verify the new packaging concept, a 10GHz and a 58GHz amplifier module were realized. From these modules the potential of the SIP‐technology is demonstrated.

Diode-pumped miniature lasers using microstructuredsiliconcarriers

A new versatile design concept for compact diode-pumped solid-state lasers based on a microstructured silicon carrier with etched V-grooves is presented. The carrier provides efficient thermal management as well as compact integration and alignment of all active and passive optical components. In initial experiments, an Nd:YAG laser delivered a continuous-wave output of 3 W.

Pore morphology influence on catalytic turn-over for enzyme activated porous silicon matrices

The enzyme glucose oxidase (GOx) was coupled to porous silicon of different morphologies and the catalytic turn-over of glucose was recorded for the samples. The recorded catalytic turn-over of the samples clearly indicated the influence of morphology, with respect to dopant concentration and current density, of the porous silicon carrier matrix. The highest rise in catalytic turn-over (350 times), when compared to a non-porous surface, was recorded for a sample with an n-type epilayer on an n+-type substrate anodised at 100 mA/cm2. A storage and operational stability measurement was performed on the sample showing the highest catalytic efficiency. After 5 months of refrigerated storage a 2% loss of activity was noted, and after 4 days of constant glucose load (0.5 mM) a 56% loss of activity was recorded. A BET (Brunauer, Emmet, and Teller) nitrogen adsorption analysis was performed on one of the substrate types, p+-type (0.001–0.025 Ω cm). In spite of the fine porous morphology with a high surface area the recorded enzyme activities were moderate. The pore morphology achieved on this substrate most likely comprised too small pores in a too dense porous matrix giving poor diffusion conditions to give efficient access for the enzyme during the coupling procedure and for the reactant transport during operation to fully utilise the surface enlargement of the porous layer.

Microwave photonic multichip modules packaged on a glass-silicon substrate

A hybrid microwave photonic integration technology known as optoelectronic glass microwave integrated circuit (opto-GMIC) has been developed. It is a multichip module approach that uses a glass substrate on a silicon carrier to interconnect both discrete and monolithic microwave and optoelectronic devices. The glass substrate can support both lumped and distributed elements, thus reducing the number of parts in assembly. In addition, a wide variety of microwave photonic multichip module designs can be produced from the same production line. This has been demonstrated by the fabrication of prototype fiber-optic repeaters, transmitters, and receivers designed for synchronous optical network applications at a bit rate of 622.08 Mb/s and a wavelength of 1.3 /spl mu/m. >

Imaging of Silicon Carrier Dynamics with Near-Field Scanning Optical Microscopy

AbstractA contactless high spatial resolution technique has been developed to characterize semiconductor materials using the Near-Field Scanning Optical Microscope. The technique can be used to non-invasively measure: surface topography, defect content, and carrier lifetime variations in silicon. The success of the technique relies on the sensitive detection of changes in infrared transmission induced by local generation of free carriers using pulsed visible radiation. Here we extend the application of this technique to characterize silicon on insulator materials. We also include computer simulation results to address the role played by diffusion in the ultimate lateral resolution that can be achieved using this technique.

A theoretically accurate mobility model for semiconductor device drift-diffusion simulation

A novel semiconductor charge carrier mobility model obtained by Kohler's variational method for Boltzmann transport equation solution is presented. Acoustic phonon scattering, ionized impurity scattering, and carrier-carrier scattering are taken into account. Majority electron and hole mobilities in n- and p-type silicon versus impurity and carrier concentration, and temperature are calculated and compared with published experimental data.

Assembly of laser-fiber arrays

This paper describes techniques and machinery for first-level packaging of laser-to-fiber interconnects using batch assembly and active alignment. These techniques are economical because the costs of labor-intensive processes, such as parts handling, fiber-polishing, and alignment, are shared among the many elements of the array. Using these techniques, prototype packages have been built consisting of 32-wide arrays of 1300 nm lasers coupled to 32-wide arrays of single-mode fiber-optic stubs. Building the package involves three steps: (1) preparing the laser array for handling and alignment by soldering it to a metallized silicon carrier; (2) building the fiber array by stripping the fibers, placing them precisely into etched silicon V-grooves, bonding them in place, and polishing both ends; and (3) aligning the two arrays to each other using batch, active alignment. Batch alignment succeeds to the extent that each array is collinear, so the collinearity achieved in processes (1) and (2) is crucial. Typically, collinearity of /spl plusmn/1 /spl mu/m or better is achieved for each array. When such arrays are batch aligned using the techniques described herein, the average coupling efficiency is about 88% as large as it would be if each laser-fiber pair were optimally aligned individually. >

Reliability of Flex Coatings for High-Performance Applications

AbstractA study was undertaken to select a suitable coating for a high-pin-count flexible edge connector (Flex) that interconnected a multichip thin-film silicon carrier to a printed circuit board. The Flex with cantilevered inner leads were joined to the contact pads at the perimeter of the carrier. 15 polymeric coatings were evaluated by subjecting coated Flexes to tests consisting of inner lead bending, temperature/humidity/bias (85°C/80%/15 V/350 hours), corrosion, line peel, and/or pressure cooker (126°C/20 psig/120 hours). Inner lead bending measurements were performed to assess the potential of lead shorting at the inner lead bonding sites during thermal cycling. From this study, a low-stress silicone evolved as the best candidate. The results leading to this conclusion will be shown and discussed.

Bending of Flex Leads During Thermal Cycling

AbstractA three dimensional finite-element stress model was used to simulate the lead bending incurred during thermal cycling of a Flex connector joined to a silicon carrier via an eutectic solder. Three different coating conditions (no coating, with a polyimide coating, and with a silicone coating) were simulated. With the polyimide coating, lead bending was found to occur at the corner inner leads of the Flex as a result of the plastic strains accumulated there during thermal cycling. In the case of silicone, the corresponding plastic strains grew during the first thermal cycle but saturated subsequently, confirming the negligible lead bending observed experimentally. For the case of no coating, the highest plastic strain was found to be borne in part by the polyimide film at its edge and thus no significant bending was observed. In all cases, the results provided by the model agree well with the experimental observations.

The Study of Silicon Diffusion into GaAs by Rapid Thermal Oxidation

ABSTRACTThe diffusion of silicon into GaAs was investigated in this work. Shallow silicon carrier profile with doping levels in excess of 1018 cm−3 were obtained in GaAs by rapid thermal oxidation (RTO) of Si cap film in pure O2 with pressure 2 torr at 800 ∼ 900 ° C. SIMS revealed the presence of various degrees of interdiffusion in / near the interface between Si and GaAs as being a function of oxidation temperature and cap thickness. Ga and As atoms were observed in Si film. Silicon and oxygen were also found in the GaAs wafer. The silicon and arsenic atoms were segregated in / near the interface. The Si atoms could be driven further into GaAs by additional rapid thermal annealing (RTA) process. The above phenomena were confirmed by the electrical measurements taken on sheet resistance, doped dose, and mobility. The TaSix / GaAs Schottky barriers were also fabricated. The ideality factor, Schottky barrier height, and breakdown voltage are the functions of the doping level. This behavior could be accounted for by the theory of tunnel effect of Schottky barrier.

A 100-V lateral DMOS transistor with a 0.3-micrometer channel in a 1-micrometer silicon-film-on-insulator-on-silicon

A novel LDMOS transistor structure with breakdown voltages above 100 V has been fabricated in silicon-on-insulator-on-silicon (SOIS). This structure has been fabrication by silicon direct bonding (SDB) and etch-back to a typical film thickness of 1 mu m. The silicon carrier layer (handle) serves as a back-gate electrode, which, under proper bias, improves the transistor characteristics significantly. The effective channel length or basewidth is 0.3 mu m. Under these conditions, the drift region becomes the current-limiting element. The physics in the drift region in thin silicon films (<or=1 mu m) in the transistor on-state is dominated by the injected electrons from the channel. The limitation of the maximum drain current is given by the quasi-saturation effect. Criteria for the further optimization of SOIS LDMOS transistors are presented.<<ETX>>