Semiconductor Thin-film Transistors Research Articles

Improved Performance and Bias Stability of Al2O3/IZO Thin-Film Transistors with Vertical Diffusion

Several studies on amorphous oxide semiconductor thin-film transistors (TFTs) applicable to next-generation display devices have been conducted. To improve the poor switching characteristics and gate bias stability of co-sputtered aluminum–indium–zinc oxide (AIZO) TFTs, we fabricate Al2O3/indium–zinc oxide (IZO) dual-active-layer TFTs. By varying the Al2O3 target power and oxygen partial pressure in the chamber during Al2O3 back-channel deposition, we optimize the electrical characteristics and gate bias stability of the Al2O3/IZO TFTs. The Al2O3/IZO TFTs, which are fabricated under 50 W Al2O3 target power and 13% oxygen partial pressure conditions, exhibit a high electron mobility of 23.34 cm2/V·s, a low threshold voltage of 0.96 V, an improved on–off current ratio of 6.8 × 107, and a subthreshold swing of 0.61 V/dec. Moreover, by increasing the oxygen partial pressure in the chamber, the positive and negative bias stress values improve to +0.32 V and −2.08 V, respectively. X-ray photoelectron spectroscopy is performed to reveal the cause of these improvements.

Research Progress of p-Type Oxide Thin-Film Transistors.

The development of transparent electronics has advanced metal–oxide–semiconductor Thin-Film transistor (TFT) technology. In the field of flat-panel displays, as basic units, TFTs play an important role in achieving high speed, brightness, and screen contrast ratio to display information by controlling liquid crystal pixel dots. Oxide TFTs have gradually replaced silicon-based TFTs owing to their field-effect mobility, stability, and responsiveness. In the market, n-type oxide TFTs have been widely used, and their preparation methods have been gradually refined; however, p-Type oxide TFTs with the same properties are difficult to obtain. Fabricating p-Type oxide TFTs with the same performance as n-type oxide TFTs can ensure more energy-efficient complementary electronics and better transparent display applications. This paper summarizes the basic understanding of the structure and performance of the p-Type oxide TFTs, expounding the research progress and challenges of oxide transistors. The microstructures of the three types of p-Type oxides and significant efforts to improve the performance of oxide TFTs are highlighted. Finally, the latest progress and prospects of oxide TFTs based on p-Type oxide semiconductors and other p-Type semiconductor electronic devices are discussed.

9‐2: Oxide TFT behavior Under X‐Ray Irradiation in DXD Backplane

Recently, the digital X‐ray detector (DXD) technology requires high quality and high frame rate dynamic images, so efforts are being made to apply an oxide semiconductor (OS) thin film transistor (TFT) to the DXD backplane as a switching device instead of an amorphous Si (a‐Si) TFT. In order for the OS TFT to be used as a switching device of the X‐ray detector, it is necessary to study about the degradation parameters of the OS TFT under X‐ray irradiation. We confirmed that the threshold voltage (Vth) of the InGaZnO (IGZO) TFTs shifted negatively without s‐factor degradation according to X‐ray exposure. To understand these characteristics, we evaluated the X‐ray degradation characteristics of various methods.

Self-Compensation Effect of Photo-Bias Instabilities in a-InGaZnO Thin-Film Transistors Induced by Unique Ion Migration

The a-InGaZnO (a-IGZO) thin-film transistors (TFTs) in elevated-metal metal-oxide (EMMO) architecture was found to exhibit high stability against photo-bias stresses. In contrast to the common photo-enhanced degradation, an abnormal self-compensation effect of photo-bias instabilities was first observed for amorphous oxide semiconductor (AOS) TFTs. By analyzing the defect states and element distributions in both channel and source/drain (S/D) regions, the unique migration of thermally generated metal interstitials in a-IGZO S/D was clarified to be the origin. More specifically, the positive bias stress (PBS)-induced negative shift of threshold voltage ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text{th}}$ </tex-math></inline-formula> ) originates from the ionization of positive metal ions near the backchannel, while these positively charged ions can be compensated by the illumination-excited electrons, resulting in photo-stable AOS TFTs. This also provides a flexible way to implement the electrically stable depletion-mode AOS TFTs.

Reconfigurable Artificial Synapses with Excitatory and Inhibitory Response Enabled by an Ambipolar Oxide Thin-Film Transistor.

A gate-tunable synaptic device controlling dynamically reconfigurable excitatory and inhibitory synaptic responses, which can emulate the fundamental synaptic responses for developing diverse functionalities of the biological nervous system, was developed using ambipolar oxide semiconductor thin-film transistors (TFTs). Since the balanced ambipolarity is significant, a boron-incorporated SnO (SnO:B) oxide semiconductor channel was newly developed to improve the ambipolar charge transports by reducing the subgap defect density, which was reduced to less than 1017 cm-3. The ambipolar SnO:B-TFT could be fabricated with a good reproductivity at the maximum process temperature of 250 °C and exhibited good TFT performances, such as a nearly zero switching voltage, the saturation mobility of ∼1.3 cm2 V-1 s-1, s-value of ∼1.1 V decade-1, and an on/off-current ratio of ∼8 × 103 for the p-channel mode, while ∼0.14 cm2 V-1 s-1, ∼2.2 V decade-1and ∼1 × 103 for n-channel modes, respectively. The ambipolar device imitated potentiation/depression behaviors in both excitatory and inhibitory synaptic responses by using the p- and n-channel transports by tuning a gate bias. The low-power consumptions of <20 and <2 nJ per pulse for the excitatory and inhibitory operations, respectively, were also achieved. The presented device operated under an ambient atmosphere and confirmed a good operation reliability over 5000 pulses and a long-term air environmental stability. The study presents the high potential of an ambipolar oxide-TFT-based synaptic device with a good manufacturability to develop emerging neuromorphic perception and computing hardware for next-generation artificial intelligence systems.

Drain Current Drop in Oxide Semiconductor Thin-Film Transistors: The Mechanisms and a Solution

The reliability of amorphous oxide semiconductor thin-film transistors (AOS-TFTs) is vital for high-definition displays and functional electronic devices. However, drain current drop (DCD) degradation has been commonly observed in the output characteristics of thin-film transistors (TFTs) with channel lengths of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${L} &lt; 10 \mu \text{m}$ </tex-math></inline-formula> . Here, we show that DCD is a reversible process that is closely related to reduced metal-oxygen bonds. Based on device theory and simulations, we propose that the DCD effect is mainly caused by hot carriers, whose velocities are inversely proportional to the drain depletion width. Therefore, DCD failure could be alleviated simply by using the drain-offset structure. Experiments show that drain-offset TFTs improve DCD critical voltages (by ~130%) without sacrificing the ON-/ OFF-ratio. These studies provide theoretical and experimental approaches to effectively suppress DCD.

Correction to: Metal oxide semiconductor thin-film transistor backplanes for displays and imaging

Correction to: Metal oxide semiconductor thin-film transistor backplanes for displays and imaging

Organic-Inorganic Hybrid Gate Dielectrics Using Self-Assembled Multilayers For Low-Voltage Operating Thin-Film Transistors

Advanced electronic materials have attracted great interest for their potential use in flexible, large-area, and printable electronic applications. However, fabricating high-performance low-voltage thin-film transistors (TFTs) for those applications with these advanced semiconductors is still challenging because of a lack of dielectric materials which satisfy both the required electrical and physical performance. In this work, we report self-assembled hybrid multilayer gate dielectrics prepared using a facile solution procedure to achieve organic semiconductor and amorphous oxide semiconductor-based thin-film transistors with ultralow operating voltage. These self-assembled hybrid multilayer gate dielectrics were constructed by iterative self-assembly of synthesized bifunctional phosphonic acid-based organic molecules and ultrathin high-k hafnium oxide layers. The novel self-assembled hybrid multilayer gate dielectrics exhibit excellent dielectric properties with exceptionally large capacitances (up to 815 nF/ cm2) and low-level leakage current densities of &lt; 1.56 × 10-6 A/cm2, featureless morphology (RMS roughness &lt; 0.24 nm), and thermal stability (up to 300 °C). Consequently, these hybrid gate dielectrics can be incorporated into thin-film transistors with pentacene as p-type organic semiconductors, and with indium oxide as n-type inorganic semiconductors. The resulting TFTs functioned at ultralow voltages (&lt; ± 2 V) and achieved high transistor performances (hole mobility: 0.88 cm2 / V·s, electron mobility: 7.8 cm2 / V·s and on/off current ratio &gt;104, and threshold voltage: ± 0.5 V).

Cation Composition-Dependent Device Performance and Positive Bias Instability of Self-Aligned Oxide Semiconductor Thin-Film Transistors: Including Oxygen and Hydrogen Effect.

Amorphous oxide semiconductor transistors control the illuminance of pixels in an ecosystem of displays from large-screen TVs to wearable devices. To satisfy application-specific requirements, oxide semiconductor transistors of various cation compositions have been explored. However, a comprehensive study has not been carried out where the influence of cation composition, oxygen, and hydrogen on device characteristics and stability is systematically quantified, using commercial-grade process technology. In this study, we fabricate self-aligned top-gate structure thin-film transistors with three oxide semiconductor materials, InGaZnO (In/Ga/Zn = 1:1:1), In-rich InGaZnO, and InZnO, having mobility values of 10, 27, and 40 cm2/V·s, respectively. Combinations of varied amounts of oxygen and hydrogen are incorporated into each transistor by controlling the fabrication process to study the effect of these gaseous elements on the physical nature of the channel material. Electrons can be captured by peroxy linkage (O22-) or undercoordinated In (In* to become In+), which are manifested in the extracted subgap density-of-states profile and first-principles calculations. Energy difference between electron-trapped In+ and O22- σ* is the smallest for IGZO, and In+-O22- annihilation occurs by electron excitation from the subgap In+ state to the O22- σ*. Furthermore, characteristic time constants during positive bias stress and recovery reveal the various microscopic physical phenomena within the transistor structure between different cation compositions.

Improved Electrical and Temporal Stability of In-Zn Oxide Semiconductor Thin-Film Transistors With Organic Passivation Layer

Solution-processed In-Zn oxide (IZO) semiconductor thin-film transistors (TFTs) were fabricated with passivation layers of either poly(methyl methacrylate) (PMMA) or cyclic transparent optical polymer (CYTOP). According to the transfer curves obtained on the day of fabrication and after 200 days, the drain-source current of the IZO TFT without a passivation layer decreased by approximately 37 &#x0025;. For the PMMA-passivated IZO TFT, it decreased by approximately 31 &#x0025;. The current for the CYTOPpassivated IZO TFT showed significantly lower, only 7 &#x0025; deterioration. Hence, the CYTOP-passivated IZO TFT exhibited improved electrical stability under long term ambient storage. This was attributed to the difference in the chemical composition of the two polymers, as CYTOP is a fluoropolymer, while PMMA is an ester group containing organic polymer. We show, passivation of the active layer with the proper organic film improves the stability of the high-performance solution-processed IZO TFTs.

Investigation of p-type Oxide Semiconductor Thin Film Transistors for Complementary Metal Oxide Semiconductor Technologies

Investigation of p-type Oxide Semiconductor Thin Film Transistors for Complementary Metal Oxide Semiconductor Technologies

An immunosensor based on a high performance dual-gate oxide semiconductor thin-film transistor for rapid detection of SARS-CoV-2.

Severe acute respiratory syndrome coronavirus 2 (SARS-CoV-2) is the agent of an infectious disease that has led the WHO to declare its highest level (6) pandemic. The coronavirus disease 2019 (COVID-19) has spread rapidly around the world, and the number of confirmed cases has passed 246 million as of November 2021. Therefore, precise and fast virus detection protocols need to be developed to cope with the rapid spread of the virus. Here, we present a high performance dual-gate oxide semiconductor thin-film transistor (TFT)-based immunosensor for detecting SARS-CoV-2. The immunosensor has an indium tin oxide sensing membrane to which the antibody against the SARS-CoV-2 spike S1 protein can be immobilized through functionalization. The dual-gate TFT was stable under ambient conditions with near-zero hysteresis; capacitive coupling yields a 10.14 ± 0.14-fold amplification of the surface charge potential on the sensing membrane and improves the pH sensitivity to 770.1 ± 37.74 mV pH-1 above the Nernst limit. The immunosensor could rapidly detect the SARS-CoV-2 spike S1 protein and cultured SARS-CoV-2 in 0.01× PBS with high antigen selectivity and sensitivity. Our immunosensor can accurately measure the electrical changes originated from SARS-CoV-2, without the need for polymerase chain reaction tests or labeling.

An Empirical Modeling of Gate Voltage-Dependent Behaviors of Amorphous Oxide Semiconductor Thin-Film Transistors including Consideration of Contact Resistance and Disorder Effects at Room Temperature.

In this paper, we present an empirical modeling procedure to capture gate bias dependency of amorphous oxide semiconductor (AOS) thin-film transistors (TFTs) while considering contact resistance and disorder effects at room temperature. From the measured transfer characteristics of a pair of TFTs where the channel layer is an amorphous In-Ga-Zn-O (IGZO) AOS, the gate voltage-dependent contact resistance is retrieved with a respective expression derived from the current–voltage relation, which follows a power law as a function of a gate voltage. This additionally allows the accurate extraction of intrinsic channel conductance, in which a disorder effect in the IGZO channel layer is embedded. From the intrinsic channel conductance, the characteristic energy of the band tail states, which represents the degree of channel disorder, can be deduced using the proposed modeling. Finally, the obtained results are also useful for development of an accurate compact TFT model, for which a gate bias-dependent contact resistance and disorder effects are essential.

Application of Laser Treatment in MOS-TFT Active Layer Prepared by Solution Method.

The active layer of metal oxide semiconductor thin film transistor (MOS-TFT) prepared by solution method, with the advantages of being a low cost and simple preparation process, usually needs heat treatment to improve its performance. Laser treatment has the advantages of high energy, fast speed, less damage to the substrate and controllable treatment area, which is more suitable for flexible and large-scale roll-to-roll preparation than thermal treatment. This paper mainly introduces the basic principle of active layer thin films prepared by laser treatment solution, including laser photochemical cracking of metastable bonds, laser thermal effect, photoactivation effect and laser sintering of nanoparticles. In addition, the application of laser treatment in the regulation of MOS-TFT performance is also described, including the effects of laser energy density, treatment atmosphere, laser wavelength and other factors on the performance of active layer thin films and MOS-TFT devices. Finally, the problems and future development trends of laser treatment technology in the application of metal oxide semiconductor thin films prepared by solution method and MOS-TFT are summarized.

Numerical Analysis of Oxygen-Related Defects in Amorphous In-W-O Nanosheet Thin-Film Transistor.

The integration of 4 nm thick amorphous indium tungsten oxide (a-IWO) and a hafnium oxide (HfO2) high-κ gate dielectric has been demonstrated previously as one of promising amorphous oxide semiconductor (AOS) thin-film transistors (TFTs). In this study, the more positive threshold voltage shift (∆VTH) and reduced ION were observed when increasing the oxygen ratio during a-IWO deposition. Through simple material measurements and Technology Computer Aided Design (TCAD) analysis, the distinct correlation between different chemical species and the corresponding bulk and interface density of states (DOS) parameters were systematically deduced, validating the proposed physical mechanisms with a quantum model for a-IWO nanosheet TFT. The effects of oxygen flow on oxygen interstitial (Oi) defects were numerically proved for modulating bulk dopant concentration Nd and interface density of Gaussian acceptor trap NGA at the front channel, significantly dominating the transfer characteristics of a-IWO TFT. Furthermore, based on the studies of density functional theory (DFT) for the correlation between formation energy Ef of Oi defect and Fermi level (EF) position, we propose a numerical methodology for monitoring the possible concentration distribution of Oi as a function of a bias condition for AOS TFTs.

A comprehensive density-of-states model for oxide semiconductor thin film transistors

In this paper, a novel and comprehensive density-of-states model is presented to understand the origin of conductivity and the performance of p-type and n-type oxide semiconductor thin film transistors (TFTs). To validate the model, the simulated I–V characteristics are compared with measured results of p-type Cu2O and SnO and n-type SnO2 TFTs. It was observed that cation vacancies are responsible for hole conduction in p-type TFTs, while anion vacancies and/or metal interstitials are responsible for electron conduction in n-type TFTs. This was observed by assigning the cation vacancies to acceptor-like Gaussian states and anion vacancies and/or metal interstitials to donor-like Gaussian states. The characteristic slopes in conduction/valence band-tail states are due to disorders present in the oxide semiconductors. The model successfully delivers the physical insight and pathway to circuit simulation of large-scale integration of pixel circuits in active matrix liquid crystal display/active matrix organic light-emitting diodes.

Low-Temperature Solution-Processed n-Channel SnO2 Thin-Film Transistors and High-Gain Zero-VGS-Load Inverter

Low-cost inorganic solution processing for oxide semiconductor thin-film transistors (TFTs) is crucial for developing next-generation cost-effective, ubiquitous, and flexible electronics, and the d...

Slot-die coating of silicon ink for volume production of CMOS polysilicon TFTs

A large-area polysilicon film was formed from slot-die coating of cyclopentasilane based silicon ink and laser crystallization. In this article a study of silicon ink preparation and selection, slot-die coater setup, coating and laser crystallization is described. The polysilicon film was applied to fabricate complementary metal oxide semiconductor (CMOS) thin film transistors (TFTs) which were used to develop and demonstrate near field communication devices. This was part of a hybrid process flow consisting of conventional lithography and printing to fabricate CMOS TFTs. Slot-die coating of silicon ink on a 300 mm square 100 μm thick stainless steel substrate is a key building block of this hybrid process flow to subtract and replace high capital cost plasma enhanced chemical vapor deposition (PECVD), ion implantation and silicon wafers. With slot-die coating of silicon ink, a silicon layer formation equivalent to PECVD in quality was achieved.

34.1: Invited Paper: Availability of a‐IGZO semiconductor TFT in the large size Gen. 11 facilities for competitive high‐end applications

We investigated the four‐phase amorphous‐InGaZnO (a‐IGZO) thin film transistors (TFTs) in the world largest generation 11 factory (Gen.11, 2940mm × 3370mm) which has the cost advantage for future high‐end applications compared to generation 8.5 (Gen. 8.5, 2200mm × 2500mm). Self‐aligned coplanar structure TFT has been developed for large size inkjet printing (IJP) OLED display, and 4 mask back channel etched (BCE) type TFT has been developed for large size 8K4K LCD applications. For the purpose of low cost, high‐end applications, the availability of large size oxide TFT is essential in Gen. 11.

Effects of atmosphere composition during direct ultraviolet-light patterning of solution-deposited In2O3 thin film transistors

Sol-gel synthesis is widely used to fabricate metal oxide thin films by solution, but it requires high-temperature thermal annealing to fully convert precursors to metal oxides. Exposure to Ultraviolet (UV) light before thermal annealing of precursor films has been shown to reduce the conversion temperature, with the added benefits of film patterning when done through a shadow mask and improved device performance. However, the mechanism by which UV exposure under different atmospheric compositions affects the properties of metal oxide films after thermal annealing has not been investigated. Here, we control the atmospheric composition during UV-patterning—prior to high-temperature thermal annealing—of In2O3 sol-gel films which serve as the semiconductor in thin-film transistors. Despite all films being annealed at 250°C in air after UV patterning, films exposed to UV under oxygen-containing atmospheres have higher metal-oxygen-metal bonding and exhibit higher transistor mobility compared to the films exposed to UV under N2 atmosphere. The origin of the effect of atmospheric composition on mobility is studied through X-ray photoelectron spectroscopy (XPS) and Fourier-transform infrared spectroscopy and is revealed to be the result of the reformation of the nitrate species in the films under more oxidizing atmospheres during UV exposure. These nitrates can be completely removed by thermal annealing, facilitating more complete metal-oxygen-metal bond formation, which is reflected in higher OI XPS signal and transistor mobility. In contrast, films processed under N2 atmosphere during UV exposure contain nitrite species that cannot be removed by thermal annealing, resulting in less metal-oxygen-metal bond formation and lower mobility.