RIE Process Research Articles

Tungsten plug formation by an optimized tungsten etch back process in non-fully planarized topology

Reliable metallizations in contacts and vias with excellent filling properties for aspect ratios 1, can be achieved with a conformal blanket CVD tungsten deposition on top of a TiN barrier layer. The subsequent tungsten etch back has been investigated using a magnetically enhanced RIE process with pure SF 6 chemistry and He backside cooling. Highly uniform etch rates of up to 600 nm/min with 30% lateral component have been achieved at high RF power (400 W) and high pressure (200 m Torr). A low microloading effect of 1.1 — which is important for low tungsten recess in the plugs - together with sufficiently high W: TiN selectivity (10) can be established by operating at low pressure (< 50 mTorr), low RF power (< 150 W), and low temperature (< 40°C). A two-step process was found to be most suitable for complete removal of residues in topology without significantly effecting the other objectives. It consists of a fast, highly isotropic bulk etch and a slower, anisotropic clearing etch with minimized microloading effect. Tungsten residues can be completely removed on topology with flow angles of up to 30°. Simultaneously, the tungsten recess can be kept to less than 200 nm and the TiN loss to less than 30 nm. This process sequence enables perfect control of both bulk and overetch by emission spectroscopy. Thus, the TiN barrier, which has been used as tungsten adhesion layer and as etchstop, can also act as a nucleation layer for the subsequent Al metallization.

Submicron patterning of Nb using CF3Br and a single layer resist

A simple technique is described to fabricate submicron patterns in Nb films. Typical aspects are the use of a single layer PMMA mask and CF3Br as an etchant. Trenches with a width of less than 100 nm and very steep sidewalls have been obtained in a 200 nm thick Nb film. Etch rates for Nb, Nb2O5 and PMMA are given. It is shown that the RIE process is dominated by chemical etching.

4935378 Method for manufacturing a semiconductor device having more than two conductive layers

According to a semiconductor device manufacturing method of the invention, a first polycrystalline silicon layer doped with an impurity, a thin oxide film, a second polycrystalline silicon layer, and a silicon nitride film are sequentially formed, one upon the other. The silicon nitride film, the second polycrystalline silicon layer, the thin oxide film, and the first polycrystalline silicon layer are then etched, in a self-aligned manner, by means of a photolithography process. A thick oxide film is formed on a side wall portion of the first polycrystalline silicon layer, using the silicon nitride film as a mask, and after the silicon nitride film is removed, a conductive film is formed on the entire surface. Since a film formation process advances without patterning the first polycrystalline silicon layer, the first polycrystalline silicon layer is not damaged by an RIE process and the like. A defect density of the oxide film formed on the first polycrystalline silicon layer can be reduced. Since the thick oxide film is formed on the side wall portion of the first polycrystalline silicon layer, a withstand voltage and reliability of this portion are largely improved.

Characterization of GaAs/AlxGa1−xAs selective reactive ion etching in SiCl4/SiF4 plasmas

Selective reactive ion etching of GaAs over AlxGa1−xAs using SiF4/SiCl4 gas mixtures is studied. Etch rates of GaAs and AlxGa1−xAs are measured versus pressure, etch gas ratio, and plasma self-bias voltage. A selectivity ratio of 500:1 has been obtained for GaAs over Al0.35Ga0.65As at a gas composition ratio of SiCl4/SiF4=0.25, a pressure of 60 mTorr, and a self-bias voltage of −60 V. The etch stop mechanism is studied using Auger electron spectroscopy. Auger surface scan spectra indicate a high concentration of fluorine at the surface of etched AlGaAs samples suggesting the formation of an AlF3 etch stop layer.1 It is also shown that the AlF3 layer is easily removed with a very short dip in HCl/H2O or NH4OH/H2O. Hall effect measurements at 300 and 77 K are made on etched GaAs/Al0.3Ga0.7As modulation doped heterostructures to determine the effect of low-power etching on two-dimensional electron gas (2-DEG) sheet concentrations and carrier mobility. Slight reduction in both 2-DEG sheet carrier concentration and mobility are observed after the RIE process. This may be an indication of ion-beam induced damage to the AlGaAs/GaAs heterostructure. Finally, the effects of extended etching on the dc and microwave device characteristics of short gate length GaAs/AlGaAs/InGaAs MODFETs are reported.

Improvement of field and time dependent breakdown of trench capacitor using O/N/O dielectric and rounding off technique

Etching following re-oxidation (commonly called rounding-off oxidation) and oxide/nitride/oxide (ONO) dielectrics were used to improve the breakdown characteristics of trench capacitors fabricated by RIE processing. These improved trench capacitors were then evaluated by a field-dependent breakdown test and a time-dependent breakdown test. The results show that ONO dielectric and rounding off oxidation can raise the breakdown voltage of trench capacitors. However, from the time-dependent breakdown tests, only rounding-off oxidation can reduce the number of defects at the interface so as to improve the MTTF (mean time to failure) of trench capacitors. Nevertheless, if both ONO dielectric and rounding-off oxidation techniques are used, the improvement can be very significant.

The Dry Development Process of Tmsdea-Treated Photoresist by Using Oxygen-Helium Plasma in Reactive Ion Etching Mode

Silylation and dry development are the key processes of DESIRE, one of the surface imaging techniques in submicron lithography. The present work was carried out to achieve the improvement of develoment rate and anisotropic resist profile, and to characterize the silylated and dry developed resist. The dependence of silylation on the exposure dose and the presilylation baking temperature was investigated by using Rutherford backscattering spectrometry. The higher dose UV-irradiation results the thicker silylated layer in the dyed resist. The dry development of photoresisl patterns was processed newly by using the plasma of O2/He RIE plasma. It is particularly emphasized to obtain to optimize the RIE process, so that some improvements, i.e., vertical resist profiles with the high anisotropy, good selectivity, and the development rate of 0.4 µm/min were achieved. X-ray photoelectron spectroscopic study indicated that Si in the silylated and dry developed resist was present with the chemical binding states of SiO2 on surface, and SiO. SiC and very small amount of SiO2 in near-Surface region (at about 5 nm depth).

Plasma confinement by a rotating magnet device

An original rotating magnet system has been developed to enhanced the RIE process. It is built with synchronously rotating bar-shaped magnets, which create a travelling magnetic field of high intensity. This paper explains why the interaction torque between the magnets is very small, and how it is possible to obtain a high magnetic field in the useful area.

Silicon damage and residue overlayer caused by rie and ribe processes with CHF3

Abstract A comparative study of silicon damage and overlayer formation with CHF 3 reactive ion etching and reactive ion beam etching is performed. Fluorine XPS F1s spectra reveal a contribution characteristic of the first residue layers. The effect of the ion bombardment, concerning the amorphization of the subsurface is established with precision. Bombardment by energetic ions ( > 100 eV ) is necessary to induce the formation of a silicon carbide at the interface, but this condition is not sufficient; the neutral flux density could be a critical parameter. The results suggest a schematic diagram representing the region probed by XPS.

Improved tungsten absorber technology for sub-half-micron x-ray lithography

This paper reports on a novel absorber technology for X-ray stepper masks based on a stabilized tungsten layer. Effective stress reduction (σ⩽10 7 N/m 2) and excellent long term stability (Δσ<5·10 6 N/m 2) are being obtained by sputtering the 0.8 μm thick tungsten layers in the presence of oxygen, and subsequently annealing them in an oxidizing atmosphere. Investigations with respect to microstructure and composition indicate a highly textures W 3O layer, having grain sizes in the order of 60 nm. For etching the W pattern a CF 4 based RIE process has been optimized. In this case a beam lithography in combination with a tri-level system (HPR/SiN/PM15) is being used. W pattern with sub-half micrometer dimensions have been etched with steep edges.

Mo/Ti Double Layer Contact for VLSI

A dual layer metallization system, consisting of a thin contacting layer of titanium covered by a thick layer of molybdenum, has been developed for VLSI applications. At 400°C the thin titanium layer is shown to dissolve thin oxide layers on the silicon surface to make good ohmic contact. Thick molybdenum over the titanium layer has high conductivity, good step coverage, low electromigration, and very smooth surface morphology. This system is both electrically and mechanically stable. Both layers were sequentially sputtered without breaking the vacuum and patterned with a single‐step RIE process. Contact resistance to n+ silicon is about 10 Ω·μm2, and that to p+ silicon is about 19 Ω·μm2, which is lower than that of a W or contact. Leakage current and contact resistance were measured as a function of annealing temperature. The n+ contact does not degrade up to 650°C, whereas the p+ contact is reliable up to 600°C. The overall contact system is stable up to 550°C, maintaining the physical and electrical integrity of the film. SIMS analyses were used to help explain the variations observed in these parameters at high temperatures.

Reactive Ion Etching in SF 6 Gas Mixtures

Reactive ion etching of crystalline silicon, polysilicon, , and has been studied in a parallel plate electrode configuration, with and without magnetic confinement, in gas diluted with varying proportions of , , , and Ar. In order to investigate the contamination from the RF cathode, RIE studies were done with RF cathode covered with aluminum disk as well as with 0.5 cm thick circular quartz plate. The RF frequency used is 13.56 MHz and RF power density varied from 0.1 to 0.4 Wcm−2. Experimental results indicate the following: (i) significant contamination occurs on the etched surface with the aluminum covered cathode, but no detectable contamination occurs with the quartz plate covered cathode, (ii) there are etch rate maxima both for silicon and polysilicon with dilution in the range 10–20 volume percent for aluminum covered cathode; these maxima are more pronounced at higher power levels, (iii) etch rates of silicon and polysilicon are much reduced with , , and especially dilution in volume proportions >30% at all power levels and irrespective of cathode covers; argon dilution has the least effect on the etch rates; (iv) due to loading effect the etch rates of silicon and polysilicon are reduced significantly if the aluminum cover on the cathode is substituted by a quartz plate. Moreover, scanning electron microscopic studies of silicon and polysilicon etch profiles have shown that in gas mixtures, the RIE process is physical‐chemical and not purely chemical. The degree of etch anisotropy has been found to vary from 0.5 to 0.3 depending upon argon dilution in and operating pressure. Magnetic confinement has been found to reduce anisotropy, and RF power density levels above 0.1 Wcm−2 have not been found to affect anisotropy. The highest selectivity obtained with quartz cathode is 18:1 for 100% at 0.1 Wcm−2 power density level with magnetic confinement. At higher power density levels, the selectivity has been found to decrease.

Secondary effects of single crystalline silicon deep- trench etching in a chlorine-containing plasma for 3- dimensional capacitor cells

The main problems occurring during the trench etching in a chlorine containing RIE process are considered: (1) deposition of contaminating films on the trench sidewalls, (2) micro masking effects of those contaminations leading to the so called “black silicom”, and (3) “trenching effects” on the bottom of the trench cell. By means of SIMS and Auger measurements it is shown that the contaminating films on the trench walls are formed by unsaturated B xCl y species from the BCl 3 plasma. By the same analytical methods it is obtained that the so called black silicon occurring in a pure Cl 2 plasma is caused by micro masking by Al-, Si- oxide clusters which stem from surface adsorbed oxygen and the alumina covered cathode. Furthermore it is observed that the trenching effect occurring with Cl 2 plasma can be significantly reduced by adding BCl 3. BCl 3 reduces the number of Cl + 2 ions and therefore favours the formation of passivating species on the surface to be etched. This passivating layer in return reduces the trench formation at the bottom.

Rie-Induced Damage to Single Crystal Silicon Monitored with Nondestructive Thermal Waves

AbstractA method is presented to nondestructively monitor damage in silicon caused by reactive-ion or plasma etching on actual product wafers or test wafers immediately following the etch step.Data is taken on product wafers by scanning the 1-micron laser probe spot across and along the bottom of RIE-etched trenches.The onset of silicon damage brings a marked increase to the thermal wave (TW) signal: as the RIE bias voltage was increased from -60 volts to -250 volts, the TW signal increased monotonically by 1230%.The effects of other RIE process parameters on the damage level were also measured.This study allowed the RIE process variables to be adjusted to minimize damage to the silicon surface.

A Process for 0.5 Micron CMOS Gate Definition

ABSTRACTA RIE process has been developed for the etching of 0.5 μm CMOS Polysilicon gates defined using both E-Beam direct writing and sub-micron optical lithography. Profile control and selectivity were enhanced by using a two-step pattern transfer process wherein the Photoresist mask was used to define a thin Silicon Nitride layer which was subsequently used to define the underlying Polysilicon gate electrode. High etch selectivity to both the Silicon Nitride mask and the thin gate oxide was achieved using a Cl2 plasma chemistry after a BCl3 initiation step. The effect of BCl3 initiation on the poly profile and the effect of loading on profile and selectivity will be presented.

An integration of all refractory Josephson logic LSI circuit

An integration process for the fabrication of an all refractory Josephson LSI logic circuit is described. In this process, niobium nitride and niobium double-layered Josephson junctions were integrated using a reactive ion etching with a 2.5 μm minimum feature. A highly selective and anisotropic RIE process and a planarizing technology have been developed for intagrating a circuit with LSI complexity. For evaluating the process capability, test vehicle circuits with MSI/LSI level complexity have been designed and fabricated using this process. An 8 bit ripple carry adder and a 4×4 bit parallel multiplier have been integrated with Josephson four junction logic ( 4JL ) gates, the largest of which contains more than 2800 Josephson junctions. Both functionality and high-speed performance testings have been successfully performed with these test circuits.

Effects of differential etching and masking resist preparation on the quality of the reactive-ion-etched aluminum and aluminum alloys

The conventional method used for aluminum (Al) and aluminum alloy (Al + Si, Al + Si + Cu) delineation in integrated circuits is mainly by wet chemical etching. Because of its isotropic characteristic, wet chemical etching becomes inadequate for patterning Al metal lines with linewidths narrower than about 4 Μm. In this work, Al and Al alloys (Al + 2% Si; Al + 1% Si + 1% Cu) were reactively etched in SiCl4 plasma using patterned photoresist as the etch-mask. Resist patterns were generated either by conventional processing methods or by tri-level resist techniques which included hard-baking (200°C, ≤ 30 min), and two consecutive reactive ion etchings in CF4 and 02 plasmas. Masking resists prepared by the tri-level resist technique retained their integrity during exposure to a SiCl4 plasma, and significantly improved resolution and fidelity of pattern transfer from resist to underlying Al or Al alloy film. The substrate surface of the reactively etched Al + Si + Cu sample was considerably rougher than that of the Al or Al + Si sample due to the high concentration of Cu accumulated at the metal/substrate region during RIE process.

Multilayer resist technique for submicron optical lithography

Analysis has shown that the limiting factor in achieving 1 μ technology in optical lithography is mainly due to nonideal operating conditions such as surface topography, reflectivity, defocusing, etc. By using a multilayer resist process to eliminate these extraneous factors, we have demonstrated that optical lithography can be pushed beyond 1 μ into the submicron range. The advantages and problems encountered with the bilayer DUV flood exposure process were pointed out. One of the most serious problems, due to reflected light from surface topography, was corrected by using an antireflecting coating between the PMMA and AZ resist layers. This antireflection coating layer also eliminates the interface mixing between PMMA and AZ resists. A trilayer resist process was developed based on the highly directional RIE process. A new barrier film based on spin-on-glass was optimized to obtain defect free films. This spin-on barrier layer greatly simplifies the work flow and provides significant cost savings over the conventional vacuum deposited or CVD films. Submicron resolution capability and good dimension controls over severe wafer surface topography have been demonstrated. The trilayer resist process has been demonstrated to be capable of handling dimensions beyond the resolving power of currently available optical lithographic systems.

Reactive ion etching of niobium

The reactive gases CBrF3 and CF4 have both been found to be effective in the reactive ion etching of niobium. At relatively high pressures, 100 mTorr, rapid etching with a small degree of undercutting occurs at moderate rf power levels. At lower pressures, higher rf power levels, ≳1 W/ cm2, are required but vertical edge profiles result. The RIE process can be useful in producing electrodes for Josephson circuits and superconducting microbridges.