Resistance In Low-resistance State Research Articles

A 10-nm-thick silicon oxide based high switching speed conductive bridging random access memory with ultra-low operation voltage and ultra-low LRS resistance

In this paper, a silicon oxide based conductive bridging random access memory (CBRAM) with an ultra-low operation voltage, a high switching speed, and an ultra-low resistance at low resistance state (LRS) is reported. The CBRAM has a sandwich structure with platinum and copper as electrode layers and an ultra-thin 10-nm-thick silicon oxide film as an insulating switching layer. The CBRAMs are fabricated with CMOS compatible materials and processes. DC I–V sweep characterizations show an ultra-low SET/RESET voltage of 0.35 V/−0.05 V, and the RESET voltage is the lowest among all ultra-low voltage CBRAMs. The CBRAM is capable of withstanding endurance tests with over 106 pulses of +0.4 V/−0.1 V with 1 μs pulse width, with the resistance at LRS maintaining at an ultra-low value of only 20 Ω, which is the lowest among all CBRAMs to date, and it is reduced by at least 2.95 times compared with prior studies. Meanwhile, the switching ratio between high resistance state and LRS is more than 1.49 × 104. Moreover, the switching time characterization of the CBRAM demonstrates an ultra-short SET/RESET time of 7/9 ns. The CBRAM has potential applications in high-speed, ultra-low voltage, and ultra-low power electronics.

(Invited) Reliability and Scaling Perspectives of HfO2-Based OxRAM

Hafnium oxide OxRAM (Oxide Random Access Memory) is a non-volatile memory technology that has been widely investigated over the last 15 years. Its working mechanism relies on the formation and rupture of a tiny conductive filament through a HfO2 layer sandwiched between an active (Ti) and inert (TiN) electrodes. This causes the electrical resistance to very over three orders of magnitudes between a low resistance state (LRS) and a high resistance state (HRS).OxRAM is a strong candidate to replace embedded Flash technology at scaled nodes. This is justified by several considerations but mainly driven by the low cost of integration and very high compatibility with standard CMOS technology. Yet OxRAM faces tremendous challenges in terms of reliability, variability and scaling.In this paper we first show our latest findings in terms of reliability on a Ti/HfO2(5nm)/TiN cell. Controlling LRS and HRS resistance distributions can be achieved with a proper write/erase algorithm design (see Fig. 1) and it is a key point to enable large array integration. A proper write/erase sequence ensures long bit endurance up to 107 cycles. Data retention is then evaluated at four different temperatures (125, 165, 200 and 260 °C) to extract a 10 years retention temperature of 85°C.Next, we discuss OxRAM scaling perspectives. In this context, it is essential to take into account both the resistive cell and its selector (most typically a MOS transistor). As recently shown [2], so far the OxRAM scaling has been mainly limited by the programming current, which determines the MOS selector size. Even if the OxRAM cell is integrated in the BEOL above its selector, the bitcell size is mostly determined by the underlying transistor. In addition, the OxRAM programming voltage dictates the transistor EOT and challenges the transistor reliability for scaled nodes. We demonstrated our OxRAM cell integration with a thin gate oxide FDSOI transistor (GO1/SG) and we show how this paves the OxRAM integration in a 28nm node.Eventually we discuss the ultimate scaling perspective of an OxRAM array in a Cross-Point architecture. To enable such architecture the development of a BEOL selector is mandatory and we focused on Ovonic Threshold Switching device (OTS) for this scope. The OTS works switching between a low-conductive state and a metastable conductive one, which is voltage-triggered. We demonstrated (see Fig. 3) a 1S1R (one selector one resistor) OxRAM cell where the HfO2 memory is co-integrated with a series Ge-Sb-Se-N (GSSN) OTS. We eventually discuss the limits of this architecture showing that a trade-off exists between the half pitch of the Cross-Point array metal lines and the size of the memory bank.REFERENCE[1] G. Sassine et al., 2018 IEEE International Reliability Physics Symposium (IRPS). [2] J. Sandrini et al., 2019 IEEE Electronic Device Meeting (IEDM). [3] D. Alfaro Robayo et al., 2019 IEEE 11th International Memory Workshop (IMW). Figure 1

Effects of Resistance States on the Magnetoresistance in Ni/Al2O3/Ni by Resistive Switching

Formation and rupture of conductive filaments is one of the main mechanisms for unipolar resistive switching (URS), which can be manifested by the observation of magnetoresistance (MR) effect if ferromagnetic metallic filaments are formed. In this work, ferromagnetic metallic Ni is used as top and bottom electrodes on Al2O3 film, and stable URS behavior is observed after a forming process. By inserting a series resistor in the circuit during the set process, the resistance value at low resistance state (LRS) increases with increasing resistance of the series resistor. The URS behavior can be attributed to the formation and rupture of metallic Ni filaments penetrating through the thin Al2O3 layer, which has been confirmed by the observation of tunneling magnetoresistance. However, the MR value decreases continuously with increasing resistance in LRS, which is due to that the diameter of Ni conductive filaments becomes smaller. Thus, the nonmagnetic scattering at the surfaces of filaments increases, leading to the decrease of MR.

Multistage resistive switching behavior organic coating films-based of memory devices

Memory devices were prepared by spin-coating process, and the multistage resistive switching behavior has been found in organic coating films-based of memory device. The composite of [6,6]-phenyl C61-butyric acid methyl ester and polyvinyl pyrrolidone were used as active layer materials. The as-prepared device exhibits a typical nonvolatile write-once-read-many- times storage effect, and shows multistate resistive switching behavior, and there are obvious distinctions between different resistance states. The resistance in low resistance state (LRS) and high resistance state (HRS) dependence on temperature is tested, and the resistance of LRS and HRS show metal and semiconductor characteristics, respectively. As well as, the resistance in HRS shows evident dependence on cell size. Hence, the resistive switching mechanism was attributed to the broken processes of carbon-rich conducting filament. Furthermore, conductance quantization during resistive switching processes was analyzed. This work might make it attractive for exploiting high density data storage.

Reduction of thermal disturbances in 3D 1S1R RRAM crossbar arrays for neuromorphic computing

Recently, analog behaviors in resistive random-access memory (RRAM) have been proposed as a promising circuit implementation for neuromorphic computing. However, to date, there have been relatively few studies on the issue of resistance degradation (computing weight) induced by thermal disturbances in high-density RRAM arrays. In this paper, thermal simulations of a three-dimensional (3D) one-selector, one-resistor (1S1R) RRAM crossbar array for neuromorphic computing were performed using the COMSOL Multiphysics software. Four factors influencing the thermal disturbance problem were considered: distances between adjacent devices, thermal conductivity of the insulating material, the resistance of the low-resistance state (LRS) of the RRAM, and the programming speed. Thermal disturbances were found to be more severe when the device spacing was less than 200 nm. Higher thermal conductivities of the insulating material, a larger LRS resistance, and a faster operational speed were found to effectively reduce the thermal disturbances in 3D 1S1R RRAM crossbar arrays. The use of sub-nanosecond pulses solved the thermal issues to the greatest extent.

Piezoresistive Characteristics of Nylon Thread Resistive Memories for Wearable Strain Sensors

A nylon thread (NT) resistive memory is fabricated by performing a simple dip-and-dry solution process using graphene–poly(3,4-ethylenedioxythiophene):poly(4-styrenesulfonate) (PEDOT:PSS) conductive ink. The piezoresistive characteristics of the NT resistive memory are further evaluated for wearable strain sensors. While a stretching strain (ε) is applied to the NT resistive memory, the relative resistance change of low-resistance state (LRS) is found to be higher than that of high-resistance state (HRS). This result implies that the contribution of the local overlapping interconnection change in graphene and PEDOT:PSS materials to the LRS resistance change is greater than that to the HRS resistance change. In addition, through many cycles of repeatedly stretching and releasing the LRS of the NT resistive memory at a fixed ε = 7.1%, a gauge factor of approximately 22 is measured and achieved for a highly sensitive and durable strain sensor. Finally, the actual integration of the NT resistive memory into textiles can provide resistive memory and piezoresistive sensor applications simultaneously for wearable electronic textiles.

Nonvolatile Resistive Switching and Physical Mechanism in LaCrO3 Thin Films**Supported by the Joint Funds of the National Natural Science Foundation of China and the Chinese Academy of Sciences’ Large-Scale Scientific Facility under Grant No U1532149, and the National Basic Research Program of China under Grant No 2014CB931704.

Polycrystalline LaCrO3 (LCO) thin films are deposited on Pt/Ti/SiO2/Si substrates by pulsed laser deposition and used as the switching material to construct resistive random access memory devices. The unipolar resistive switching (RS) behavior in the Au/LCO/Pt devices exhibits a high resistance ratio of ∼ 104 between the high resistance state (HRS) and low resistance state (LRS) and exhibits excellent endurance/retention characteristics. The conduction mechanism of the HRS in the high voltage range is dominated by the Schottky emission, while the Ohmic conduction dictates the LRS and the low voltage range of HRS. The RS behavior in the Au/LCO/Pt devices can be understood by the formation and rupture of conducting filaments consisting of oxygen vacancies, which is validated by the temperature dependence of resistance and x-ray photoelectron spectroscopy results. Further analysis shows that the reset current IR and reset power IR in the reset processes exhibit a scaling law with the resistance in LRS (R0), which indicates that the Joule heating effect plays an essential role in the RS behavior of the Au/LCO/Pt devices.

Unipolar resistive switching characteristics and scaling behaviors in La2Mo2O9 thin films for nonvolatile memory applications

La2Mo2O9 (LMO) thin films have been deposited on Pt/Ti/SiO2/Si substrates by pulsed laser deposition and the resistive switching (RS) characteristics of the Au/LMO/Pt devices has been investigated. The Au/LMO/Pt devices show excellent unipolar RS characteristics with high resistance ratio between high resistance state and low resistance state (LRS), good endurance, and retention performances. The results of temperature dependence of resistance and x-ray photoelectron spectroscopy suggest that the observed RS characteristics can be explained by the formation and rupture of conducting filaments composed of oxygen vacancies. Furthermore, the plot of the reset current (IR) as a function of the third harmonic coefficient (B0) caused by Joule heating during the reset process shows scaling behavior with a power law of IR∝B0−δ. The IR and reset power (PR) can also be scaled to the resistance in LRS (R0), i.e., IR(PR)∝R0−α(β). The observed scaling behaviors indicate the importance of the Joule heating for the RS characteristics of Au/LMO/Pt devices. These results demonstrate the potential application of LMO thin film in a nonvolatile memory device.

Analytical Modeling of Current Overshoot in Oxide-Based Resistive Switching Memory (RRAM)

Current overshoot due to parasitic capacitance during set transition represents a major concern for controlling the resistance and current consumption in resistive switching memory (RRAM) arrays. In this letter, the impact of current overshoot on the low-resistance state (LRS) is evaluated by means of experiments on one-transistor/one-resistor structures of HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> RRAM. We develop a physics-based analytical model, able to calculate the LRS resistance and the corresponding reset current by a closed-form formula. The model allows predicting the current overshoot impact for any value of compliance current, set voltage, and parasitic capacitance.

(Invited) Physical Models of Program and Read Fluctuations in Metal Oxide Resistive RAM

The explosive growth of digital data poses increasing demand for novel hardware capable of storing, searching, and analyzing large amounts of data with high efficiency and low power consumption. In this context, resistive switching memories (RRAM) are under scrutiny for storage-class memories and in-memory computing to alleviate or even suppress the von Neumann bottleneck between memory and the central processing unit (CPU) [1]. RRAM devices provide an ideal solution to solve this dilemma, thanks to their high speed, low power, 3D integration and scalability. However, fundamental issues of switching variability and resistance stability must be understood and solved for a mature RRAM technology. This work addresses program and read variability in RRAM, presenting an overview of physical models to describe and predict statistical variations and their impact on device reliability.Variability issues can originate from cycle-to-cycle variations, cell-to-cell variations, and time-to-time variations. While cell-to-cell variations can be minimized by accurate control of the integration process, cycle-to-cycle and time-to-time variations are typically related to fundamental physical limitations, that need for a physical model and understanding for their solution. Cycle-to-cycle variations consist of switching variations, where the resistance of the low-resistance state (LRS) or high-resistance state (HRS) change from cycle to cycle due to random variations in the conductive path responsible for the state resistance. This is shown in Fig. 1, showing current-voltage characteristics of HfO2-RRAM devices with 1T1R architecture [2]. Devices show cycle-to-cycle variations for all switching parameters, including the set voltage Vset, the reset voltage Vreset, and the resistance of LRS and HRS. Variations decrease at increasing size of the conductive filament which is controlled by the compliance current IC, e.g., from IC = 8 μA (a) to 80 μA (b). These variations can be attributed to 2 fundamental sources of variations, namely shape variations, where the conductive-path shape changes from cycle to cycle at constant size, and number variations, where the size of the conductive path changes due to variations in the number of injected/migrated defects. Statistical physics-based models of the conductive path indicate that the normalized standard deviation of resistance sR/R increases with R for shape variations, and with R0.5 for number variations [3]. Fig. 2 shows the measured σR/R as a function of R, showing a transition from a slope 1 for LRS to a slope 0.5 for HRS in the log-log scale. This suggests that LRS variability is mainly due to shape variations, while HRS variability is due to number variation. The new variability model allows to understand and predict variations at variable set/reset conditions, such as variable voltage, current and time.While cycle-to-cycle program variations can be controlled by accurate program/verify techniques, read fluctuations can take place any time after program, thus cannot be easily suppressed. In particular, noise can lead to distribution broadening and device failure by unwanted mixing between HRS and LRS distributions [4]. A detailed analysis of current noise after the reset operation indicates 2 main contributions to fluctuation, namely random telegraph noise (RTN) and random walk (Fig. 3). The latter consists of sudden jumps of resistance, where the jump frequency decreases with time after programming. Random walk remains one of the main reliability issues of RRAM, since it contributes to the broadening of the resistance distributions after set/reset. Ways to mitigate or compensate the distribution broadening includes algorithms and material engineering. [1] H.-S. Philip Wong and S. Salahuddin, “Memory leads the way to better computing,” Nature Nanotechnology 10, 191 (2015).[2] S. Ambrogio, S. Balatti, A. Cubeta, A. Calderoni, N. Ramaswamy, and D. Ielmini, “Statistical fluctuations in HfOx resistive-switching memory (RRAM): Part I – Set/Reset variability,” IEEE Trans. Electron Devices 61, 2912 (2014).[3] D. Ielmini, “Resistive Switching Memories based on Metal Oxides: Mechanisms, Reliability and Scaling,” Semiconductor Science and Technology (2016).[4] S. Ambrogio, S. Balatti, V. McCaffrey, D. Wang, and D. Ielmini, “Noise-induced resistance broadening in resistive switching memory (RRAM) - Part II: Array statistics,” IEEE Trans. Electron Devices 62, 3812 (2015). Figure 1

Forming-free unipolar resistive switching behavior with conical conducting filaments in LaVO4 thin films

LaVO4 thin films have been deposited on Pt / Ti /SiO2 /Si substrates by pulsed laser deposition in order to explore the resistive switching (RS) behavior of the Au/LaVO4/Pt devices. It is found that the as-prepared Au/LaVO4/Pt devices stay in the low resistance state (LRS) and no electroforming process (forming-free) is needed to trigger fresh devices for the subsequent RS. Furthermore, the devices show excellent switching parameters such as a reproducible switching effect, a high resistance ratio of ∼104 between the LRS and high resistance state (HRS), good endurance and retention characteristics, and non-overlapping switching voltages. The dominant conduction mechanisms are Ohmic conduction in the LRS and the lower voltage region of the HRS, and Poole–Frenkel emission in the higher voltage region of the HRS. The combination of temperature dependence of resistance, x-ray photoelectron spectroscopy, and model analysis suggests that the forming-free unipolar RS behavior can be explained by the formation and rupture of conical conducting filaments formed out of oxygen vacancies. These results may be important for practical application in nonvolatile resistive switching memory.

Resistive memory properties of an electrochemical SiO2-based device without an active electrode

A Ni (200 nm)/CuxO (7 nm)/SiO2 (20 nm)/W structure is fabricated in order to investigate its resistive memory properties. The resistance of the Ni/CuxO/SiO2/W structure can be reversibly switched between a high-resistance state and a low-resistance state (LRS) by applied voltages in different polarities. According to the switching behavior, the results of cyclic voltammetry, and the positive temperature coefficient of the LRS resistance, the switching mechanism is dominated by the electrochemical reaction with Cu conducting filaments. This Ni/CuxO/SiO2/W structure lacks an active electrode, but still has the characteristics of an electrochemical resistive memory. The CuxO layer provides Cu ions to form Cu conducting filaments during resistive switching. The Ni/CuxO/SiO2/W structure can also be operated in a vaporless environment, which overcomes the ambient issue for the traditional Cu/SiO2/W structure. The Ni/CuxO/SiO2/W structure exhibits reliable resistive switching and a lower ambient effect, and can be more flexibly integrated with complementary metal–oxide–semiconductor processes than the traditional Cu/SiO2/W structure.

Study of radiation hardness of HfO2-based resistive switching memory at nanoscale by conductive atomic force microscopy

A resistive switching random access memory (RRAM) with an HfO2/Ti structure grown on a molybdenum (MO) substrate was fabricated, and a gold (Au) conductive atomic force microscopy (CAFM) tip was used as the top electrode such that the cell area of the resulting RRAM device is as small as 3×10−12cm2. The pre- and post-irradiated resistive switching behaviors of the RRAM device with various HfO2 layer thicknesses were investigated after being subjected to Co60 γ-ray irradiation with different radiation doses. It is found that the forming voltage (Vforming), set voltage (Vset), resistance of high resistance state (RHRS) and resistance of low resistance state (RLRS) of the RRAM device are all radiation dose-dependent. The Vforming, Vset, RHRS and RLRS all decrease as the radiation dose increases due to increasing radiation-induced oxygen vacancies or defects inside the HfO2 layer. Our experimental results indicate that the HfO2-based RRAM cell with an extremely small cell area is not actually radiation hard since the operating voltage will change with Vforming and Vset after irradiation.

Coexistence of Bipolar and Unipolar in NiO Resistance Switching

In this paper, we reported a coexistence of bipolar and unipolar characteristics in Cu/NiO/Pt RRAM cells. We studied the unipolar resistive switching firstly. The Cu/NiO/Pt exhibits an extensibility performance in low power consumption. The reset current is higher than 1 mA when the current compliance is above 1 mA. However, the reset current can decrease to 300 μA when the current compliance decreases to 50 μA. Furthermore, the Cu/NiO/Pt device also shows a bipolar behavior. However, the decreasing reset current phenomenon and bipolar behavior were not observed in Pt/NiO/Pt structure. Then we compared the temperature dependence of the LRS resistance. The two structures showed positive temperature coefficients (α) in low resistance state (LRS), suggesting metallic filaments controlling the LRS. The temperature coefficient (α) of Cu/NiO/Pt structure is lower than that in Pt/NiO/Pt structure, which indicates different metal filaments are formed in the Cu/NiO/Pt structure. It is suggested that the coexistence of bipolar and unipolar and low power consumption is ascribed to the application of Cu electrode to NiO dielectric.

Unipolar resistive switching properties of amorphous Pr0.7Ca0.3MnO3 films grown on a Pt/Ti/SiO2/Si substrate

Amorphous Pr0.7Ca0.3MnO3 (APCMO) films were grown on a Pt/Ti/SiO2/Si (Pt–Si) substrate at temperatures below 500 °C and the Pt/APCMO/Pt–Si device showed unipolar resistive switching behavior. Conduction behavior of the low resistance state (LRS) of the Pt/APCMO/Pt–Si device followed Ohm's law, and the resistance in LRS was independent of the size of the device, indicating that the conduction behavior in LRS can be explained by the presence of the conductive filaments. On the other hand, the resistance in the high resistance state (HRS) decreased with increasing the device size, and the conduction mechanism in the HRS was explained by Schottky emission.

Retention Failure Mechanism for Low-Resistance-States of Cu-doped SiO2 Resistive Memory

A Cu/SiO2/Pt structure is used to investigate the retention failure mechanism of the low-resistance-state (LRS) of resistive-switching behavior. Resistance switching is determined by the electrodeposition and dissolution of a Cu-conducting filament within the SiO2 layer. The LRS retention time is decreased with an increase in LRS resistance, which is probably caused by the dissolution of the Cu filament near the Cu/SiO2 interface. The activation energy of LRS retention is 1.78 eV, which is close to that of the Cu diffusion in the SiO2 film. The cone-shaped Cu filament model and the diffusion phenomenon are used to examine the failure mechanism of LRS retention.

The Impact of n-p-n Selector-Based Bipolar RRAM Cross-Point on Array Performance

Recently, we have presented a circuit model of the n-p-n selector, validated by experimentally calibrated TCAD data and implemented in SPICE for cross-point memory array performance analysis. In this paper, we study the array circuit performance during memory operations and present five interesting insights. First, power consumption minimization during set/reset operation produces the dominant constraint that defines selector/memory pairing, and consequently the cross-point nonlinearity, i.e., ON-OFF current ratio (KI). Second, an optimal KI exists (e.g., 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sup> for 1-M array size), which implies that excessively higher KI degrades performance. Third, parallel read operation (i.e., N bits/read) can be performed and N increases with higher resistance in low-resistance state (RLRS) without compromising read margin (RM). Fourth, higher resistance ratio improves RM. Finally, read circuit with an improved sensitivity is highly attractive as 2× lesser RM requirement can improve parallel read capability by 10×.

Effect of thermal annealing on resistance switching characteristics of Pt/ZrO2/TiN stacks

In this study, the effect of thermal annealing on both the physical properties and the resistive switching properties of ZrO2 films deposited by atomic layer deposition (ALD) method were investigated for its potential application to non-volatile memory devices. The ZrO2 films in the Pt/ZrO2/TiN structure exhibited unipolar and bipolar resistance switching behaviors depending on the nature of the bias applied to Pt top electrodes for the electro-forming process. For unipolar switching, the resistance of the high resistance state (HRS) was reduced with increasing annealing temperature, accompanied with the increase of metallic Zr in the annealed ZrO2 films. In contrast, the HRS resistance in the bipolar switching was increased while the low resistance state (LRS) resistance was decreased with increasing annealing temperature, producing a greater change in resistance. SIMS and EDX showed that the thickness of interfacial TiOxNy layer between the ZrO2 and the TiN bottom electrode was enlarged with annealing. The enlarged TiOxNy layer was expected to produce the reduction of LRS resistance with the increase of HRS resistance in the bipolar resistance switching.

Transient Current of Resistive Switching of a NiOxResistive Memory

A NiOx thin film was fabricated by thermal oxidization on a Pt-coated substrate. Then, a Pt top electrode was deposited by an electron-beam evaporator to form a Pt/NiOx/Pt structure. The NiOx-based device can be reversibly switched between a high resistance-state (HRS) and a low resistance-state (LRS) by DC voltage sweeping. The resistive switching behavior occurs due to conducting filaments with a thermochemical reaction. A transient current was observed during the forming and SET processes (from a HRS to a LRS). The transient current increased with an increase in magnitude of the forming and SET voltage. The transient current was usually larger than the compliance current, and this caused the resistive switching behavior to be unstable. The transient current was caused by the discharge process of the parasitic capacitance of the measurement system. A circuit model of the measurement system was also proposed to simulate the transient current during the SET process. A resistor was series-wound with the NiOx-based device to decrease the transient current during the forming and the SET processes. The series-wound resistor also increased the LRS resistance and reduced the RESET (from a LRS to a HRS) current.

Impact of TaOx nanolayer at the GeSex/W interface on resistive switching memory performance and investigation of Cu nanofilament

The impact of a TaOx nanolayer at the GeSex/W interface on the performance of resistive switching memory in an Al/Cu/GeSex/TaOx/W structure has been examined. All materials and the memory structure have been investigated using high-resolution transmission electron microscopy, energy dispersive x ray spectroscopy, and x ray photo-electron spectroscopy analyses. A conically shaped crystalline Cu (111) nanofilament with a diameter of around 17 nm in the TaOx nanolayer after a current compliance (CC) of 500 μA has been observed, and this has been also characterized by fast Fourier transform. The low resistance state (LRS) decreases as the current compliances (CCs) increased from 1 nA to 1 mA, since the nanofilament diameter increased from 0.04 to 23.4 nm. This is also estimated by bipolar resistive switching characteristics. The resistivity of this crystalline Cu nanofilament is approximately 2300 μΩ.cm. The nanofilament has a cylindrical shape, with CCs ranging from 1 nA to 10 μA and a conical shape with CCs ranging from 50 μA-1 mA. The resistive switching mechanism has been explained successfully under SET and RESET operations. Improved resistive switching parameters, such as SET voltage, LRS, and high resistance state with consecutive switching cycles are obtained and compared to those of pure GeSex and TaOx materials. Extrapolated, long program/erase endurance of &amp;gt; 106 cycles, attributed to the Al/Cu/GeSex/TaOx/W structure design, is observed. This resistive switching memory structure shows extrapolated 10 years data retention with a resistance ratio of &amp;gt; 10 at a low CC of 0.1 μA at 50 °C. A large memory size of ∼ 6 Pbit/sq. in. is obtained, considering the nanofilament diameter at a low CC of 0.1 μA. This study is important not only for improving the performance of low-power resistive switching memory, but also helpful for designing other nonvolatile memory devices.