Pseudomorphic High Electron Mobility Transistor Research Articles

A compact 5-Watt low-loss and low-leakage reflective limiter for C-band

This paper introduces a reflective, low insertion loss transistor-based limiter based on a new leakage reduction method. The effectiveness of the proposed limiter has been confirmed through simulation and measurement results. Due to its low insertion loss, the proposed limiter is suitable for low-noise receivers. It reflects approximately 70% of the input power, leading to lower temperature rise, when subjected to high incident power, compared to absorptive limiters. Fabricated using a low-noise 0.15-μm AlGaAs–InGaAs pseudomorphic HEMT (pHEMT) technology, this design allows for co-design with a low noise amplifier (LNA) on the same die. Measurement results have demonstrated that the proposed limiter can withstand up to 5-W continuous-wave (CW) input power without failure in a compact chip area of only 0.8 mm2. Additionally, measurements show a minimum insertion loss of 0.83 dB with 0.17 dB ripple over the frequency range of 4–6 GHz.

A Switchable Linear Regulator Implemented in GaAs pHEMT for WiFi Application

ABSTRACTCompared to silicon‐based complementary metal oxide semiconductor (CMOS), second‐generation semiconductor materials, such as gallium arsenide (GaAs) pseudomorphic high electron mobility transistor (pHEMT), offer significant advantages for radio frequency (RF) applications. As communication systems become more functional, designing highly integrated on‐chip transceiver systems presents a substantial challenge, where the voltage regulator as part of the power management module is indispensable. Due to lattice defects and other issues, achieving P‐channel metal oxide semiconductor (PMOS) in GaAs pHEMT is difficult, necessitating new circuit architectures to fulfill traditional linear regulator functions. To realize wireless fidelity (WiFi) transceiver systems on chip (SoC) using compound semiconductors for superior RF performance, this paper proposes a switchable linear regulator based on a 0.25 μm GaAs pHEMT process. The proposed linear regulator consumes a quiescent current of 440 μA in no‐load conditions and regulates a 5 V supply voltage down to 2.6 V output voltage. Measured results indicate that the designed linear regulator features a current load capacity of 20 mA, a load regulation rate of 5.8 mV/mA, and a line regulation rate of 1.8 mV/V. The proposed linear regulator circuit has been applied to WiFi transceiver systems, occupying a chip area of 0.054 mm2.

A 0.01–50 GHz power detector with temperature compensation and wideband DC‐blocking capacitor

AbstractThis letter presents a 0.01–50‐GHz resistive matching power detector implemented in a commercial 0.15‐ GaAs pseudomorphic high electron mobility transistor technology. An analytical expression is derived for the voltage responsivity of the detector as a function of temperature. To compensate for the temperature dependence of the detector, bias diode topology and mesa resistor load are employed. For an input power of −20 dBm at 1 GHz, the maximum variation of the detector output voltage is less than 0.5 dB over the temperature from C to C. The detector's S11 is less than −8 dB, the dynamic range (DR) is 55 dB, and the maximum voltage responsivity is 700 V/W. An on‐chip wideband capacitor with a bent‐strip shape is designed for direct current blocking. The detector can be used for wideband power monitoring and power amplifier control loop for its high DR and temperature stability.

Gallium arsenide octave-bandwidth microwave voltage-controlled oscillator having discrete varicap

Modern reconfigurable communication systems demand microwave voltage-controlled oscillators (VCOs) possessing an octave-wide bandwidth. Many advanced applications require also a low phase noise and a low current consumption for such VCOs. To meet an octave-bandwidth specification in combination with a low phase noise and a low current consumption it is desirable to implement a microwave monolithic integrated circuit (MMIC) technology. In-house gallium arsenide (GaAs) MMIC technology is implemented to build VCOs in this work. At the same time, in order to achieve a high-Q wide frequency tuning range, we implemented also a discrete variable capacitance diode (varicap). The discrete varicap is stacked above MMIC oscillator chip. A vertical design structure of the discrete varicap guarantees a high overlap capacitance ratio (K>20) along with reduced affect of the parasitic reactance. A high overlap capacitance ratio is needed for an octave-wide frequency tuning, while reduced affect of the parasitic reactance increases Q-factor of the VCO resonator. Hence, a sequential integration of the discrete varicap over monolithic oscillator chip resolves referred tough challenges in the design of VCO. Integrated VCO is finally packaged as a surface-mount device (SMD). At that SMD ceramic package is sealed with the metal lid. The oscillator circuitry is based on the conventional negative resistance approach with a positive feedback realized by common-source capacitance. An active element of the oscillator is a pseudomorphic high electron-mobility transistor (pHEMT). The gate length of a transistor is 0.15 µm. The width of the gate varies from 240 µm to 360 µm depending on working frequencies of the VCO. The varicap is built on the GaAs epitaxial heterostructure having customized gradient doping profile with abrupt junction. Nonlinear behavioral model of the varicap is extracted from the diode measurements and is further used for VCO simulation. Two types of VCO have been designed, fabricated and tested. First (second) type of VCO provides a tuning range from 5 to 10 GHz (from 10 GHz to 20 GHz), respectively. The measurement results demonstrate an output power of 3.9 dBm; a current consumption of 30 mA at a supply voltage of 5 V; a phase noise of minus 90 dBc/Hz at 100 kHz offset (minus 85 dBc/Hz at 100 kHz offset) for the first (second) type of VCO, respectively.

Transistor modeling based onLM‐BPNNandCG‐BPNNfor theGaAs pHEMT

AbstractIn order to address the challenges of complex process and low precision in traditional device modeling, double hidden layer back propagation neural network (BPNN) are trained using the conjugate gradient (CG) algorithm and the Levenberg–Marquardt (LM) algorithm, the CG‐BPNN and LM‐BPNN models of small signal for gallium arsenide (GaAs) pseudomorphic high electron mobility transistor (pHEMT) are obtained and analyzed here. At first, the scattering parameters (S‐parameters) of GaAs pHEMT are divided into training set and test set randomly. Experimental results show that the CG‐BPNN model is better than another S‐parameters when predicting ImS12with mean square error (MSE) of 7.6632e‐06, while LM‐BPNN model predicts ImS12with MSE of 2.4672e‐06. Meanwhile, the MSE of CG‐BPNN model is higher than LM‐BPNN model when predicting all the S‐parameters. In addition, it shows a smaller fluctuation range for the error curve of LM‐BPNN model, which is more stable than the CG‐BPNN model. Therefore, the double hidden layer LM‐BPNN model is the better choice to characterize the small signal of GaAs pHEMT.

A broadband low‐loss SPDT RF switch using a new off‐chip compensation technology

SummaryAn off‐chip compensation technology for low‐loss and broadband characteristics of radio frequency (RF) switches is proposed based on mathematical analysis of series shunt single pole double throws switches in this letter. This compensation technology can absorb the parasitic parameters of the switch Field Effect Transistor, improving the insertion loss and return loss of the switch as well as supporting higher bandwidth. To verify the design principle, a RF switch, using the SANAN GaAs 0.15 um pseudomorphic High Electron Mobility Transistors (pHEMT) process, and an off‐chip compensation network were designed and implemented. Specifically, after using an off‐chip compensation network, the measured bandwidth of switch has been expanded from 1.1–8.8 to 0.8–11 GHz, while the input and output return loss have also improved significantly.

A Highly Integrated C-Band Feedback Resistor Transceiver Front-End Based on Inductive Resonance and Bandwidth Expansion Techniques.

This paper presents a highly integrated C-band RF transceiver front-end design consisting of two Single Pole Double Throw (SPDT) transmit/receive (T/R) switches, a Low Noise Amplifier (LNA), and a Power Amplifier (PA) for Ultra-Wideband (UWB) positioning system applications. When fabricated using a 0.25 μm GaAs pseudomorphic high electron mobility transistor (pHEMT) process, the switch is optimized for system isolation and stability using inductive resonance techniques. The transceiver front-end achieves overall bandwidth expansion as well as the flat noise in receive mode using the bandwidth expansion technique. The results show that the front-end modules (FEM) have a typical gain of 22 dB in transmit mode, 18 dB in receive mode, and 2 dB noise in the 4.5-8 GHz band, with a chip area of 1.56 × 1.46 mm2. Based on the available literature, it is known that the proposed circuit is the most highly integrated C-band RF transceiver front-end design for UWB applications in the same process.

Low-frequency noise and defects in AlGaAs/InGaAs/GaAs pseudomorphic high-electron mobility transistors

Current–voltage characteristics and low-frequency (LF) noise of industrial-quality AlGaAs/InGaAs/GaAs pseudomorphic high-electron-mobility transistors are evaluated as a function of bias stress and temperature. A small positive shift of threshold voltage Vth and negligible degradation in peak transconductance GM are observed under ON-state bias conditions at elevated temperatures. The Vth measurements suggest activation of an acceptor-like defect or impurity center. The GM measurements demonstrate that newly activated defects are not located close enough to the two-dimensional electron gas to scatter carriers strongly. First-principles calculations and comparisons with previous work suggest that OAs impurity centers, other oxygen-related defects, isolated AsGa antisites, and dopant-based DX centers may contribute significantly to low-frequency (LF) noise in as-processed devices. LF noise is relatively unaffected by voltage stress at elevated temperatures, consistent with the small changes in Vth and peak GM.

Effect of optimal rapid thermal alloying of ohmic contacts to microwave pseudomorphic HEMTs

Gallium Arsenide (GaAs) pseudomorphic High Electron Mobility Transistors (pHEMTs) are currently used as active devices in manufacturing Monolithic Microwave Integrated Circuits (MMICs) for microwave and millimetre wave applications like Transmit-Receive (T/R) modules in Radars and communication. Low contact resistances (Rc) of pHEMT devices are necessary to obtain low access resistances to the device channel, for enhancement of transconductance and cut-off frequency. Devices formed by optimal and suboptimal conditions of rapid thermal alloying by infra-red optical radiation are investigated using cross-section transmission electron microscopy (XTEM), backside secondary ion mass spectrometry (backside SIMS) and thermal imaging techniques to understand the role of optimal alloy formation and its role in enhancement of device parameters.

Design of a 2–18 GHz low noise amplifier MMIC with current reused topology

AbstractA 2–18 GHz ultra wideband low noise amplifier (LNA) is illustrated in this letter. The proposed LNA adopts a two‐stage structure, which is composed of a common source amplifying stage and a cascode amplifying stage. By combining band extension matching technique, current reused topology and active bias circuit, the LNA performs excellent in gain, noise figure, power consumption, and immunization against the fluctuation of voltage supply. The LNA is implemented with a 0.18‐μm GaAs pseudomorphic high electron mobility transistor process and has a compact chip area of 1.75 × 1 mm2. The dedicated LNA achieves a measured average gain of 20.7 dB with ±1.5 dB variation all over the ultra‐wide bandwidth of 2–18 GHz. It also has a measured noise figure of lower than 1.7 dB and a measured output 1 dB compression point of higher than 5 dBm in the operating frequency band. The LNA has a low direct current power dissipation of 100 mW under a 5 V voltage supply.

Enhancement of electron transport mobility in GaAs/InGaAs asymmetrically doped narrow quantum well pHEMT structure

We study the effect of asymmetric doping concentrations on the electron mobility μ in GaAs/InGaAs-based single quantum well (SQW) as well as double quantum well (DQW) pseudomorphic high electron mobility transistor (pHEMT) structures. Unequal doping in the substrate and surface barriers (n d1 and n d2 ) causes asymmetric distributions of subband wave functions, ψ 0 and ψ 1, which influence the subband scattering rate matrix elements (SSRME), thereby affecting the subband mobility μ n . For narrow well widths (w w ), in SQW structures, mostly a single subband is occupied. We show that an increase in n d2 , keeping n d1 fixed, enhances μ nonlinearly. The interface roughness (ir-) scattering mostly dominates μ in thin wells (w w < 70 Å), while generally, μ is determined by ionized impurity (ii-) scattering and to some extent by alloy disorder (ad-) scattering. The influence of ir-scattering enhances, while ad-scattering diminishes, by reducing n d2 . For DQW, a double subband is occupied. In a symmetric DQW structure at resonance, n d1 = n d2 , ψ 0 and ψ 1 equally extend into both the wells. For a minor variation, say n d1 > n d2 , ψ 0 mostly lies in one well while ψ 1 is in the other well. In the case of n d1 < n d2 , the distribution reverts. The substantial changes in ψ 0 and ψ 1 influence the intra- and inter-SSRME differently through intersubband effects, leading to nonlinear μ n as a function of n d2 . Taking n d1 + n d2 = 3 × 1018 cm−3, we show that for w w1 = w w2 = 80 Å, a shallow dip in μ occurs at n d1 = n d2 = 1.5 × 1018 cm−3. Whereas, for w w1 = 60 Å and w w2 = 100 Å, the dip in μ occurs near the corresponding resonance, n d1 = 2.3 × 1018 cm−3 and n d2 = 0.7 × 1018 cm−3. Our results of nonlinear μ can be utilized for performance analysis of pHEMT.

An S-band MMIC LNA in GaAs 0.15-μm pHEMT

The study adopts a monolithic microwave integrated circuit (MMIC) low-noise amplifier (LNA) applied in S-band was designed using ADS simulation software, GaAs 0.15-um pseudomorphic high electron mobility transistor (pHEMT) process. The LNA small signal gain is greater than 30.8 dB, gain flatness is ±0.45 dB, noise coefficient is less than 1.5 dB, input and output return loss is greater than 10 dB, and the chip area is 1.2*2.4 mm2. The low noise amplifier is composed of a two-stage cascade structure. Gain flatness, gain control, and bandwidth broadening are improved by RLC negative feedback network. The minimum noise coefficient circle and maximum gain circle are narrowed by adding negative feedback to achieve better noise coefficient and gain.

High rejection self-oscillating up-conversion mixer for fifth-generation communications

&lt;span lang="EN-US"&gt;This paper presents the design of a pseudomorphic high electron mobility transistor (pHEMT) self-oscillating mixer (SOM) for millimeter wave wireless communication systems. The 180° out-of-phase technique is chosen to both improve the desired lower sideband (LSB) signal and to achieve a satisfactory rejection of the unwanted signals (LO, USB and IF). This SOM is designed on the PH15 process of UMS foundry which is based on 0.15 µm GaAs pHEMT. The signal is up-converted from 2 GHz-IF frequency to 26 GHz-LSB frequency, using an autogenerated 28 GHz-LO signal. Simulations were performed using the advanced design system (ADS) workflow. They show 6.4 dB conversion gain and a signal rejection rate of 29.7 dB for the unwanted USB signal. the chip size is 3.6 mm&lt;sup&gt;2&lt;/sup&gt;.&lt;/span&gt;

Analysis and Design of a Gain-Enhanced 1–20-GHz LNA With Output-Stage Transformer Feedback

A gain-enhanced technique with output-stage transformer feedback (OSTF) for the low-noise amplifiers is proposed in this brief. The transformer is realized by a pair of magnetically coupled microstrip lines between the drain and source stages, one of which acts as a series-peaking inductor and the other as a source degenerate inductor. By adjusting the length and gap of the magnetically coupled microstrip lines, the tuning of the gain in high frequency is realized. To verify the proposed OSTF gain-enhanced scheme, two LNAs with the same structure are designed, with one having OSTF and the other not. The gainenhanced wideband LNA with OSTF is fabricated in 0.15-GaAs pseudomorphic high-electron mobility transistor process. The total chip area, including input and output testing pads, is 1.24 mm2. The simulated results show excellent performance with a maximum gain improvement of 3-dB at 20 GHz. The measured results show that the gain-enhanced LNA has an average gain of 22.6 dB and a noise figure below 2 dB from 1 to 20 GHz, which are in good agreement with simulated ones.

Temperature behavior modeling based on resilient BPNN for a GaAs pHEMT high gain MMIC PA

AbstractAs the key component of transceiver, power amplifier (PA) plays an extremely important role in wireless communication system. In order to accurately characterize the performance variation of PA at any temperature, the temperature behavior of a gallium arsenide (GaAs) pseudomorphic high electron mobility transistor (pHEMT) high gain monolithic microwave integrated circuit (MMIC) PA is modeled in this paper. In this modeling, the resilient back propagation neural network (BPNN) is utilized to do the temperature behavior modeling for this PA. The investigation shows that the minimum mean square error (MSE) of the prediction results is 4.9607 × 10−4, which implies that it is feasible to use this modeling method to characterize the temperature behavior of PA. This modeling not only theoretically overcomes the problem of slow convergence speed of BPNN, but also solves the limitation of experimental devices and time setting. It will provide a more convenient guidance for test engineers.

DESIGN OF X-BAND MMIC LOW-NOISE AMPLIFIER IN GAAS-BASED 0.5 UM PHEMT TECHNOLOGY

One of the most important functional units of the receiving tract as part of the transceivers is a Low-Noise Amplifier (LNA). This paper presents the design process of a X-band (8…12 GHz) Microwave Monolithic Integrated Circuit (MMIC) LNA. The design was carried out using the Process Design Kit of the GaAs-based pHEMT05D technological process of JSC «Svetlana-Rost». The active nonlinear elements in this technological process are depletion mode pseudomorphic high electron mobility transistors with a 0,5-microns gate length.

Failure Mechanism of pHEMT in Navigation LNA under UWB EMP.

With the development of microelectronic technology, the integration of electronic systems is increasing continuously. Electronic systems are becoming more and more sensitive to external electromagnetic environments. Therefore, to improve the robustness of radio frequency (RF) microwave circuits, it is crucial to study the reliability of semiconductor devices. In this paper, the temporary failure mechanism of a gallium arsenide (GaAs) pseudomorphic high electron mobility transistor (pHEMT) in a navigation low-noise amplifier (LNA) under the jamming of ultra-wideband (UWB) electromagnetic pulses (EMP) is investigated. The failure process and failure mechanism of pHEMT under UWB EMP are elaborated by analyzing the internal electric field, current density, and temperature distribution. In detail, as the amplitude of UWB EMP increases, the output current, carrier mobility, and transconductance of pHEMT decrease, eventually resulting in gain compression. The injection experiment on LNA, which effectively verified the failure mechanism, indicates that the gain of pHEMT is suppressed instantaneously under the jamming of UWB EMP and the navigation signal cannot be effectively amplified. When UWB EMP amplitude increases to nearly 10 V, the BeiDou Navigation Satellite System (BDS) carrier signal is suppressed by nearly 600 ns. Experimental results accord well with the simulation of our model. UWB EMP jamming is a new and efficient type of electromagnetic attack system based on the device saturation effect. The performance degradation and failure mechanism analysis contribute to RF reinforcement design.

A Broadband 10–43-GHz High-Gain LNA MMIC Using Coupled-Line Feedback in 0.15-μm GaAs pHEMT Technology

In this letter, a 10–43-GHz low-noise amplifier (LNA) monolithic microwave integrated circuit (MMIC) is designed in a commercial 0.15- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> GaAs E-mode pseudomorphic high electron mobility transistor (pHEMT) technology. In the proposed LNA circuit, a novel coupled-line (CL)-based positive feedback structure is employed with the bandpass characteristic. By carefully tuning its coupling factor and arm length, the center frequency <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$f_{c}$ </tex-math></inline-formula> and the intensity of the feedback can be controlled, respectively. Subsequently, targeting <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$f_{c}$ </tex-math></inline-formula> at the higher cutting edge of the working band leads to compensated gain roll-off and extended bandwidth. Incorporating three-stage common-source (CS) architectures, an LNA prototype is fabricated with a size of 1.05 mm2 including pads. Under 2-V voltage drain drain (VDD), good performance is obtained, including 24.6-dB peak gain with 3-dB bandwidth of 33 GHz, 2.4–3.0-dB noise figure (NF), 54.5 ± 13.8-ps group delay, and 12.3/21.5-dBm best output power at 1 dB gain compression (OP1dB)/output third order intercept point (OIP3). The total dc power is 110 mW.

Optimization of 1-µm gate length InGaAs-InAlAs pHEMT

PurposeThe purpose of this study is to demonstrate a pseudomorphic High Electron Mobility Transistor (pHEMT) cutoff frequency (fT) and maximum oscillation frequency (fmax) are determined by the role of its gate length (Lg). Theoretically, to obtain an Lg of 1 µm, the gate’s resist opening must be 1 µm wide. However, after the coat-expose-develop (C-E-D) process, the Lg became 13% larger after metal evaporation. This enlargement is due to both resist thickness and its profile.Design/methodology/approachThis research aims to optimize the 1-µm Lg InGaAs-InAlAs pHEMT C-E-D process, where the diluted AZ®nLOF™ 2070 resist with AZ® EBR solvent technique has been used to solve the Lg enlargement problem. The dilution theoretically allows the changing of a resist thickness to different film thickness using the same coating parameters. Here, for getting a new resist, which is simply called AZ 0.5 µm, the experiment’s important parameters such as the coater’s spin speed of 3,000 rpm and soft bake at 110°C for 5 min are executed.FindingsThe newly mixed AZ 0.5 µm resist has presented a high resolution and undercut profile rather than standard AZ 1 µm resist. Hence, the Lg metallization after using AZ 0.5 µm optimized process showed better results than AZ 1 µm which used the standard process.Originality/valueThe outcome of the optimization has reached that it is possible to get a nearly sub-µm range gate’s opening using a diluted resist, and at the same time retaining a high resolution and undercut profile.

Effect of InxAl1-xAs graded buffer materials on pseudomorphic InP HEMT

In this paper, The InxAl1-xAs graded buffer was inserted between the InAlAs buffer layer and the pseudomorphic In0.66Ga0.34As channel layer to improve material quality in channel. The results show that the InxAl1-xAs graded buffer layer with 50 nm thickness can obtain a good heterojunction interface and the root mean square (RMS) of 0.154 nm. The two dimensional electron gas (2-deg) mobility and concentration were 8570 cm2/Vs. and 2.7 cm−2 × 1012 cm−2 at 300K, respectively. InxAl1-xAs graded buffer layer can enhance the interface quality and the electrical performance through releasing the interface strain caused by pseudomorphic In0.52Al0.48As/In0.66Ga0.34As HEMT. This study shows great potentials by incorporating InxAl1-xAs graded buffer layer in pseudomorphic InP HEMT materials to improve the properties of devices.