Abstract

In this letter, a 10–43-GHz low-noise amplifier (LNA) monolithic microwave integrated circuit (MMIC) is designed in a commercial 0.15- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> GaAs E-mode pseudomorphic high electron mobility transistor (pHEMT) technology. In the proposed LNA circuit, a novel coupled-line (CL)-based positive feedback structure is employed with the bandpass characteristic. By carefully tuning its coupling factor and arm length, the center frequency <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$f_{c}$ </tex-math></inline-formula> and the intensity of the feedback can be controlled, respectively. Subsequently, targeting <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$f_{c}$ </tex-math></inline-formula> at the higher cutting edge of the working band leads to compensated gain roll-off and extended bandwidth. Incorporating three-stage common-source (CS) architectures, an LNA prototype is fabricated with a size of 1.05 mm2 including pads. Under 2-V voltage drain drain (VDD), good performance is obtained, including 24.6-dB peak gain with 3-dB bandwidth of 33 GHz, 2.4–3.0-dB noise figure (NF), 54.5 ± 13.8-ps group delay, and 12.3/21.5-dBm best output power at 1 dB gain compression (OP1dB)/output third order intercept point (OIP3). The total dc power is 110 mW.

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