Power Hardware-in-the-loop Test Research Articles

Examining grid-forming inverters for power restoration using power-hardware in-the-loop and Digital Twins approaches with Real-time Digital Simulation

The current pursuit of ambitious decarbonization targets is driving a swift transformation of the power grid, marked by a surge in the production of renewable energy. The expansion on application of renewable energy hinges significantly on Distributed Energy Resources but system operators are grappling with challenges due to the opaque nature of DER operations. This opacity introduces considerable risks to grid stability, as the burgeoning volume of DERs may surpass the existing power network’s capacity. In response, the advent of Digital Twins (DT) technology offers a viable remedy by creating virtual counterparts of the physical grid infrastructure that necessitate transmitting minimal data. Digital Twins technology circumvents the hindrances associated with real-time data flows and bolsters the transparency of the system. To foster widespread implementation of DT within the sector, it is imperative to cultivate and validate its application through practical trials. To this end, Power Hardware-in-the-Loop (PHIL) experiments are employed to juxtapose the efficacy of actual power components against that of the DT models. The experiments involve connecting Grid-forming Inverter to a Real-time Digital Simulator (RTDS) for PHIL and DT testing, allowing for an in-depth analysis of the behaviour of photovoltaic inverter. This paper elucidates a platform engineered for immediate simulation tailored to DT and PHIL approaches. This platform is designed to prototype, exhibit, and evaluate grid-forming inverters under different scenarios that are critical for power restoration. With the help of simulation exchange, Perez Model is recommended to add in the DT model to increase the accuracy comparing with the PHIL model. The entire restoration process can therefore be comprehensively represented and analysed.

Power Hardware-in-the-Loop Smart Inverter Testing with Distributed Energy Resource Management Systems

The increasing integration of grid-connected photovoltaic (PV) inverters and inverter-based resource (IBR) systems into the power grid emphasizes the critical need for standardized procedures to ensure their reliability and effective grid support functions. This research is driven by the gap in standardized testing methodologies for smart inverters, which are pivotal for the stability and quality of power in distributed energy systems. We used a Power Hardware-in-the-Loop (PHIL) laboratory setup to conduct a comprehensive analysis of smart inverters within a simulated real-world grid environment. Our approach integrates a Distributed Energy Resource Management System (DERMS) with PHIL testing to evaluate the smart inverter’s performance across various operational modes. The detailed test protocols mimic real-world grid conditions, enabling the examination of the inverter’s dynamic response to grid disturbances, control strategies, and communication protocols. The primary aim of this study is to rigorously test and validate the primary functions of smart inverters, focusing on their impact on overall grid stability and power quality management. This includes advanced features like Volt–VAR, Volt–Watt, dynamic power factor control, and the seamless integration of smart inverters into DERMSs and Advanced Distribution Management Systems (ADMSs). Furthermore, we aim to bridge the current gap in standardized testing procedures, contributing to the establishment of robust standards and operating protocols for smart inverter integration into the grid.

Time delay in a mechatronic Power-HIL system: Analysis and model-based compensation

The Power-Hardware-in-the-Loop (PHIL) methodology enables testbed solutions that support the development of complex mechatronic components. In PHIL testing, a unit under test (UUT) is coupled with a virtual representation of its surroundings. As an example, a real railway pantograph current collector UUT can be tested in real-time interaction with a virtual overhead catenary. However, due to the closed-loop feedback interconnection and the exchange of power between real and virtual systems, such a PHIL control structure is highly sensitive to time delays in the signal paths which limits its performance, accuracy, and stability. In this work, methods to evaluate and compensate for the effect of time delays in a typical PHIL structure are proposed. A model-based PHIL control system is introduced to demonstrate the effect of time-delay compensation techniques, including utilising specific reduced-order models to achieve efficient time-delay compensation. The performance of the control system is demonstrated and validated via simulations and experiments on a scaled PHIL test setup, which is related to railway pantograph testing. In addition, criteria to analyse system stability are formulated and demonstrated with respect to uncompensated time delays and unknown UUT contact stiffness.

Power hardware-in-the-loop testing for multiple inverters with virtual inertia controls

Virtual inertia (VI) control schemes implemented in inverter-based resources (IBRs) present a promising solution for mitigating the absence of inertial response in power systems after the decommissioning of synchronous generators (SGs). The interaction of multiple grid-following (GFL) and grid-forming (GFM) inverters with the power grid demands a thorough understanding, as different control mechanisms can lead to undesired interference that could severely impact the grid’s stability. Power hardware-in-the-loop (PHIL) simulation is a verification technique that effectively bridges the gap between pure simulation and field demonstration. However, the topic of PHIL testing frameworks for multiple inverters equipped with VI control schemes has not been extensively addressed. To address this gap, this study presents a PHIL test framework that enables the verification of the performance and possible interference of multiple hardware inverters. The proposed framework enables the testing of inverters with different rated capacities and control mechanisms under equivalent capacity and control parameter conditions. This framework allows for the testing of various combinations of two inverters, from different manufacturers, to assess their performance and possible interference. The inverter prototypes from different manufacturers will be combined and tested with the proposed PHIL test framework to examine performance and potential interference for all combinations of the two inverters.

Verification of power hardware-in-the-loop environment for testing grid-forming inverter

Grid-forming inverters (GFMIs) are promising technologies that can replace some of the capabilities traditionally provided by synchronous generators (SGs), such as inertial response. While there have been many simulation-based studies on GFMIs, performance testing has not been adequately discussed. Power hardware-in-the-loop (PHIL) simulation is an attractive option for testing GFMIs. The interaction between GFMI and power systems can be observed under a variety of conditions, including low-inertia and contingency conditions. Since PHIL testing was primarily used for grid-following inverters (GFLIs), the PHIL configuration needs to be adjusted to test GFMIs, which respond faster to changes in grid voltage than GFLIs. This paper proposes the PHIL setup for testing GFMIs. It utilizes the PHIL interface developed for testing GFLIs and adjusts it for testing GFMIs. The stability and accuracy of the PHIL testing are evaluated in terms of frequency stability in low-inertia power systems by comparing test and simulation results.

Harmonic-Invariant Scaling Method for Power Electronic Converters in Power Hardware-in-the-Loop Test Beds

Power hardware-in-the-loop (PHIL) is an experimental technique that uses power amplifiers and real-time simulators for studying the dynamics of power electronic converters and electrical grids. PHIL tests provide the means for functional validation of advanced control algorithms without the burden of building high-power prototypes during early TRL. However, replicating the behavior of high-power systems with laboratory SDC can be complex. Inaccurate scaling of the SDC coupled with an exclusive focus on instantaneous voltages and currents at the fundamental frequency can lead to PHIL results that are only partially relatable to the high-power systems under study. Test beds that fail to represent switching frequency harmonics cannot be used for studying harmonic penetration or loss characterization of large-scale converters. To tackle this issue, this paper proposes a harmonic-invariant scaling method (HISM) that exploits the VA rating of preexisting laboratory SDCs for more accurately replicating harmonic phenomena in a PHIL test bench. Firstly,, a theoretical analysis of the proposed method is presented and, subsequently, the method is validated with MATLAB simulations and experimental tests.

Power hardware-in-the-loop testbeds for advances laboratory testing of smart grid applications

Abstract This paper assesses practical aspects related to advanced laboratory testing of smart grid applications with Power-Hardware-in-the-Loop (PHIL) approach. Particularly, the general features together with a set of extended use-cases for PHIL testing are introduced. An existing laboratory at TU Dortmund University is presented and considered as a reference for describing the architecture and the principal components of typical advanced laboratory testing infrastructures based on PHIL approach. A number of exemplary testbeds are provided to show the potentially applications of advanced PHIL testing for low-voltage distribution grids.

Evaluation of Operating Range of a Machine Emulator for a Back-to-Back Power-Hardware-in-the-Loop Test Bench

Inverter testing using laboratory test benches with rotating machines can be bulky, complex, and maintenance intensive. One solution is to use machine emulator for laboratory testing of inverters. The emulator is controlled in such a way that currents and voltages at the terminals resemble a machine connected to a mechanical load. A machine emulator for a back-to-back power-hardware-in-the-loop (PHIL) test bench is proposed in this article. The PHIL test bench consists of two identical voltage source converters (VSCs) with three single-phase inductors as coupling network. The two VSCs are connected to the same direct current supply. One VSC acts as inverter under test (IUT), while the other is part of machine emulator. Aim of this article is to analyze the influence of coupling inductance on operating range of the emulator. An analytical method to dimension the coupling inductance is introduced and verified in experiments. The operating range of the emulator is also evaluated. The performance of the IUT when tested with an equivalent permanent magnet synchronous motor in simulations and that of a prototyped 60-kW rated machine emulator are compared. Sensitivity of emulator control on parameter estimation is discussed. The experimental results show good agreement with simulations in both steady-state and dynamic conditions.

A Comprehensive Study and Validation of a Power-HIL Testbed for Evaluating Grid-Connected EV Chargers

Integration of excessive electric vehicle (EV) chargers into the low-voltage (LV) network may introduce new challenges. Power hardware in the loop (PHIL) simulations can be used for evaluating such systems as it provides a flexible testing platform to study the overall system as well as individual devices. To facilitate a proper PHIL simulation, a precise mathematical model of the PHIL testbed is required. This article presents a comprehensive small-signal model capable of describing the dynamics of a PHIL testbed developed for evaluating grid-connected EV chargers. The PHIL testbed consists of a PHIL-based battery emulator (BE) and a grid emulator (GE) to mimic the dc side battery energy storage system (BESS) and the ac side LV grid behavior, respectively. A mathematical framework is developed to analyze the stability and predict the accuracy of both PHIL-based emulators. The BE in this article considers a switch-mode power amplifier (PA). Thus, design strategies for its linear controller are also discussed in the context of cascaded dc–dc configuration. An experimental PHIL platform based on a real-time simulator (RTS) has been used to validate theoretical predictions and confirm developed models. Finally, the validated PHIL test has been employed for analyzing the performance of a commercial EV charger and its interactions with a weak LV network simulated in RSCAD/EMTDC.

FPGA-Based Permanent Magnet Synchronous Machine Emulator With SiC Power Amplifier

Power-hardware-in-the-loop (PHIL) platforms are gaining increasing attention as a valid solution for testing of converters operating in power electronics systems. Complex systems of significant power are difficult to validate experimentally in the laboratory. When, in such contexts, the device under test (DUT) is represented by a power converter designed to supply a variable speed drive (VSD), the electrical machine can be emulated through the PHIL platform. However, emulation of electrical machines imposes several requirements to the design of the PHIL test platform. Indeed, the emulable range of the machine operating points is constrained by the choice of the dc-bus voltage and of the coupling network. Furthermore, coupling network sizing strongly affects the stability of the emulation. In this article, the analytical relation between the coupling network, the emulator dc-bus voltage, and the machine operating range is described. A design procedure is then derived for both the dc-bus voltage and the coupling network. Afterward, the stability analysis is carried out to determine the stability characteristic of the PHIL emulation as a function of the coupling network choice and of the main parameters of the DUT control loop. The FPGA implementation of the PHIL is then described. Simulation and experimental results show the capability of the proposed implementation, with respect to both transient and steady-state machine emulation.

Model validation of a high-speed flywheel energy storage system using power hardware-in-the-loop testing

Low-inertia power systems with a high share of renewables can suffer from fast frequency deviations during disturbances. Fast-reacting energy storage systems such as a Flywheel Energy Storage System (FESS) can help limit the frequency deviations by injecting or absorbing high amounts of active power, with almost no degradation concerns. But for an accurate evaluation of the benefits of using a FESS in power systems, an accurate and validated model is necessary, which not only reflects its advantages, but also shows the practical limitations of this technology, such as its losses, its auxiliary power requirements, and its limitations during the whole operational range. In this paper, an accurate model for a high-speed FESS is presented, and then experimentally validated by means of Power Hardware-in-the-Loop (PHIL) testing of a full-scale commercial high-speed FESS in several frequency deviation scenarios. The PHIL testing setup allows testing the FESS during extreme and realistic frequency deviation, including the major frequency disturbance of August 9, 2019, in the power system of the UK. In each scenario, the same inputs that are sent to the real FESS are also given to the FESS model, running in real time, for model validation, and an excellent match between the results of the real FESS and its model is observed. Moreover, the PHIL testing results demonstrate the quick response of the FESS, following a frequency deviation, and its compliance with the latest grid code requirements in Germany for frequency support.

Adaptive inertia emulation control for high‐speed flywheel energy storage systems

Low-inertia power systems suffer from a high rate of change of frequency (ROCOF) during a sudden imbalance in supply and demand. Inertia emulation techniques using storage systems, such as flywheel energy storage systems (FESSs), can help to reduce the ROCOF by rapidly providing the needed power to balance the grid. In this work, a new adaptive controller for inertia emulation using high-speed FESS is proposed. The controller inertia and damping coefficients vary using a combination of bang–bang control approaches and self-adaptive ones, to simultaneously improve both the ROCOF and the frequency nadir. The performance of the proposed adaptive controller has been initially validated and compared with several existing adaptive controllers by means of offline simulations, and then validated with experimental results. The proposed controller has been implemented on a real 60 kW high-speed FESS, and its performance has been evaluated by means of power hardware-in-the-loop (PHIL) testing of the FESS in realistic grid conditions. Both simulations and PHIL testing results confirm that the proposed inertia emulation control for the FESS outperforms several previously reported controllers, in terms of reducing the maximum ROCOF and improving the frequency nadir during large disturbances.

A Power Hardware-in-the-Loop Based Method for FAPR Compliance Testing of the Wind Turbine Converters Control

A task for new power generation technologies, interfaced to the electrical grid by power electronic converters, is to stiffen the rate of change of frequency (RoCoF) at the initial few milliseconds (ms) after any variation of active power balance. This task is defined in this article as fast active power regulation (FAPR), a generic definition of the FAPR is also proposed in this study. Converters equipped with FAPR controls should be tested in laboratory conditions before employment in the actual power system. This paper presents a power hardware-in-the-loop (PHIL) based method for FAPR compliance testing of the wind turbine converter controls. The presented PHIL setup is a generic test setup for the testing of all kinds of control strategies of the grid-connected power electronic converters. Firstly, a generic PHIL testing methodology is presented. Later on, a combined droop- anFd derivative-based FAPR control has been implemented and tested on the proposed PHIL setup for FAPR compliance criteria of the wind turbine converters. The compliance criteria for the FAPR of the wind turbine converter controls have been framed based on the literature survey. Improvement in the RoCoF and and maximum underfrequency deviation (NADIR) has been observed if the wind turbine converter controls abide by the FAPR compliance criteria.

A Review of PHIL Testing for Smart Grids—Selection Guide, Classification and Online Database Analysis

The Smart Grid is one of the most important solutions to boost electricity sharing from renewable energy sources. Its implementation adds new functionalities to power systems, which increases the electric grid complexity. To ensure grid stability and security, systems need flexible methods in order to be tested in a safe and economical way. A promising test technique is Power Hardware-In-the-Loop (PHIL), which combines the flexibility of Hardware-In-the-Loop (HIL) technique with power exchange. However, the acquisition of PHIL components usually represents a great expense for laboratories and, therefore, the setting up of the experiment involves making hard decisions. This paper provides a complete guideline and useful new tools for laboratories in order to set PHIL facilities up efficiently. First, a PHIL system selection guide is presented, which describes the selection process steps and the main system characteristics needed to perform a PHIL test. Furthermore, a classification proposal containing the desirable information to be obtained from a PHIL test paper for reproducibility purposes is given. Finally, this classification was used to develop a PHIL test online database, which was analysed, and the main gathered information with some use cases and conclusions are shown.

Developing Power Hardware-in-the-Loop Based Testing Environment for Volt-Var and Frequency-Watt Functions of 500 kW Photovoltaic Smart Inverter

The power hardware-in-the-loop (PHIL) simulation has become a popular testing approach due to the flexibility it provides and the high-fidelity of its results. It is expected to be utilized as an advanced laboratory testing scheme to validate the grid support functions of distributed energy resources (DERs) because it can evaluate the interaction between the power system and DERs. Despite the strong demand to utilize the PHIL simulation for such testing, the literature that elaborates on the practical design of PHIL simulation based testing (hereafter called “PHIL testing”) environment including laboratory device setup, power system models, and test procedures is very limited. The simulation models, interfacing with the tested equipment, and data collection approaches are all different parameters that need to be fine-tuned for the successful execution of PHIL testing. It is vital for such successful test experiences to be shared to build universal knowledge around PHIL testing. In order to fill this knowledge gap, this paper presents such practical and essential techniques for the PHIL testing to share the knowledge for promotion of the PHIL simulation utilization. The development of PHIL testing environment to validate the smart inverter functions, i.e., volt-var function and frequency-watt function, is focused on in terms of laboratory setup, power system modeling, interfacing, and test procedure. The volt-var and frequency-watt functions of a 500 kW smart inverter of photovoltaic are validated on the basis of the presented techniques. Detailed test configurations, test procedures, and simulation models are presented along with obtained test results.

FACTS Providing Grid Services: Applications and Testing

The role of flexible alternating current transmission systems (FACTSs) in the provision of grid services is becoming increasingly important, due to the massive integration of intermittent renewable energy sources, energy storage systems, and the decommissioning of thermal plants. A comprehensive literature review of grid services offered by FACTS is performed, focusing on the different grid services that they can provide, such as power flow control, reactive power control, voltage control, power quality improvement, harmonic mitigation, improvement of transient stability, and damping of inter-area and intra-area oscillations. These grid services need to be realistically and economically validated in suitable testing environments. A review of relevant standards, guides, and the literature is performed, which covers the entire range from functional specification and factory testing up to the field testing of FACTS. Advanced industry practices, such as controller hardware in the loop (CHIL) testing of FACTS controllers by the manufacturer, and recent trends, such as CHIL testing of replica controllers by the owner, are underlined. Limitations of conventional testing and CHIL testing are explained and the use of power hardware in the loop (PHIL) simulation for FACTS testing is discussed. CHIL and scaled-down PHIL tests on a transmission static synchronous compensator (STATCOM) are performed and a comparison of the results is presented.

Multirate Partitioning Interface for Enhanced Stability of Power Hardware-in-the-Loop Real-Time Simulation

Power hardware-in-the-loop (PHIL) technology allows for the testing of physical equipment including power electronic converters in a simulation environment that closely mirrors the reality of the electric power grid. A challenge involved in PHIL systems is the design of the interface between the digital network model and physical equipment as this has a significant influence on stability of the real-time simulation. While a small time step supports stability and accuracy, its lower limit is given by the real-time constraint. The proposed multirate partitioning (MRP) interface addresses this issue by using a rather small time step at the hardware–software interconnection and then employing a staged adaptation of the time step within the digital model in accordance with the real-time constraint. Thus, multiple rates are used. The Nyquist stability criterion confirms enhanced stability and bandwidth by the MRP compared with single-rate (SR) counterparts. Moreover, a PHIL test of two parallel photovoltaic converters feeding a low-voltage network reveals different behaviors depending on the interface. Using the MRP, the waveforms more closely track the real-world curves of active and reactive power with the relative accuracy increasing with the speed of the transients. Informed decision making regarding the integration of renewables in the grid is so supported.

A Power Hardware-in-the-Loop (P-HIL) Test Bench Using Two Modular Multilevel DSCC Converters for a Synchronous Motor Drive

This paper provides an analytical and experimental discussion on a power hardware-in-the-loop (P-HIL) test bench for a medium-voltage high-power high-speed synchronous motor drive. This test bench consists of two modular multilevel double-star chopper-cell (DSCC) converters connected front-to-front without a transformer. An experimental downscaled P-HIL test bench is designed, constructed, and tested to confirm its operating performance. The three-phase 400-Vdc 10-kW DSCC inverter with eight chopper cells per arm is used as a “real” inverter under test. The other DSCC rectifier is used as a set of a “virtual” three-phase 200-V 10-kW 300-Hz four-pole 9000-r/min synchronous motor and a “virtual” high-speed centrifugal compressor with a quadratic torque-to-speed load characteristic.

An improved DIM interface algorithm for the MMC-HVDC power hardware-in-the-loop simulation system

Power hardware-in-the-loop (PHIL) simulation has become the crucial means of research on modular multilevel converter based high voltage direct current (MMC-HVDC) devices. To deal with the stability and accuracy problems caused by the power interface, an improved damping impedance method (DIM) interface algorithm is proposed by real-time impedance matching in this paper. The trapezoidal integration method is used to disperse the sub-module capacitance, and the turn-off resistance of power device is set to infinity to simplify the calculation process of MMC equivalent impedance, which can realize the efficient impedance matching for the DIM. Moreover, based on the voltage signal reconstructed by a dq coordinate transformation, a time delay compensation control method is proposed for the uncertain interface delay to improve the accuracy of the PHIL simulation. To verify the excellent stability and accuracy performance of the improved DIM, the characteristics of the reference system, DIM and ideal transformer model (ITM) interface systems are compared by digital simulation. The start-up strategy of a practical MMC-HVDC PHIL test platform is designed, and the effectiveness and feasibility of the proposed methods are verified by simulation experiments.

Online Parametric Identification of Power Impedances to Improve Stability and Accuracy of Power Hardware-in-the-Loop Simulations

This paper presents the wideband system identification (WSI) technique, i.e., an online method to identify power impedances over a wide frequency range from which the corresponding parametric impedance can be calculated online as well. The WSI technique exploits an existing custom 25-kW power electronic converter on the top of its power conversion function, which serves as power amplifier of an existing power hardware-in-the-loop (PHiL) simulation setup. The PHiL simulation technique allows connecting a real device under test (DUT) with the real-time simulated rest of system (ROS) at power level. An interface algorithm (IA) on simulation side and a power amplifier (the 25-kW power electronic converter) connect ROS and DUT. This paper shows the impact of the uncertainties in the WSI chain on the accuracy of the impedance identification and highlights how the WSI technique can be combined with the damping impedance method IA to improve both accuracy and stability of the PHiL test bench. The application of the method is illustrated for the scenario of a PHiL test of a dc microgrid with a passive load.