Power hardware-in-the-loop testing for multiple inverters with virtual inertia controls

Abstract

Virtual inertia (VI) control schemes implemented in inverter-based resources (IBRs) present a promising solution for mitigating the absence of inertial response in power systems after the decommissioning of synchronous generators (SGs). The interaction of multiple grid-following (GFL) and grid-forming (GFM) inverters with the power grid demands a thorough understanding, as different control mechanisms can lead to undesired interference that could severely impact the grid’s stability. Power hardware-in-the-loop (PHIL) simulation is a verification technique that effectively bridges the gap between pure simulation and field demonstration. However, the topic of PHIL testing frameworks for multiple inverters equipped with VI control schemes has not been extensively addressed. To address this gap, this study presents a PHIL test framework that enables the verification of the performance and possible interference of multiple hardware inverters. The proposed framework enables the testing of inverters with different rated capacities and control mechanisms under equivalent capacity and control parameter conditions. This framework allows for the testing of various combinations of two inverters, from different manufacturers, to assess their performance and possible interference. The inverter prototypes from different manufacturers will be combined and tested with the proposed PHIL test framework to examine performance and potential interference for all combinations of the two inverters.