Planar IGBT Research Articles

An Analytical Formula for the PETT Oscillation Over a Wide Voltage Range in NPT Planar IGBT Chips

An Analytical Formula for the PETT Oscillation Over a Wide Voltage Range in NPT Planar IGBT Chips

Injection enhanced SiC planar gate IGBT with partial Schottky contact emitter

A novel injection enhanced silicon carbide (SiC) planar gate insulated gate bipolar transistor with partial schottky contact emitter (PSE-IGBT) is proposed in this paper. The p-type schottky diode (p-SD) formed between the PSE and p-body region acts as a barrier to prevent the hole from flowing into the emitter, which enhances the conductivity modulation and optimizes the carrier distribution in the drift region in the conduction state. Therefore, compared with the conventional SiC IGBT (Con-IGBT), the device performance is significantly improved for the proposed structure. The simulation results show that the on-state voltage drop (Vceon) of the proposed SiC PSE-IGBT with the emitter metal of nickel (PSE-IGBTNi) and titanium (PSE-IGBTTi) is reduced from 6.61V of the SiC Con-IGBT to 5.83V and 5.48V, respectively. Meanwhile, the turn-off loss (Eoff) of the proposed SiC PSE-IGBTNi and PSE-IGBTTi is only 11.15 mJ/cm2 and 9.80 mJ/cm2, which is 47.5% and 53.9% lower than 21.25 mJ/cm2 of the SiC Con-IGBT at the Vceon of 6.4V, respectively. Furthermore, turn-off capability at high temperature and large current is checked and no degradation of the turn-off capability is observed for the proposed SiC PSE-IGBTs.

Analytical model for dynamic avalanche onset of planar IGBTs

Dynamic avalanche effect can occur due to the influence of free carrier on electric filed during inductive turn-off of IGBT, which is a critical factor influencing the device reliability. In this paper, a one-dimensional (1-D) analytical model for dynamic avalanche onset is at first derived based on the basic principles of semiconductor and it gives insight into the details of internal physical mechanisms of the device at the onset of dynamic avalanche. Then the critical structural parameters affecting the onset of dynamic avalanche are examined. By introducing a modification factor K into the 1-D model, a rough two-dimensional (2-D) analytical model that can reflect nonuniformity of the current distribution qualitatively during the turn-off of planar IGBTs is eventually obtained.

Trench Shielded Planar Gate IGBT (TSPG-IGBT) With Self-Biased pMOS Realizing Both Low On-State Voltage and Low Saturation Current

A novel trench shielded planar gate IGBT (TSPG-IGBT) with self-biased pMOS is proposed in this paper. It features a P-layer beneath the trench of the TSPG-IGBT to form a self-biased pMOS, which provides an additional path for the hole current and clamps the potential of the nMOS's intrinsic drain for lower saturation current. In the off-state, with the increasing potential of the N-cs (N-doped carrier store layer), the self-biased pMOS turns on and the potential of the P-layer will be clamped by the hole channel. Then, the reverse voltage is sustained by the P-layer/N-drift junction and the potential of the N-cs is shielded by the clamped P-layer region. Therefore, the N-cs can be heavily doped to reduce the on-state voltage (Von) without decreasing the breakdown voltage. Compared with the conventional TSPGIGBT, the Von of the proposed TSPG-IGBT is reduced by 0.3 V at the current density of 200 A/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> with the same turn-off loss. Besides, the saturation current density of the proposed one is decreased by 24%.

Extraction of dynamic avalanche during IGBT turn off

When IGBTs are switched with high dV/dt at high currents, dynamic avalanche occurs. Under certain conditions, this phenomenon is known to potentially degrade certain IGBT architectures. An investigation of the possible degradation of our planar IGBTs was started. This paper presents a method to extract the current (and consequently charge and energy) due to dynamic avalanche from measured turn off waveforms. The method is checked with TCAD simulations and applied to an accelerated stress test on two different device designs.

4500 V SPT+ IGBT optimization on static and dynamic losses**Project supported by the National Major Science and Technology Special Project of China (No. 2011ZX02504-002).

This paper concerns the need for improving the static and dynamic performance of the high voltage insulated gate bipolar transistor (HV IGBTs). A novel structure with a carrier stored layer on the cathode side, known as an enhanced planar IGBT of the 4500 V voltage class is investigated. With the adoption of a soft punch through (SPT) concept as the vertical structure and an enhanced planar concept as the top structure, signed as SPT+ IGBT, the simulation results indicate the turn-off switching waveform of the 4500 V SPT+ IGBT is soft and also realizes an improved trade-off relationship between on-state voltage drop (Von) and turn-off loss (Eoff) in comparison with the SPT IGBT. Attention is also paid to the influences caused by different carrier stored layer doping dose on static and dynamic performances, to optimize on-state and switching losses of SPT+ IGBT.

Comparative study of sensitive volume and triggering criteria of SEB in 600 V planar and trench IGBTs

IGBT power components are more and more used in atmospheric and space applications. Thus, it is essential to study the influence of the natural radiation environment (NRE) on the electrical behavior of planar and trench IGBTs. 2-D numerical simulations are performed to define the sensitive volume and triggering criteria of SEBs for planar and trench IGBTs for different configurations of ionizing tracks. The analysis of the results allows a better understanding of the SEB mechanism in each structure and comparing the behavior and the robustness of these two technologies under heavy-ion irradiation.

Experimental electro-mechanical static characterization of IGBT bare die under controlled temperature

Silicon dice soldered in power assemblies have to withstand simultaneously electrical, thermal and mechanical stress. Mechanical stress is an important issue because it will directly impact on both the device behavior and power modules reliability. This paper focuses on the electro-mechanical static characterization of a planar gate IGBT by the help of experiments at controlled temperatures. A specific test bench is proposed to make the experiments on silicone bare dice. It can be highlighted that mechanical stresses have a strong influence on the electrical characteristics of IGBT and this effect is independent from the die temperature. These properties might be a key point to point out an early failure indicator to improve design of the power module.

A New 1200 V Punch Through-Insulated Gate Bipolar Transistor with Protection Circuit Employing Lateral Insulated Gate Bipolar Transistor and Floating p-Well Voltage Sensing Scheme

A new 1200 V punch through-insulated gate bipolar transistor (PT-IGBT) with a protection circuit employing a lateral IGBT (LIGBT) and a floating p-well voltage sensing scheme is proposed and implemented by fabricating the main IGBT and gate voltage pull-down circuit using the widely used planar IGBT process. The detection of the fault and gate voltage pull-down operations is achieved using the floating p-well sensing scheme. The LIGBT used as a pull-down transistor reduces the area of the protection circuit due to the enhanced current handling capability. The voltage saturation effect of a floating p-well voltage under the high voltage condition provides the 1200 V PT-IGBT with a reliable and rapid protection by preventing the gate oxide failure of the pull-down LIGBT and eliminating the blanking filter.

Fabrication and Characterization of 5 kV IGBTs on 4H-SiC

AbstractP-channel planar IGBT devices were made on 4H-SiC. Punch-through buffer and drift layers were designed to block 5 kV were grown on 4H-SiC n-type substrate. Ion implantion was used for all selective doping such as n-well, p+, n+, JFET region and terminations. Gate oxidation was thermally grown and annealed. Blocking voltage of 5.7 kV was demonstrated. IGBTs exhibit VTH of -12 V, VT = -3.1 V, Rdiff,on = 400 mΩcm2 at Vg = -34 V at room temperature. Ron decreased to 108 mΩcm2 at Vg = -30 V at 300°C.

Novel buffer engineering: A concept for fast switching and low loss operation of planar IGBT

For the first time, an insulated gate bipolar transistor with a novel buffer is proposed and verified by two-dimensional (2D) mixed device-circuit simulations. The structure of the proposed device is almost identical with that of the conventional IGBT, except for the buffer layer which is formed by employing a three-step, gradually changing doping n+ structure. Compared with the conventional IGBT, the proposed device exhibits better trade-off relation between the conduction and switching losses. The turn-off time is halved from 9.4μs of the conventional IGBT to 4.5μs of the proposed device, so the operation speed of the proposed device is greatly improved. Further, the forward blocking voltage is enormously increased from 907V of the proposed device to 1278V of the proposed device, which is required for high power operation.

Striped anode engineering: a concept for fast switching power devices

In this paper, the striped anode concept is evaluated, for the first time in a MOS controlled power device, as a method of controlling the anode injection efficiency and enhancing of the turn-off performance. Simulation results using a 2d-mixed mode device-circuit system indicate that rather than having a blanket implanted anode, a striped anode structure can result in a significantly improved trade-off between turn-off energy losses and the on-state voltage drop. It is shown that when applied to the 6.5 kV IGBT, the improvement can be more than a factor of two when switching 30 A cm −2, in comparison to conventional uniform lifetime control. A striped anode structure consists of high injection regions (p + stripes), sandwiched between thin lightly doped p − regions of low injection efficiency. The p + stripes provide an optimum level of conductivity modulation required for a given on-state voltage drop in the N-drift region of a planar IGBT, while the low efficiency regions accelerate device turn-off.

Turn-off behaviour of epitaxial planar and trench gate IGBTs and nonepitaxial planar gate IGBT under hard and soft switchings

The results of investigation on turn-off dynamic operations of IGBTs are presented in the paper. Three-types of IGBTs which have planar and trench gate structures by epitaxial wafer and planar gate structure by nonepitaxial wafer are compared under conditions of hard and soft switching commutation topologies. Collector-emitter voltage and collector current waveforms of each IGBT and power losses are analysed under conditions of various parameters through simulation and in experiment. Moreover, carrier behaviour, electric field and potential distributions inside the chips are studied by simulation technique. It is noted that the trench gate IGBT has an advantage over the other-types for the hard switching application from the point of view of switching losses, and both the planar and trench gate IGBTs on the basis of an epitaxial wafer are more suitable for soft switching applications because of lower switching and on-state losses.

Trench cathode TIGBT with improved latch-up characteristics

A new TIGBT (Trench Insulated Gate Bipolar Transistor) with a trench cathode is proposed to suppress the latch-up which is a key problem to limit the maximum operating current. The efficiency of the proposed device is verified by numerical analysis with MEDICI. Trench cathode TIGBT could suppress the latch-up at anode voltage of 300 V and current density of 19 000 A/cm2 while planar IGBT and conventional TIGBT latch at the anode current density of 1300 and 4200 A/cm2, respectively. Forward voltage drops of trench cathode TIGBT, conventional TIGBT and planar IGBT are 1.53 V, 1.48 V and 2.43 V, respectively. In addition, trench cathode TIGBT has very large FBSOA (Forward Biased Safe Operating Area) compared with that of conventional TIGBT and planar IGBT.